TP-Link RE650 v2

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RE650 v2 is almost identical to the v1 version, with exception of the SPI flash being 8MB, and Wi-Fi chips being on different PCIE buses.

FIXME

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  • Please include only model specific information, omit bla,bla and put everything generic into separate articles
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  • base-system should lead the way, do not explain this again
  • DO NOT provide a complete howto here! Instead groom the general documentation.
ModelVersionSoCCPU MHzFlash MBRAM MBWLAN HardwareWLAN2.4WLAN5.0100M portsGbit portsModemUSB
RE650v2MediaTek MT7621AT8808128MediaTek MT7615Eb/g/na/n/ac-1--

Flash layout based on partition table found in the device.

partition fs-uboot base 0x00000 size 0x20000
partition os-image base 0x20000 size 0x330000
partition file-system base 0x350000 size 0x470000
partition partition-table base 0x7c0000 size 0x02000
partition default-mac base 0x7c2000 size 0x00020
partition pin base 0x7c2100 size 0x00020
partition product-info base 0x7c3100 size 0x01000
partition soft-version base 0x7c4200 size 0x01000
partition support-list base 0x7c5200 size 0x01000
partition profile base 0x7c6200 size 0x08000
partition config-info base 0x7ce200 size 0x00400
partition user-config base 0x7d0000 size 0x10000
partition default-config base 0x7e0000 size 0x10000
partition radio base 0x7f0000 size 0x10000

Flash factory image through OEM Web UI.

Specific values needed for tftp

FIXME Enter values for “FILL-IN” below

Bootloader tftp server IPv4 address FILL-IN
Bootloader MAC address (special) FILL-IN
Firmware tftp image Latest OpenWrt release (NOTE: Name must contain “tftp”)
TFTP transfer window FILL-IN seconds
TFTP window start approximately FILL-IN seconds after power on
TFTP client required IP address FILL-IN

generic.sysupgrade

FIXME These are generic instructions. Update with your router's specifics.

  • Browse to http://192.168.1.1/cgi-bin/luci/mini/system/upgrade/ LuCI Upgrade URL
  • Upload image file for sysupgrade to LuCI
  • Wait for reboot

If you don't have a GUI (LuCI) available, you can alternatively upgrade via the command line. There are two command line methods for upgrading:

  • sysupgrade
  • mtd

Note: It is important that you put the firmware image into the ramdisk (/tmp) before you start flashing.

sysupgrade

  • Login as root via SSH on 192.168.1.1, then enter the following commands:
cd /tmp
wget http://downloads.openwrt.org/snapshots/trunk/XXX/xxx.abc
sysupgrade /tmp/xxx.abc

mtd

If sysupgrade does not support this router, use mtd.

  • Login as root via SSH on 192.168.1.1, then enter the following commands:
cd /tmp
wget http://downloads.openwrt.org/snapshots/trunk/XXX/xxx.abc
mtd write /tmp/xxx.abc linux && reboot

Basic configuration After flashing, proceed with this.
Set up your Internet connection, configure wireless, configure USB port, etc.

FIXME Please fill in real values for this device, then remove the EXAMPLEs

The default network configuration is:

Interface Name Description Default configuration
br-lan EXAMPLE LAN & WiFi EXAMPLE 192.168.1.1/24
vlan0 (eth0.0) EXAMPLE LAN ports (1 to 4) EXAMPLE None
vlan1 (eth0.1) EXAMPLE WAN port EXAMPLE DHCP
wl0 EXAMPLE WiFi EXAMPLE Disabled

FIXME Please fill in real values for this device, then remove the EXAMPLEs

Numbers 0-3 are Ports 1-4 as labeled on the unit, number 4 is the Internet (WAN) on the unit, 5 is the internal connection to the router itself. Don't be fooled: Port 1 on the unit is number 3 when configuring VLANs. vlan0 = eth0.0, vlan1 = eth0.1 and so on.

Port Switch port
Internet (WAN) EXAMPLE 4
LAN 1 EXAMPLE 3
LAN 2 EXAMPLE 2
LAN 3 EXAMPLE 1
LAN 4 EXAMPLE 0

hardware.button on howto use and configure the hardware button(s). Here, we merely name the buttons, so we can use them in the above Howto.

FIXME Please fill in real values for this device, then remove the EXAMPLEs

The TP-Link RE650 has the following buttons:

BUTTON Event
EXAMPLE Reset reset
EXAMPLE Secure Easy Setup ses
EXAMPLE No buttons at all. -
General
Brand TP-Link
Model RE650
Versions v2
Device Type Range Extender
Availability Available 2022
Comments - general
OpenWrt Support
Supported Since Commit https://git.openwrt.org/?p=openwrt/openwrt.git;a=commit;h=39799974a372fb4333d21f077c670b8a56b9d696
Supported Since Release
Supported Current Release snapshot
Unsupported
Hardware
Bootloader U-Boot
Target ramips
System-On-Chip MediaTek MT7621AT
CPU MHz 880
Flash MB 8
RAM MB 128
Network
Ethernet 100M ports -
Ethernet Gbit ports 1
Switch ¿
Modem -
VLAN ¿
Comments - network ports
Wireless
WLAN 2.4GHz b/g/n
WLAN 5.0GHz a/n/ac
WLAN Hardware MediaTek MT7615E
Detachable Antennas -
Comments - WLAN
Interfaces
USB ports -
SATA ports -
Serial Yes
JTAG ¿
Comments - USB & SATA ports
Misc
LED count 7
Button count 3
Power supply 100-240 VAC, 0.4 A
Links
Forum Topic URL
WikiDevi URL
OEM device homepage URL https://www.tp-link.com/pl/home-networking/range-extender/re650/
Firmware OEM Stock URL https://www.tp-link.com/pl/support/download/re650/v2/#Firmware
Firmware OpenWrt Install URL
Firmware OpenWrt Upgrade URL
Edit the underlying data View/Edit data

Front:
Insert photo of front of the casing

Back:
Insert photo of back of the casing

Backside label:
Insert photo of backside label

Note: This will void your warranty!

Remove the 4 T6 screws in the back side of the device and pry with a spudger along the front border of the case (prying along the back border will reveal the psu connector and the heat sink, that is held in place by three phillips screws on the other side of the motherboard).

In v2 EU version, the side with a AC plug is non removable, as the AC connectors are soldered on the PCB. Remove only the back cover (the one with WPS button and LED lights) by prying along the side. There are two clips holding it in place roughly in the middle.

The serial port connector and the spi flash chip are on the front side and there's no need to remove the heat sink or remove the main board from the case to reach them.

Main PCB:
Insert photo of PCB

port.serial general information about the serial port, serial port cable, etc.

How to connect to the Serial Port of this specific device:

UART in v2 are SMD pads in the middle of the PCB, labeled TX/RX/GND

Serial connection parameters
for TP-Link RE650 v2
57600, 8N1

port.jtag general information about the JTAG port, JTAG cable, etc.

How to connect to the JTAG Port of this specific device:
Insert photo of PCB with markings for JTAG port

None so far.

=================================================================== MT7621 stage1 code Dec 16 2019 17:45:55 (ASIC) CPU=500000000 HZ BUS=166666666 HZ ================================================================== Change MPLL source from XTAL to CR... do MEMPLL setting.. MEMPLL Config : 0x11100000 3PLL mode + External loopback === XTAL-40Mhz === DDR-1200Mhz === PLL2 FB_DL: 0xa, 1/0 = 610/414 29000000 PLL3 FB_DL: 0x13, 1/0 = 669/355 4D000000 PLL4 FB_DL: 0x1a, 1/0 = 773/251 69000000 DDR patch working do DDR setting..[01F40000] Apply DDR3 Setting...(use customer AC) 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120 -------------------------------------------------------------------------------- 0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000D:| 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 000E:| 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 000F:| 0 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0010:| 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0011:| 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DRAMC_DQSCTL1[0e0]=13000000 DRAMC_DQSGCTL[124]=80000033 rank 0 coarse = 15 rank 0 fine = 48 B:| 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 opt_dle value:9 DRAMC_DDR2CTL[07c]=C287221D DRAMC_PADCTL4[0e4]=000022B3 DRAMC_DQIDLY1[210]=0F0F0B0F DRAMC_DQIDLY2[214]=0C0F0D0F DRAMC_DQIDLY3[218]=0C0C090C DRAMC_DQIDLY4[21c]=0B0B0D0A DRAMC_R0DELDLY[018]=00001F21 ================================================================== RX DQS perbit delay software calibration ================================================================== 1.0-15 bit dq delay value ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 14 11 14 14 13 11 15 10 10 9 10 | 10 11 10 12 11 9 -------------------------------------- ================================================================== 2.dqs window x=pass dqs delay value (min~max)center y=0-7bit DQ of every group input delay:DQS0 =33 DQS1 = 31 ================================================================== bit DQS0 bit DQS1 0 (1~60)30 8 (0~59)29 1 (2~64)33 9 (2~60)31 2 (1~61)31 10 (1~58)29 3 (1~62)31 11 (1~59)30 4 (1~61)31 12 (1~62)31 5 (2~61)31 13 (1~59)30 6 (1~61)31 14 (1~61)31 7 (1~61)31 15 (1~58)29 ================================================================== 3.dq delay value last ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 15 11 15 15 15 13 15 12 12 9 10 | 12 12 10 13 11 11 ================================================================== ================================================================== TX perbyte calibration ================================================================== DQS loop = 15, cmp_err_1 = ffff0000 dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1 dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2 DQ loop=15, cmp_err_1 = ffff0000 dqs_perbyte_dly.last_dqdly_pass[0]=15, finish count=1 dqs_perbyte_dly.last_dqdly_pass[1]=15, finish count=2 byte:0, (DQS,DQ)=(8,8) byte:1, (DQS,DQ)=(8,8) DRAMC_DQODLY1[200]=88888888 DRAMC_DQODLY2[204]=88888888 20,data:88 [EMI] DRAMC calibration passed =================================================================== MT7621 stage1 code done CPU=500000000 HZ BUS=166666666 HZ =================================================================== U-Boot 1.1.3 (Sep 7 2021 - 19:31:32) Board: Ralink APSoC DRAM: 128 MB relocate_code Pointer at: 87fb8000 Config XHCI 40M PLL flash manufacture id: 1c, device id 70 17 Warning: un-recognized chip ID, please update bootloader! *** Warning - bad CRC, using default environment ============================================ Ralink UBoot Version: 5.0.0.0 -------------------------------------------- ASIC MT7621A DualCore (MAC to MT7530 Mode) DRAM_CONF_FROM: Auto-Detection DRAM_TYPE: DDR3 DRAM bus: 16 bit Xtal Mode=3 OCP Ratio=1/3 Flash component: SPI Flash Date:Sep 7 2021 Time:19:31:32 ============================================ icache: sets:256, ways:4, linesz:32 ,total:32768 dcache: sets:256, ways:4, linesz:32 ,total:32768 ##### The CPU freq = 880 MHZ #### estimate memory size =128 Mbytes #Reset_MT7530 gpioMode Reg: 0x4852c Please choose the operation: 1: Load system code to SDRAM via TFTP. 2: Load system code then write to Flash via TFTP. 3: Boot system code via Flash (default). 4: Entr boot command line interface. 7: Load Boot Loader code then write to Flash via Serial. 9: Load Boot Loader code then write to Flash via TFTP.  0 3: System Boot system code via Flash. ## Booting image at bfc20000 ... text base: 80001000 entry point: 80549890 Uncompressing Kernel Image ... OK No initrd ## Transferring control to Linux (at address 80549890) ... ## Giving linux memsize in MB, 128 Starting kernel ... LINUX started... THIS IS ASIC SDK 5.0.S.0 Linux version 3.10.14 (jenkins@Sohoiipf) (gcc version 4.6.3 (Buildroot 2012.11.1) ) #1 SMP Tue Sep 7 19:37:15 CST 2021 The CPU feqenuce set to 880 MHz GCMP present CPU0 revision is: 0001992f (MIPS 1004Kc) Software DMA cache coherency Determined physical RAM map: memory: 08000000 @ 00000000 (usable) Zone ranges: Normal [mem 0x00000000-0x07ffffff] Movable zone start for each node Early memory node ranges node 0: [mem 0x00000000-0x07ffffff] On node 0 totalpages: 32768 free_area_init_node: node 0, pgdat 807c3d80, node_mem_map 81000000 Normal zone: 256 pages used for memmap Normal zone: 0 pages reserved Normal zone: 32768 pages, LIFO batch:7 Detected 3 available secondary CPU(s) Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes MIPS secondary cache 256kB, 8-way, linesize 32 bytes. PERCPU: Embedded 8 pages/cpu @81103000 s10496 r8192 d14080 u32768 pcpu-alloc: s10496 r8192 d14080 u32768 alloc=8*4096 pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 32512 Kernel command line: console=ttyS1,57600n8 root=/dev/mtdblock3 init=/sbin/init earlyprintk debug PID hash table entries: 512 (order: -1, 2048 bytes) Dentry cache hash table entries: 16384 (order: 4, 65536 bytes) Inode-cache hash table entries: 8192 (order: 3, 32768 bytes) Writing ErrCtl register=0003a04c Readback ErrCtl register=0003a04c Memory: 121184k/131072k available (5454k kernel code, 9888k reserved, 2501k data, 360k init, 0k highmem) Hierarchical RCU implementation. NR_IRQS:128 console [ttyS1] enabled Calibrating delay loop... 577.53 BogoMIPS (lpj=1155072) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 512 ftrace: allocating 15493 entries in 31 pages launch: starting cpu1 launch: cpu1 gone! CPU1 revision is: 0001992f (MIPS 1004Kc) Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes MIPS secondary cache 256kB, 8-way, linesize 32 bytes. Synchronize counters for CPU 1: done. launch: starting cpu2 launch: cpu2 gone! CPU2 revision is: 0001992f (MIPS 1004Kc) Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes MIPS secondary cache 256kB, 8-way, linesize 32 bytes. Synchronize counters for CPU 2: done. launch: starting cpu3 launch: cpu3 gone! CPU3 revision is: 0001992f (MIPS 1004Kc) Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes MIPS secondary cache 256kB, 8-way, linesize 32 bytes. Synchronize counters for CPU 3: done. Brought up 4 CPUs NET: Registered protocol family 16 release PCIe RST: RALINK_RSTCTRL = 7000000 PCIE PHY initialize ***** Xtal 40MHz ***** start MT7621 PCIe register access RALINK_RSTCTRL = 7000000 RALINK_CLKCFG1 = 77ffeff8 *************** MT7621 PCIe RC mode ************* PCIE2 no card, disable it(RST&CLK) pcie_link status = 0x3 RALINK_RSTCTRL= 3000000 *** Configure Device number setting of Virtual PCI-PCI bridge *** RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2 PCIE0 enabled PCIE1 enabled interrupt enable status: 300000 Port 1 N_FTS = 1b105000 Port 0 N_FTS = 1b105000 config reg done init_rt2880pci done FPU Affinity set after 4688 emulations bio: create slab <bio-0> at 0 SCSI subsystem initialized PCI host bridge to bus 0000:00 pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff] pci_bus 0000:00: root bus resource [io 0x1e160000-0x1e16ffff] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff] pci 0000:00:00.0: [0e8d:0801] type 01 class 0x060400 pci 0000:00:00.0: reg 10: [mem 0x00000000-0x7fffffff] pci 0000:00:00.0: reg 14: [mem 0x00000000-0x0000ffff] pci 0000:00:00.0: supports D1 pci 0000:00:00.0: PME# supported from D0 D1 D3hot pci 0000:00:01.0: [0e8d:0801] type 01 class 0x060400 pci 0000:00:01.0: reg 10: [mem 0x00000000-0x7fffffff] pci 0000:00:01.0: reg 14: [mem 0x00000000-0x0000ffff] pci 0000:00:01.0: supports D1 pci 0000:00:01.0: PME# supported from D0 D1 D3hot pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring pci 0000:01:00.0: [14c3:7615] type 00 class 0x000280 pci 0000:01:00.0: reg 10: [mem 0x00000000-0x000fffff 64bit] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 pci 0000:02:00.0: [14c3:7615] type 00 class 0x000280 pci 0000:02:00.0: reg 10: [mem 0x00000000-0x000fffff 64bit] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 02 pci_bus 0000:00: busn_res: [bus 00-ff] end is updated to 02 pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000) pci 0000:00:01.0: BAR 0: can't assign mem (size 0x80000000) pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff] pci 0000:00:01.0: BAR 8: assigned [mem 0x60100000-0x601fffff] pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff] pci 0000:00:01.0: BAR 1: assigned [mem 0x60210000-0x6021ffff] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit] pci 0000:00:00.0: PCI bridge to [bus 01] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff] pci 0000:02:00.0: BAR 0: assigned [mem 0x60100000-0x601fffff 64bit] pci 0000:00:01.0: PCI bridge to [bus 02] pci 0000:00:01.0: bridge window [mem 0x60100000-0x601fffff] PCI: Enabling device 0000:00:00.0 (0004 -> 0006) PCI: Enabling device 0000:00:01.0 (0004 -> 0006) BAR0 at slot 0 = 0 bus=0x0, slot = 0x0 res[0]->start = 0 res[0]->end = 0 res[1]->start = 60200000 res[1]->end = 6020ffff res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 BAR0 at slot 1 = 0 bus=0x0, slot = 0x1 res[0]->start = 0 res[0]->end = 0 res[1]->start = 60210000 res[1]->end = 6021ffff res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 bus=0x1, slot = 0x0, irq=0x4 res[0]->start = 60000000 res[0]->end = 600fffff res[1]->start = 0 res[1]->end = 0 res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 bus=0x2, slot = 0x1, irq=0x18 res[0]->start = 60100000 res[0]->end = 601fffff res[1]->start = 0 res[1]->end = 0 res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 Switching to clocksource MIPS NET: Registered protocol family 2 TCP established hash table entries: 1024 (order: 1, 8192 bytes) TCP bind hash table entries: 1024 (order: 1, 8192 bytes) TCP: Hash tables configured (established 1024 bind 1024) TCP: reno registered UDP hash table entries: 256 (order: 1, 8192 bytes) UDP-Lite hash table entries: 256 (order: 1, 8192 bytes) NET: Registered protocol family 1 PCI: CLS 80 bytes, default 32 4 CPUs re-calibrate udelay(lpj = 1167360) squashfs: version 4.0 (2009/01/31) Phillip Lougher msgmni has been set to 236 io scheduler noop registered (default) reg_int_mask=0, INT_MASK= 0 HSDMA_init hsdma_phy_tx_ring0 = 0x07dcc000, hsdma_tx_ring0 = 0xa7dcc000 hsdma_phy_rx_ring0 = 0x07dd0000, hsdma_rx_ring0 = 0xa7dd0000 TX_CTX_IDX0 = 0 TX_DTX_IDX0 = 0 RX_CRX_IDX0 = 3ff RX_DRX_IDX0 = 0 set_fe_HSDMA_glo_cfg HSDMA_GLO_CFG = 465 Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled serial8250: ttyS0 at MMIO 0x1e000d00 (irq = 27) is a 16550A serial8250: ttyS1 at MMIO 0x1e000c00 (irq = 26) is a 16550A TP-LINK gpio driver initialized brd: module loaded flash manufacture id: 1c, device id 70 17 Warning: un-recognized chip ID, please update SPI driver! EN25Q64(1c 30171c30) (8192 Kbytes) mtd .name = raspi, .size = 0x00800000 (8M) .erasesize = 0x00010000 (64K) .numeraseregions = 0 Creating 5 MTD partitions on "raspi": 0x000000000000-0x000000800000 : "ALL" 0x000000000000-0x000000020000 : "fs-uboot" 0x000000020000-0x000000350000 : "os-image" 0x000000350000-0x0000007c0000 : "file-system" 0x0000007f0000-0x000000800000 : "radio" register mt_drv == pAd = c0181000, size = 4589248, Status=0 == pAd->PciHif.CSRBaseAddress =0xc0080000, csr_addr=0xc0080000! RTMPInitPCIeDevice():device_id=0x7615 mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615 mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001 AP Driver version-5.0.3.1 RtmpChipOpsHook(223): Not support for HIF_MT yet! MACVersion=0x0 mt7615_init()--> Use 1st iPAeLNA default bin. Use 0st /etc/MT7615E_EEPROM1.bin default bin. <--mt7615_init() <-- RTMPAllocTxRxRingMemory, Status=0 == pAd = c0701000, size = 4589248, Status=0 == pAd->PciHif.CSRBaseAddress =0xc0600000, csr_addr=0xc0600000! RTMPInitPCIeDevice():device_id=0x7615 mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615 mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001 AP Driver version-5.0.3.1 RtmpChipOpsHook(223): Not support for HIF_MT yet! MACVersion=0x0 mt7615_init()--> Use 2nd iPAeLNA default bin. Use 1st /etc/MT7615E_EEPROM2.bin default bin. <--mt7615_init() <-- RTMPAllocTxRxRingMemory, Status=0 rdm_major = 253 GMAC1_MAC_ADRH -- : 0x0000000c GMAC1_MAC_ADRL -- : 0x4328805c Ralink APSoC Ethernet Driver Initilization. v3.1 1024 rx/tx descriptors allocated, mtu = 1500! GMAC1_MAC_ADRH -- : 0x0000000c GMAC1_MAC_ADRL -- : 0x43288001 PROC INIT OK! TCP: cubic registered NET: Registered protocol family 17 8021q: 802.1Q VLAN Support v1.8 VFS: Mounted root (squashfs filesystem) readonly on device 31:3. Freeing unused kernel memory: 360K (807c6000 - 80820000) procd: Console is alive procd: - preinit - mounting /dev/root procd: - early - procd: - ubus - procd: - init - Please press Enter to activate this console. bridge: Successed to create netlink socket liblog: module license 'unspecified' taints kernel. Disabling lock debugging due to kernel taint reloadprofile() begin reloadprofile() end reloadconfig() begin get_upgrade_level() begin /tmp/default-config/config/upgrade: No such file or directory ============> upgrade_level = 0 get_upgrade_level() end get_upgrade_level() begin /tmp/user-config/config/upgrade: No such file or directory ============> upgrade_level = 0 get_upgrade_level() end !!!!===> not do resetandmergeconfig ..... reloadconfig() end user has set country device is not production models, do nothing!!! loadRepeaterProductInfo() end tplink: try to open! [GPIOD][gpio_create_ibus_thread:35]create ibus thread successfully 0: 0:FFFFFFD8:FFFFFFBA: 5:FFFFFF80 Raeth v3.1 (Tasklet) set CLK_CFG_0 = 0x40a00020!!!!!!!!!!!!!!!!!!1 phy_free_head is 0x6326000!!! phy_free_tail_phy is 0x6327ff0!!! txd_pool=a6328000 phy_txd_pool=06328000 ei_local->skb_free start address is 0x86eea6dc. free_txd: 06328010, ei_local->cpu_ptr: 06328000 POOL HEAD_PTR | DMA_PTR | CPU_PTR ----------------+---------+-------- 0xa6328000 0x06328000 0x06328000 phy_qrx_ring = 0x06323000, qrx_ring = 0xa6323000 phy_rx_ring0 = 0x06330000, rx_ring0 = 0xa6330000 MT7530 Reset Completed!! change HW-TRAP to 0x17ccf set LAN/WAN LLLLW GMAC1_MAC_ADRH -- : 0x0000b4b0 GMAC1_MAC_ADRL -- : 0x24029535 CDMA_CSG_CFG = 81000000 GDMA1_FWD_CFG = 20710000 ===>> br_fdb_change_mac_address:163 call fdb_insert ===>> fdb_create:549 mac:b4:b0:24:02:95:35 ===>> fdb_create:551 fdb.dst is set as null fdb_create:543 source is null device eth2 entered promiscuous mode br-lan: port 1(eth2) entered forwarding state br-lan: port 1(eth2) entered forwarding state ===>> fdb_insert:630 mac:b4:b0:24:02:95:35 ===>> fdb_insert:632 fdb.dst is null, skip and create again br-lan: adding interface eth2 with same address as a received packet tz isGMT-01:00 [SMARTIPD] [smartip_create_ibus_thread 40] create ibus thread successfully smartipd-----update address pool : start: 100 end: 199 gw_str:192.168.0.254, dns_str:192.168.0.254 [SMARTIPD] [smartip_generate_udhcpd_cfg 1908] smartip generate udhcpd conf read success. readcount = 0 [SMARTIPD] [smartip_start_process 740] smartipd start udhcpd........... [SMARTIPD] [onemesh_get_mesh_enable 952] Parse JSON failed! server: 192.168.0.100wifid[mtk_init_platform:6760]: mtk init platform start. wifid[wifi_create_ibus_thread:40]: Create ibus thread successfully [SMARTIPD] [smartip_receive_event 66] smartipd received action: 2 [SMARTIPD] [smartip_receive_event 119] in ibus action wifi: set prelink_status to FALSE wifid[wifi_exec_cmd:1930]: iwpriv apclii0 set DfsPrelink=0 wifid[wifi_get_production_models:462]: get char 0 wifid[wifi_exec_cmd:1930]: mkdir -p /tmp/wireless/ wifid[wifi_exec_cmd:1930]: cp /etc/wireless/2G_Profile.dat /tmp/wireless/2G_Profile.dat wifid[wifi_exec_cmd:1930]: cp /etc/wireless/5G_Profile.dat /tmp/wireless/5G_Profile.dat wifid[_init_config_file:2370]: ++++++++l_mtk.DFS_support = TRUE+++++++++ scanTime_2G:15 scanTime_5G:18 wifid[wifi_exec_cmd:1930]: wifi forcesetscantime 15 36 wifid[wifi_exec_cmd:1930]: switch_config.sh 1 [SMARTIPD] [smartip_get_wired_connect_status 505] parse file '/tmp/monitor_runtime_info' failed [SMARTIPD] [smartip_get_wired_cra0: ===> main_virtual_if_open onnect_status 50init l1profile with ra0 dev_idx 1 for index INDEX1 5] parse file '/profile_path=/tmp/wireless/2G_Profile.dat tmp/monitor_runtEEPROM_name=e2p ime_info' failedEEPROM_offset=0x0 [SMARTIPD] [smEEPROM_size=0x4000 artip_start_procmain_ifname=ra0 ess 749] smartipext_ifname=ra d start udhcpc..apcli_ifname=apcli ........ wifid[single_sku_path=/etc/wireless/RT2860AP/SingleSKU.dat wifi_exec_cmd:19bf_sku_path=/etc/wireless/RT2860AP/SingleSKU_BF.dat 30]: ifconfig raload l1profile succeed! 0 up [DHCPC] stdriver_own()::Try to Clear FW Own... art udhcpc......... driver_own()::Success to clear FW Own UserCfgInit 1609 Clear ApCliAutoConnectRunning. [DHCPC] Sending UserCfgInit 1609 Clear ApCliAutoConnectRunning. discover...at nuUserCfgInit:1963 pAd->ed_sta_threshold = 1, pAd->ed_ap_threshold = 1 mber 0 [DHCPC] RtmpOSFileOpen(): Error 2 opening /etc/Wireless/iNIC/iNIC_ap_5G.dat Sending discoverOpen file "/etc/Wireless/iNIC/iNIC_ap_5G.dat" failed! ...at Unicast E2pAccessMode=2 SSID[0]=Marcin-Office-24, EdcaIdx=0 SSID[1]=, EdcaIdx=0 DBDC Mode=0, eDBDC_mode = 0 BSS0 PhyMode=14 wmode_band_equal(): Band Equal! [TxPower] BAND0: 100 [PERCENTAGEenable] BAND0: 1 FragThreshold[0]=2346 pAd->ed_sta_threshold = 2 read_etxbf: ETxBfEnCond = 1 read_etxbf: BSSID[0] read_etxbf: MBSS[0] ETxBfEnCond = 1 read_etxbf: More BSSID[1] read_etxbf: More MBSS[1] ETxBfEnCond = 1 [RTMPSetProfileParameters]Disable DFS/Zero wait=0/0 HT: WDEV[0] Ext Channel = ABOVE HT: greenap_cap = 0 WtcSetMaxStaNum: BssidNum:2, MaxStaNum:123 (WdsNum:0, ApcliNum:2, MaxNumChipRept:32), MinMcastWcid:124 Top Init Done! Use alloc_skb RX[0] DESC a6da8000 size = 16384 RX[1] DESC a6dac000 size = 8192 cut_through_init(): ct sw token number = 4095 cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096 cut_through_token_list_init(): 86348588,86348588 cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096 cut_through_token_list_init(): 86348598,86348598 Hif Init Done! ctl->txq = c0b5bdd8 ctl->rxq = c0b5bde4 ctl->ackq = c0b5bdf0 ctl->kickq = c0b5bdfc ctl->tx_doneq = c0b5be08 ctl->rx_doneq = c0b5be14 ====>[debug]ctrl_fw_state_v2: target_stage = 1 ====>[debug]ctrl_fw_state_v2: sucess, target stage = 1, current sync CR = 1 Parsing patch header Built date: 20200525111720a Platform: ALPS HW/SW version: 0x8a108a10 Patch version: 0x00000010 Target address: 0x80000, length: 11072 patch is not ready && get semaphore success EventGenericEventHandler: CMD Success MtCmdPatchFinishReq EventGenericEventHandler: CMD Success release patch semaphore WfMcuHwInit: Before NICLoadFirmware, check ICapMode = 0 ====>[debug]ctrl_fw_state_v2: target_stage = 1 ====>[debug]ctrl_fw_state_v2: sucess, target stage = 1, current sync CR = 1 Parsing CPU 0 fw tailer Chip ID: 0x04 Eco version: 0x00 Region number: 0x00 Format version: 0x00 Ram version: _reserved_ Built date: 20200525112406

[ 0.000000] Linux version 5.10.109 (<- REMOVED ->) (mipsel-openwrt-linux-musl-gcc (OpenWrt GCC 11.2.0 r19208-30614c6cfa) 11.2.0, GNU ld (GNU Binutils) 2.37) #0 SMP Thu Apr 7 17:48:28 2022 [ 0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3 [ 0.000000] printk: bootconsole [early0] enabled [ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc) [ 0.000000] MIPS: machine is TP-Link RE650 v2 [ 0.000000] Initrd not found or empty - disabling initrd [ 0.000000] VPE topology {2,2} total 4 [ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. [ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes [ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. [ 0.000000] Zone ranges: [ 0.000000] Normal [mem 0x0000000000000000-0x0000000007ffffff] [ 0.000000] HighMem empty [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000000000000-0x0000000007ffffff] [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff] [ 0.000000] On node 0 totalpages: 32768 [ 0.000000] Normal zone: 288 pages used for memmap [ 0.000000] Normal zone: 0 pages reserved [ 0.000000] Normal zone: 32768 pages, LIFO batch:7 [ 0.000000] percpu: Embedded 15 pages/cpu s30096 r8192 d23152 u61440 [ 0.000000] pcpu-alloc: s30096 r8192 d23152 u61440 alloc=15*4096 [ 0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 32480 [ 0.000000] Kernel command line: console=ttyS0,57600 rootfstype=squashfs,jffs2 [ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes, linear) [ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes, linear) [ 0.000000] Writing ErrCtl register=00030000 [ 0.000000] Readback ErrCtl register=00030000 [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off [ 0.000000] Memory: 119288K/131072K available (6706K kernel code, 620K rwdata, 1360K rodata, 1284K init, 235K bss, 11784K reserved, 0K cma-reserved, 0K highmem) [ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 [ 0.000000] rcu: Hierarchical RCU implementation. [ 0.000000] Tracing variant of Tasks RCU enabled. [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies. [ 0.000000] NR_IRQS: 256 [ 0.000000] random: get_random_bytes called from start_kernel+0x3cc/0x5e4 with crng_init=0 [ 0.000000] CPU Clock: 880MHz [ 0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns [ 0.000012] sched_clock: 64 bits at 880MHz, resolution 1ns, wraps every 4398046511103ns [ 0.015858] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4343773742 ns [ 0.033727] Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688) [ 0.106057] pid_max: default: 32768 minimum: 301 [ 0.115370] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.129775] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.147803] rcu: Hierarchical SRCU implementation. [ 0.157577] dyndbg: Ignore empty _ddebug table in a CONFIG_DYNAMIC_DEBUG_CORE build [ 0.173061] smp: Bringing up secondary CPUs ... [ 0.182626] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. [ 0.182636] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes [ 0.182648] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. [ 0.182769] CPU1 revision is: 0001992f (MIPS 1004Kc) [ 0.242975] Synchronize counters for CPU 1: done. [ 0.304934] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. [ 0.304943] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes [ 0.304950] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. [ 0.304996] CPU2 revision is: 0001992f (MIPS 1004Kc) [ 0.363928] Synchronize counters for CPU 2: done. [ 0.424136] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. [ 0.424145] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes [ 0.424152] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. [ 0.424203] CPU3 revision is: 0001992f (MIPS 1004Kc) [ 0.483497] Synchronize counters for CPU 3: done. [ 0.543104] smp: Brought up 1 node, 4 CPUs [ 0.555402] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.574901] futex hash table entries: 1024 (order: 3, 32768 bytes, linear) [ 0.588727] pinctrl core: initialized pinctrl subsystem [ 0.600773] NET: Registered protocol family 16 [ 0.611948] cpuidle: using governor teo [ 0.635559] FPU Affinity set after 11720 emulations [ 0.640226] random: fast init done [ 0.661615] clocksource: Switched to clocksource GIC [ 0.673572] NET: Registered protocol family 2 [ 0.682378] IP idents hash table entries: 2048 (order: 2, 16384 bytes, linear) [ 0.697262] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes, linear) [ 0.713819] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.728973] TCP bind hash table entries: 1024 (order: 1, 8192 bytes, linear) [ 0.742972] TCP: Hash tables configured (established 1024 bind 1024) [ 0.755699] UDP hash table entries: 256 (order: 1, 8192 bytes, linear) [ 0.768579] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear) [ 0.782610] NET: Registered protocol family 1 [ 0.791147] PCI: CLS 0 bytes, default 32 [ 0.801324] workingset: timestamp_bits=14 max_order=15 bucket_order=1 [ 0.818167] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.829649] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc. [ 0.851381] mt7621_gpio 1e000600.gpio: registering 32 gpios [ 0.862909] mt7621_gpio 1e000600.gpio: registering 32 gpios [ 0.874247] mt7621_gpio 1e000600.gpio: registering 32 gpios [ 0.886225] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled [ 0.900339] printk: console [ttyS0] disabled [ 0.908821] 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 19, base_baud = 3125000) is a 16550A [ 0.926731] printk: console [ttyS0] enabled [ 0.943272] printk: bootconsole [early0] disabled [ 0.964765] spi-mt7621 1e000b00.spi: sys_freq: 220000000 [ 0.977078] spi-nor spi0.0: en25qh64 (8192 Kbytes) [ 0.986828] 4 fixed-partitions partitions found on MTD device spi0.0 [ 0.999484] Creating 4 MTD partitions on "spi0.0": [ 1.009027] 0x000000000000-0x000000020000 : "u-boot" [ 1.020014] 0x000000020000-0x0000007c0000 : "firmware" [ 1.031411] 2 tplink-fw partitions found on MTD device firmware [ 1.043240] Creating 2 MTD partitions on "firmware": [ 1.053132] 0x000000000000-0x00000029f161 : "kernel" [ 1.063012] mtd: partition "kernel" doesn't end on an erase/write block -- force read-only [ 1.080328] 0x00000029f161-0x0000007a0000 : "rootfs" [ 1.090256] mtd: partition "rootfs" doesn't start on an erase/write block boundary -- force read-only [ 1.109455] mtd: device 3 (rootfs) set to be root filesystem [ 1.120915] 1 squashfs-split partitions found on MTD device rootfs [ 1.133283] 0x000000680000-0x0000007a0000 : "rootfs_data" [ 1.144962] 0x0000007c0000-0x0000007ed440 : "config" [ 1.155881] 0x0000007f0000-0x000000800000 : "radio" [ 1.213604] mt7530 mdio-bus:1f: MT7530 adapts as multi-chip module [ 1.228503] mtk_soc_eth 1e100000.ethernet: generated random MAC address 8a:19:14:1e:ea:f5 [ 1.245710] mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 21 [ 1.263544] i2c /dev entries driver [ 1.273011] mt7621-pci 1e140000.pcie: host bridge /pcie@1e140000 ranges: [ 1.286437] mt7621-pci 1e140000.pcie: No bus range found for /pcie@1e140000, using [bus 00-ff] [ 1.303978] mt7621-pci 1e140000.pcie: MEM 0x0060000000..0x006fffffff -> 0x0000000000 [ 1.320278] mt7621-pci 1e140000.pcie: IO 0x001e160000..0x001e16ffff -> 0x0000000000 [ 1.336669] mt7621-pci 1e140000.pcie: Parsing DT failed [ 1.349331] NET: Registered protocol family 10 [ 1.359610] Segment Routing with IPv6 [ 1.367060] NET: Registered protocol family 17 [ 1.376300] 8021q: 802.1Q VLAN Support v1.8 [ 1.387878] mt7530 mdio-bus:1f: MT7530 adapts as multi-chip module [ 1.420756] mt7530 mdio-bus:1f lan (uninitialized): PHY [mt7530-0:00] driver [MediaTek MT7530 PHY] (irq=26) [ 1.445080] mt7530 mdio-bus:1f: configuring for fixed/rgmii link mode [ 1.461904] DSA: tree 0 setup [ 1.468117] rt2880-pinmux pinctrl: pcie is already enabled [ 1.479125] mt7621-pci 1e140000.pcie: host bridge /pcie@1e140000 ranges: [ 1.492488] mt7621-pci 1e140000.pcie: No bus range found for /pcie@1e140000, using [bus 00-ff] [ 1.510008] mt7621-pci 1e140000.pcie: MEM 0x0060000000..0x006fffffff -> 0x0000000000 [ 1.526314] mt7621-pci 1e140000.pcie: IO 0x001e160000..0x001e16ffff -> 0x0000000000 [ 1.542690] mt7621-pci-phy 1e149000.pcie-phy: PHY for 0xbe149000 (dual port = 1) [ 1.557763] mt7621-pci-phy 1e14a000.pcie-phy: PHY for 0xbe14a000 (dual port = 0) [ 1.572760] mt7621-pci 1e140000.pcie: failed to parse bus ranges property: -22 [ 1.687339] mt7621-pci-phy 1e149000.pcie-phy: Xtal is 40MHz [ 1.698453] mt7621-pci-phy 1e14a000.pcie-phy: Xtal is 40MHz [ 1.809695] mt7621-pci 1e140000.pcie: pcie2 no card, disable it (RST & CLK) [ 1.823569] mt7621-pci 1e140000.pcie: PCIE0 enabled [ 1.833279] mt7621-pci 1e140000.pcie: PCIE1 enabled [ 1.842995] mt7621-pci 1e140000.pcie: PCI coherence region base: 0x60000000, mask/settings: 0xf0000002 [ 1.861719] mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00 [ 1.874390] pci_bus 0000:00: root bus resource [io 0x1e160000-0x1e16ffff] [ 1.888092] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff] [ 1.901787] pci_bus 0000:00: root bus resource [bus 00-ff] [ 1.912714] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff] (bus address [0x00000000-0x0fffffff]) [ 1.933020] pci 0000:00:00.0: [0e8d:0801] type 01 class 0x060400 [ 1.945005] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x7fffffff] [ 1.957486] pci 0000:00:00.0: reg 0x14: [mem 0x60400000-0x6040ffff] [ 1.970028] pci 0000:00:00.0: supports D1 [ 1.978012] pci 0000:00:00.0: PME# supported from D0 D1 D3hot [ 1.990114] pci 0000:00:01.0: [0e8d:0801] type 01 class 0x060400 [ 2.002130] pci 0000:00:01.0: reg 0x10: [mem 0x00000000-0x7fffffff] [ 2.014614] pci 0000:00:01.0: reg 0x14: [mem 0x60410000-0x6041ffff] [ 2.027149] pci 0000:00:01.0: supports D1 [ 2.035132] pci 0000:00:01.0: PME# supported from D0 D1 D3hot [ 2.048378] pci 0000:01:00.0: [14c3:7615] type 00 class 0x000280 [ 2.060401] pci 0000:01:00.0: reg 0x10: initial BAR value 0x00000000 invalid [ 2.074456] pci 0000:01:00.0: reg 0x10: [mem size 0x00100000 64bit] [ 2.087102] pci 0000:01:00.0: 2.000 Gb/s available PCIe bandwidth, limited by 2.5 GT/s PCIe x1 link at 0000:00:00.0 (capable of 4.000 Gb/s with 5.0 GT/s PCIe x1 link) [ 2.118316] pci 0000:00:00.0: PCI bridge to [bus 01-ff] [ 2.128753] pci 0000:00:00.0: bridge window [io 0x0000-0x0fff] [ 2.140894] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff] [ 2.154417] pci 0000:00:00.0: bridge window [mem 0x60100000-0x601fffff pref] [ 2.168802] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 [ 2.182216] pci 0000:02:00.0: [14c3:7615] type 00 class 0x000280 [ 2.194232] pci 0000:02:00.0: reg 0x10: initial BAR value 0x00000000 invalid [ 2.208274] pci 0000:02:00.0: reg 0x10: [mem size 0x00100000 64bit] [ 2.220935] pci 0000:02:00.0: 2.000 Gb/s available PCIe bandwidth, limited by 2.5 GT/s PCIe x1 link at 0000:00:01.0 (capable of 4.000 Gb/s with 5.0 GT/s PCIe x1 link) [ 2.252241] pci 0000:00:01.0: PCI bridge to [bus 02-ff] [ 2.262670] pci 0000:00:01.0: bridge window [io 0x0000-0x0fff] [ 2.274804] pci 0000:00:01.0: bridge window [mem 0x60200000-0x602fffff] [ 2.288321] pci 0000:00:01.0: bridge window [mem 0x60300000-0x603fffff pref] [ 2.302710] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 02 [ 2.315937] pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000] [ 2.329106] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000] [ 2.342974] pci 0000:00:01.0: BAR 0: no space for [mem size 0x80000000] [ 2.356143] pci 0000:00:01.0: BAR 0: failed to assign [mem size 0x80000000] [ 2.370013] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff] [ 2.383542] pci 0000:00:00.0: BAR 9: assigned [mem 0x60100000-0x601fffff pref] [ 2.397923] pci 0000:00:01.0: BAR 8: assigned [mem 0x60200000-0x602fffff] [ 2.411442] pci 0000:00:01.0: BAR 9: assigned [mem 0x60300000-0x603fffff pref] [ 2.425829] pci 0000:00:00.0: BAR 1: assigned [mem 0x60400000-0x6040ffff] [ 2.439352] pci 0000:00:01.0: BAR 1: assigned [mem 0x60410000-0x6041ffff] [ 2.452883] pci 0000:00:00.0: BAR 7: assigned [io 0x1e160000-0x1e160fff] [ 2.466401] pci 0000:00:01.0: BAR 7: assigned [io 0x1e161000-0x1e161fff] [ 2.479925] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit] [ 2.494498] pci 0000:00:00.0: PCI bridge to [bus 01] [ 2.504386] pci 0000:00:00.0: bridge window [io 0x1e160000-0x1e160fff] [ 2.517909] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff] [ 2.531425] pci 0000:00:00.0: bridge window [mem 0x60100000-0x601fffff pref] [ 2.545816] pci 0000:02:00.0: BAR 0: assigned [mem 0x60200000-0x602fffff 64bit] [ 2.560378] pci 0000:00:01.0: PCI bridge to [bus 02] [ 2.570263] pci 0000:00:01.0: bridge window [io 0x1e161000-0x1e161fff] [ 2.583790] pci 0000:00:01.0: bridge window [mem 0x60200000-0x602fffff] [ 2.597305] pci 0000:00:01.0: bridge window [mem 0x60300000-0x603fffff pref] [ 2.619501] VFS: Mounted root (squashfs filesystem) readonly on device 31:3. [ 2.637593] Freeing unused kernel memory: 1284K [ 2.646674] This architecture does not have kernel memory protection. [ 2.659523] Run /sbin/init as init process [ 2.667675] with arguments: [ 2.667681] /sbin/init [ 2.667686] with environment: [ 2.667691] HOME=/ [ 2.667696] TERM=linux [ 2.668116] mt7530 mdio-bus:1f: Link is Up - 1Gbps/Full - flow control rx/tx [ 3.271509] init: Console is alive [ 3.278762] init: - watchdog - [ 4.002757] kmodloader: loading kernel modules from /etc/modules-boot.d/* [ 4.100720] kmodloader: done loading kernel modules from /etc/modules-boot.d/* [ 4.121992] init: - preinit - [ 5.065815] random: jshn: uninitialized urandom read (4 bytes read) [ 5.148316] random: jshn: uninitialized urandom read (4 bytes read) [ 5.192239] random: jshn: uninitialized urandom read (4 bytes read) [ 5.460728] mtk_soc_eth 1e100000.ethernet eth0: configuring for fixed/rgmii link mode [ 5.476855] mtk_soc_eth 1e100000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx [ 5.482136] mt7530 mdio-bus:1f lan: configuring for phy/gmii link mode [ 5.507052] 8021q: adding VLAN 0 to HW filter on device lan [ 5.521272] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [ 9.002221] mt7530 mdio-bus:1f lan: Link is Up - 1Gbps/Full - flow control rx/tx [ 9.017008] IPv6: ADDRCONF(NETDEV_CHANGE): lan: link becomes ready [ 9.682009] random: crng init done [ 9.688808] random: 7 urandom warning(s) missed due to ratelimiting [ 9.796547] jffs2: notice: (506) jffs2_build_xattr_subsystem: complete building xattr subsystem, 18 of xdatum (16 unchecked, 2 orphan) and 23 of xref (2 dead, 0 orphan) found. [ 9.830120] mount_root: switching to jffs2 overlay [ 9.851001] overlayfs: upper fs does not support tmpfile. [ 9.943160] urandom-seed: Seeding 4096 bits and crediting [ 9.960005] urandom-seed: Saving 4096 bits of creditable seed for next boot [ 9.990176] mt7530 mdio-bus:1f lan: Link is Down [ 10.010024] procd: - early - [ 10.016163] procd: - watchdog - [ 10.651847] procd: - watchdog - [ 10.659453] procd: - ubus - [ 10.746374] procd: - init - [ 11.498600] kmodloader: loading kernel modules from /etc/modules.d/* [ 11.761192] urngd: v1.0.2 started. [ 11.800482] Loading modules backported from Linux version v5.15.8-0-g43e577d7a2cb [ 11.815426] Backport generated by backports.git v5.15.8-1-0-g83f664bb [ 11.976320] mt7621-pci 1e140000.pcie: bus=1 slot=0 irq=22 [ 11.987132] pci 0000:00:00.0: enabling device (0006 -> 0007) [ 11.998418] mt7615e 0000:01:00.0: enabling device (0000 -> 0002) [ 12.026017] ieee80211 phy0: Selected rate control algorithm 'minstrel_ht' [ 12.031303] mt7621-pci 1e140000.pcie: bus=2 slot=1 irq=23 [ 12.042300] pci 0000:00:01.0: enabling device (0006 -> 0007) [ 12.053678] mt7615e 0000:02:00.0: enabling device (0000 -> 0002) [ 12.078624] ieee80211 phy1: Selected rate control algorithm 'minstrel_ht' [ 12.133520] PPP generic driver version 2.4.2 [ 12.145453] NET: Registered protocol family 24 [ 12.167387] kmodloader: done loading kernel modules from /etc/modules.d/* [ 12.265353] mt7615e 0000:02:00.0: HW/SW Version: 0x8a108a10, Build Time: 20180518100604a [ 12.265353] [ 12.265368] mt7615e 0000:01:00.0: HW/SW Version: 0x8a108a10, Build Time: 20180518100604a [ 12.265368] [ 12.567813] mt7615e 0000:01:00.0: N9 Firmware Version: _reserved_, Build Time: 20200814163649 [ 12.584978] mt7615e 0000:02:00.0: N9 Firmware Version: _reserved_, Build Time: 20200814163649 [ 12.742700] mt7615e 0000:01:00.0: CR4 Firmware Version: _reserved_, Build Time: 20190121161307 [ 12.742715] mt7615e 0000:02:00.0: CR4 Firmware Version: _reserved_, Build Time: 20190121161307 [ 20.255616] mtk_soc_eth 1e100000.ethernet eth0: Link is Down [ 20.285116] mtk_soc_eth 1e100000.ethernet eth0: configuring for fixed/rgmii link mode [ 20.301343] mtk_soc_eth 1e100000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx [ 20.321011] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [ 20.335076] mt7530 mdio-bus:1f lan: configuring for phy/gmii link mode [ 20.349526] 8021q: adding VLAN 0 to HW filter on device lan [ 20.366079] br-lan: port 1(lan) entered blocking state [ 20.376589] br-lan: port 1(lan) entered disabled state [ 20.388017] device lan entered promiscuous mode [ 20.397144] device eth0 entered promiscuous mode [ 23.057157] mt7530 mdio-bus:1f lan: Link is Up - 1Gbps/Full - flow control rx/tx [ 24.127365] br-lan: port 1(lan) entered blocking state [ 24.137653] br-lan: port 1(lan) entered forwarding state [ 24.149715] IPv6: ADDRCONF(NETDEV_CHANGE): br-lan: link becomes ready [ 24.164554] br-lan: port 2(wlan1) entered blocking state [ 24.175259] br-lan: port 2(wlan1) entered disabled state [ 24.186482] device wlan1 entered promiscuous mode [ 25.211258] IPv6: ADDRCONF(NETDEV_CHANGE): wlan1: link becomes ready [ 25.224319] br-lan: port 2(wlan1) entered blocking state [ 25.234979] br-lan: port 2(wlan1) entered forwarding state [ 26.744720] br-lan: port 3(wlan0) entered blocking state [ 26.755343] br-lan: port 3(wlan0) entered disabled state [ 26.766394] device wlan0 entered promiscuous mode [ 26.776214] br-lan: port 3(wlan0) entered blocking state [ 26.786961] br-lan: port 3(wlan0) entered forwarding state [ 26.798435] br-lan: port 3(wlan0) entered disabled state


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  • Last modified: 2022/05/08 14:17
  • by nicarim