NETGEAR R6700 v2
This is a dual band 802.11ac AC1750 gigabit wireless router. There are three detachable antennas and a USB3 port.
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<WRAP>that encloses it.
Keep the articles modular
- Please include only model specific information, omit bla,bla and put everything generic into separate articles
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- base-system should lead the way, do not explain this again
- DO NOT provide a complete howto here! Instead groom the general documentation.
Supported Versions
Hardware Highlights
Installation
→ Install OpenWrt (generic explanation)
As of OpenWrt V23.05.0, the factory image installs and appears to work with no apparent issues when loaded using the Netgear GUI. There is a warning in the stock GUI after selecting the OpenWrt factory image, which displays V1.1.0.32, being older than the existing Netgear firmware (V1.2.0.16) in this case.
Installing the sysupgrade and upgrading to V23.05.2 installs and functions with no apparent issues.
Wireless performance substantially meets the test environment's available bandwidth of 200\20.
Flash Layout
Find out flash layout, then add the flash layout table here (copy, paste, modify the example).
Please check out the article Flash layout. It contains examples and explanations that describe how to document the flash layout.
OEM easy installation
The instructions below are for Broadcom devices and only serve as an example.
Remove / modify them if they do not apply to this particular device!
This section deals with
- How you install OpenWrt from a device freshly opened
- The steps required such as reset to factory defaults if the device has already been configured
Note: Reset router to factory defaults if it has been previously configured.
- Browse to
http://192.168.1.1/Upgrade.asp - Upload .bin file to router
- Wait for it to reboot
- Telnet to 192.168.1.1 and set a root password, or browse to
http://192.168.1.1if LuCI is installed.
OEM installation using the TFTP method
Specific values needed for tftp
Enter values for “FILL-IN” below
| Bootloader tftp server IPv4 address | FILL-IN |
|---|---|
| Bootloader MAC address (special) | FILL-IN |
| Firmware tftp image | Latest OpenWrt release (NOTE: Name must contain “tftp”) |
| TFTP transfer window | FILL-IN seconds |
| TFTP window start | approximately FILL-IN seconds after power on |
| TFTP client required IP address | FILL-IN |
Upgrading OpenWrt
The sysupgrade using LuCi from V23.05.0 to V23.05.2 installs and functions with no apparent issues.
LuCI Web Upgrade Process
- Browse to
http://192.168.1.1/cgi-bin/luci/mini/system/upgrade/LuCI Upgrade URL - Upload image file for sysupgrade to LuCI
- Wait for reboot
Terminal Upgrade Process
If you don't have a GUI (LuCI) available, you can alternatively upgrade via the command line. There are two command line methods for upgrading:
sysupgrademtd
Note: It is important that you put the firmware image into the ramdisk (/tmp) before you start flashing.
sysupgrade
- Login as root via SSH on 192.168.1.1, then enter the following commands:
cd /tmp wget http://downloads.openwrt.org/snapshots/trunk/XXX/xxx.abc sysupgrade /tmp/xxx.abc
mtd
If sysupgrade does not support this router, use mtd.
- Login as root via SSH on 192.168.1.1, then enter the following commands:
cd /tmp wget http://downloads.openwrt.org/snapshots/trunk/XXX/xxx.abc mtd write /tmp/xxx.abc linux && reboot
Debricking
Failsafe mode
Basic configuration
→ Basic configuration After flashing, proceed with this.
Set up your Internet connection, configure wireless, configure USB port, etc.
Specific Configuration
Please fill in real values for this device, then remove the EXAMPLEs
Network interfaces
The default network configuration is:
| Interface Name | Description | Default configuration |
|---|---|---|
| br-lan | EXAMPLE LAN & WiFi | EXAMPLE 192.168.1.1/24 |
| vlan0 (eth0.0) | EXAMPLE LAN ports (1 to 4) | EXAMPLE None |
| vlan1 (eth0.1) | EXAMPLE WAN port | EXAMPLE DHCP |
| wl0 | EXAMPLE WiFi | EXAMPLE Disabled |
Switch Ports (for VLANs)
Please fill in real values for this device, then remove the EXAMPLEs
Numbers 0-3 are Ports 1-4 as labeled on the unit, number 4 is the Internet (WAN) on the unit, 5 is the internal connection to the router itself. Don't be fooled: Port 1 on the unit is number 3 when configuring VLANs. vlan0 = eth0.0, vlan1 = eth0.1 and so on.
| Port | Switch port |
|---|---|
| Internet (WAN) | EXAMPLE 4 |
| LAN 1 | EXAMPLE 3 |
| LAN 2 | EXAMPLE 2 |
| LAN 3 | EXAMPLE 1 |
| LAN 4 | EXAMPLE 0 |
Buttons
→ hardware.button on howto use and configure the hardware button(s). Here, we merely name the buttons, so we can use them in the above Howto.
Please fill in real values for this device, then remove the EXAMPLEs
The NETGEAR R6700 has the following buttons:
| BUTTON | Event |
|---|---|
| EXAMPLE Reset | reset |
| EXAMPLE Secure Easy Setup | ses |
| EXAMPLE No buttons at all. | - |
Hardware
Info
Photos
Front:
Insert photo of front of the casing
Back:
Insert photo of back of the casing
Backside label:
Insert photo of backside label
Opening the case
There are 4 screws under the rubber feet and one screw just below the center. After removing the screws, the top panel will come off easily.
Main PCB:
Serial
→ port.serial general information about the serial port, serial port cable, etc.
How to connect to the Serial Port of this specific device:
| Serial connection parameters for NETGEAR R6700 v2 | 57600, 8N1 |
|---|
JTAG
→ port.jtag general information about the JTAG port, JTAG cable, etc.
How to connect to the JTAG Port of this specific device:
Insert photo of PCB with markings for JTAG port
Bootloader mods
Hardware mods
None so far.
Bootlogs
OEM bootlog
===================================================================
MT7621 stage1 code Mar 12 2015 14:42:52 (ASIC)
CPU=50000000 HZ BUS=16666666 HZ
==================================================================
Change MPLL source from XTAL to CR...
do MEMPLL setting..
MEMPLL Config : 0x11100000
3PLL mode + External loopback
=== XTAL-40Mhz === DDR-1200Mhz ===
PLL3 FB_DL: 0x7, 1/0 = 523/501 1D000000
PLL2 FB_DL: 0x12, 1/0 = 726/298 49000000
PLL4 FB_DL: 0x12, 1/0 = 631/393 49000000
do DDR setting..[00320381]
Apply DDR3 Setting...(use customer AC)
0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120
--------------------------------------------------------------------------------
0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000E:| 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1
000F:| 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1
0010:| 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0
0011:| 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0
0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
DRAMC_DQSCTL1[0e0]=14000000
DRAMC_DQSGCTL[124]=80000000
rank 0 coarse = 16
rank 0 fine = 40
B:| 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0
opt_dle value:9
DRAMC_DDR2CTL[07c]=C287221D
DRAMC_PADCTL4[0e4]=000022B3
DRAMC_DQIDLY1[210]=0A0D080F
DRAMC_DQIDLY2[214]=040E060D
DRAMC_DQIDLY3[218]=0A020700
DRAMC_DQIDLY4[21c]=09010903
DRAMC_R0DELDLY[018]=00001F22
==================================================================
RX DQS perbit delay software calibration
==================================================================
1.0-15 bit dq delay value
==================================================================
bit| 0 1 2 3 4 5 6 7 8 9
--------------------------------------
0 | 13 3 12 6 13 3 13 3 0 6
10 | 1 9 3 9 1 8
--------------------------------------
==================================================================
2.dqs window
x=pass dqs delay value (min~max)center
y=0-7bit DQ of every group
input delay:DQS0 =34 DQS1 = 31
==================================================================
bit DQS0 bit DQS1
0 (1~64)32 8 (4~59)31
1 (1~58)29 9 (1~59)30
2 (2~64)33 10 (1~59)30
3 (1~60)30 11 (1~59)30
4 (3~66)34 12 (1~62)31
5 (1~62)31 13 (1~62)31
6 (1~65)33 14 (1~62)31
7 (1~66)33 15 (1~60)30
==================================================================
3.dq delay value last
==================================================================
bit| 0 1 2 3 4 5 6 7 8 9
--------------------------------------
0 | 15 8 13 10 13 6 14 4 0 7
10 | 2 10 3 9 1 9
==================================================================
==================================================================
TX perbyte calibration
==================================================================
DQS loop = 15, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1
dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2
DQ loop=15, cmp_err_1 = ffff01aa
DQ loop=14, cmp_err_1 = ffff00a0
dqs_perbyte_dly.last_dqdly_pass[1]=14, finish count=1
DQ loop=13, cmp_err_1 = ffff00a0
DQ loop=12, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqdly_pass[0]=12, finish count=2
byte:0, (DQS,DQ)=(9,8)
byte:1, (DQS,DQ)=(8,8)
DRAMC_DQODLY1[200]=88888888
DRAMC_DQODLY2[204]=88888888
20,data:89
[EMI] DRAMC calibration passed
===================================================================
MT7621 stage1 code done
CPU=50000000 HZ BUS=16666666 HZ
===================================================================
U-Boot 1.1.3 (Jul 26 2016 - 00:50:05)
Board: Ralink APSoC DRAM: 256 MB
relocate_code Pointer at: 8ff34000
Config XHCI 40M PLL
Software System Reset Occurred
Allocate 16 byte aligned buffer: 8ff7cd70
Enable NFI Clock
# MTK NAND # : Use HW ECC
NAND ID [C2 F1 80 95 02]
Device not found, ID: c2f1
Not Support this Device!
chip_mode=00000001
Support this Device in MTK table! c2f1
select_chip
[NAND]select ecc bit:4, sparesize :64 spare_per_sector=16
Signature matched and data read!
load_fact_bbt success 1023
load fact bbt success
[mtk_nand] probe successfully!
mtd→writesize=2048 mtd→oobsize=64, mtd→erasesize=131072 devinfo.iowidth=8
.*** Warning - bad CRC, using default environment
============================================
Ralink UBoot Version: 4.3.0.0
--------------------------------------------
ASIC MT7621A DualCore (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection
DRAM_TYPE: DDR3
DRAM bus: 16 bit
Xtal Mode=3 OCP Ratio=1/3
Flash component: NAND Flash
Date:Jul 26 2016 Time:00:50:05
============================================
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:256, ways:4, linesz:32 ,total:32768
##### The CPU freq = 880 MHZ ####
estimate memory size =256 Mbytes
reset PHY
#Reset_MT7530
SC_DEBUG: Nand Partition Table Magic Found at 100000.
..
Please choose the operation:
1: Load system code to SDRAM via TFTP.
2: Load system code then write to Flash via TFTP.
3: Boot system code via Flash (default).
4: Entr boot command line interface.
9: Load Boot Loader code then write to Flash via TFTP.
You choosed 4
0
4: System Enter Boot Command Line Interface.
U-Boot 1.1.3 (Jul 26 2016 - 00:50:05)
MT7621 #
OpenWrt bootlog
COPY HERE THE BOOTLOG ONCE OPENWRT IS INSTALLED AND RUNNING
Notes
Space for additional notes, links to forum threads or other resources.
- ...
Tags
Add tags below, then remove this fixme.