Mikrotik RouterBoard RB2011-UiAS-2HnD-IN

The RB2011-UiAS-2HnD-IN differs from its predecessor RB2011-UAS-2HnD-IN supposedly only by supporting Mikrotik passive PoE on ETH10, but it is also identified to the OpenWrt linux kernel as a new model (2011r5 instead of 2011G) which is why it is not recognized by older OpenWrt kernels that do recognize the RB2011-UAS-2HnD-IN. The -IN refers to the indoor enclosure. The routerboard is also available without enclosure as RB2011-UiAS-2HnD.

ModelVersionSoCCPU MHzFlash MBRAM MBWLAN HardwareWLAN2.4WLAN5.0100M portsGbit portsModemUSB
RB2011UiAS-2HnD-INr2Atheros AR9344600128NAND128Atheros AR9344b/g/n-55-1x 2.0
Architecture MIPS
Vendor MikroTik
Bootloader RouterBOOT
System-On-Chip AR9344 SoC
CPU Speed 600 MHz - can be overclocked from boot monitor
Flash size 128 MiB NAND Flash
RAM 128 MiB DDR2
Wireless AR9380 802.11b/g/n dual chain (on SoC)
Ethernet AR8327 - 5x 10/100/1000MBit/s BASE-T* + 1x SFP (separate chip)
AR8227 - 5x 10/100MBit/s BASE-T (on SoC)
USB 1x 2.0 micro (host/device, OTG cable included)
Serial CISCO/Lantronix pinout RJ45 console port.
JTAG no?
other 2“ color touch display

FIXME vendor supplied hardware diagram

Register layout AR9344 - Atheros Datasheet AR8327 - Atheros Datasheet

31 TX_INVERT - Decides whether to select the inversion of the GTX clock after the delay line
30 GIGE_QUAD - Decides whether to allow a 2 ns shift (clock in the middle of a data transfer) to the GTX clock. This bit is only effective when bit 25 is set
29:28 RX_DELAY - The delay buffers in the Rx clock path to adjust against the edge/middle- aligned RGMII inputs
27:26 TX_DELAY - Delay line for the GTX clock that goes along with the data
25 GIGE - Set only after a 1000 Mbps connection has been negotiated
24 OFFSET_PHASE - Used to select if the start is from the positive or negative phase (or whether to have a 180 degree change in addition to the phase-delay in [11:8].
0x6f: 30 29    27 26 25 24
0x3e:    29 28 27 26 25

* rb2011

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  • Last modified: 2021/02/27 18:05
  • by danijeltudek