ASUS RT-AC53
OpenWrt support
Not supported.
Hardware
Info
Serial
The serial is populated and labeled using 115200 8N1
Bootlogs
OEM Bootlog
U-Boot 1.1.7 (Sep 8 2016 - 17:31:38) RT-AC53 bootloader version: 1.0.0.2 Board: Ralink APSoC DRAM: 64 MB ASUS RT-AC53 gpio init : wps / reset pin / reset switch pin enable ephy clock...done. rf reg 29 = 5 SSC enabled. swing=5000, upperbound=0 Ralink SPI flash driver, SPI clock: 48MHz spi device id: c8 40 17 c8 40 (4017c840) find flash: 25Q64BSIG raspi_read: from:30000 len:1000 Maximum malloc length: 1024 KBytes mem_malloc_start/brk/end: 0x83e97000/83e99000/83f98000 *** Warning - bad CRC, using default environment ============================================ Ralink UBoot Version: 4.3.0.0 -------------------------------------------- ASIC 7620_MP (Port5<->GigaSW) DRAM component: 512 Mbits DDR, width 16 DRAM bus: 16 bit Total memory: 64 MBytes Flash component: SPI Flash Date:Sep 8 2016 Time:17:31:38 ============================================ icache: sets:512, ways:4, linesz:32 ,total:65536 dcache: sets:256, ways:4, linesz:32 ,total:32768 Please choose the operation: 0: Load System code then write to Flash via Serial. 1: Load System code to SDRAM via TFTP. 2: Load System code then write to Flash via TFTP. 3: Boot System code via Flash (default). 4: Entr boot command line interface. 5: Load Boot Loader code to SDRAM via Serial. 7: Load Boot Loader code then write to Flash via Serial. 8: Load Boot Loader code to SDRAM via TFTP. 9: Load Boot Loader code then write to Flash via TFTP. 0 early Realtek giga Mac support... 0x88a8,0x88a8,0x88a8, rtk_switch_init(): return 0 rtk_port_macForceLinkExt_set(EXT_PORT_1): return 0 rtk_port_macForceLinkExt_set(EXT_PORT_2): return 0 input_txDelay:1, input_rxDelay:2 rtk_port_rgmiiDelayExt_set(EXT_PORT_1): return 0 rtk_port_rgmiiDelayExt_set(EXT_PORT_2): return 0 ** rtk_port_phyReg_get(0) = 00001140 powerOn(0) ** rtk_port_phyReg_get(1) = 00001140 powerOn(0) ** rtk_port_phyReg_get(2) = 00001140 powerOn(0) ** rtk_port_phyReg_get(3) = 00001140 powerOn(0) ** rtk_port_phyReg_get(4) = 00001140 powerOn(0) rtk_port_isolation_set(0, 00000040) return 0 rtk_port_isolation_set(1, 00000040) return 0 rtk_port_isolation_set(2, 00000040) return 0 rtk_port_isolation_set(3, 00000040) return 0 rtk_port_isolation_set(4, 00000040) return 0 rtk_port_isolation_set(RTK_EXT_1_MAC, 0000009f) return 0 rtk_port_isolation_set(RTK_EXT_2_MAC, 00000040) return 0 rtl8367r_switch_init_pre() return 0 3: System Boot System code via Flash. raspi_read: from:4018a len:4 RT-AC53 bootloader version: 1.0.0.2 raspi_read: from:40004 len:6 MAC Address: 60:45:CB:93:69:68 raspi_read: from:40004 len:6 ## Checking 1st firmware at bc050000 ... raspi_read: from:50000 len:40 Image Name: Image Type: MIPS Linux Kernel Image (lzma compressed) Data Size: 7559200 Bytes = 7.2 MB Load Address: 80000000 Entry Point: 8000c150 raspi_read: from:50040 len:735820 Verifying Checksum ... OK Uncompressing Kernel Image ... OK ## Giving linux ramsize: 67108864 (64 MB) Starting kernel ... 怘�������fff��~��~fx������怘�怘�f����f����f�f���Linux version 2.6.36 (root@asus) (gcc version 4.6.3 (Buildroot 2012.11.1) ) #1 Wed Jan 9 09:36:53 CST 2019 The CPU feqenuce set to 580 MHz PCIE: bypass PCIe DLL. PCIE: Elastic buffer control: Addr:0x68 -> 0xB4 disable all power about PCIe CPU revision is: 00019650 (MIPS 24Kc) Software DMA cache coherency Determined physical RAM map: memory: 04000000 @ 00000000 (usable) Initrd not found or empty - disabling initrd Zone PFN ranges: Normal 0x00000000 -> 0x00004000 Movable zone start PFN for each node early_node_map[1] active PFN ranges 0: 0x00000000 -> 0x00004000 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 16256 Kernel command line: console=ttyS1,115200n8 root=/dev/mtdblock4 rootfstype=squashfs console=ttyS1,57600 root=/dev/mtdblock4 rootfstype=squashfs,noinitrd PID hash table entries: 256 (order: -2, 1024 bytes) Dentry cache hash table entries: 8192 (order: 3, 32768 bytes) Inode-cache hash table entries: 4096 (order: 2, 16384 bytes) Primary instruction cache 64kB, VIPT, , 4-waylinesize 32 bytes. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes Writing ErrCtl register=0004dfbf Readback ErrCtl register=0004dfbf Memory: 61724k/65536k available (2447k kernel code, 3812k reserved, 392k data, 164k init, 0k highmem) SLUB: Genslabs=7, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 NR_IRQS:128 console [ttyS1] enabled Calibrating delay loop... 386.04 BogoMIPS (lpj=772096) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 512 NET: Registered protocol family 16 RALINK_GPIOMODE = a301d RALINK_GPIOMODE = 8301d PPLL_CFG1=0xe74000 MT7620 PPLL lock PPLL_DRV =0x80080504 start PCIe register access RALINK_RSTCTRL = 2400000 RALINK_CLKCFG1 = 75afffc0 *************** MT7620 PCIe RC mode ************* PCIE0 enabled Port 0 N_FTS = 1b105000 init_rt2880pci done bio: create slab <bio-0> at 0 pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000) pci 0000:00:00.0: BAR 8: assigned [mem 0x20000000-0x201fffff] pci 0000:00:00.0: BAR 1: assigned [mem 0x20200000-0x2020ffff] pci 0000:00:00.0: BAR 1: set to [mem 0x20200000-0x2020ffff] (PCI address [0x20200000-0x2020ffff] pci 0000:01:00.0: BAR 0: assigned [mem 0x20000000-0x200fffff] pci 0000:01:00.0: BAR 0: set to [mem 0x20000000-0x200fffff] (PCI address [0x20000000-0x200fffff] pci 0000:01:00.1: BAR 0: assigned [mem 0x20100000-0x201fffff] pci 0000:01:00.1: BAR 0: set to [mem 0x20100000-0x201fffff] (PCI address [0x20100000-0x201fffff] pci 0000:00:00.0: PCI bridge to [bus 01-01] pci 0000:00:00.0: bridge window [io disabled] pci 0000:00:00.0: bridge window [mem 0x20000000-0x201fffff] pci 0000:00:00.0: bridge window [mem pref disabled] BAR0 at slot 0 = 0 bus=0x0, slot = 0x0 res[0]->start = 0 res[0]->end = 0 res[1]->start = 20200000 res[1]->end = 2020ffff res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 bus=0x1, slot = 0x0 res[0]->start = 20000000 res[0]->end = 200fffff res[1]->start = 0 res[1]->end = 0 res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 bus=0x1, slot = 0x0 res[0]->start = 20100000 res[0]->end = 201fffff res[1]->start = 0 res[1]->end = 0 res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 Switching to clocksource MIPS NET: Registered protocol family 2 IP route cache hash table entries: 1024 (order: 0, 4096 bytes) TCP established hash table entries: 2048 (order: 2, 16384 bytes) TCP bind hash table entries: 2048 (order: 1, 8192 bytes) TCP: Hash tables configured (established 2048 bind 2048) TCP reno registered UDP hash table entries: 256 (order: 0, 4096 bytes) UDP-Lite hash table entries: 256 (order: 0, 4096 bytes) NET: Registered protocol family 1 Load Ralink Timer0 Module Load Ralink Timer1 Module squashfs: version 4.0 (2009/01/31) Phillip Lougher msgmni has been set to 120 Block layer SCSI generic (bsg) driver version 0.4 loaded (major 254) io scheduler noop registered (default) Ralink gpio driver initialized rtk_switch_init() return 0 rtk_port_macForceLinkExt_set(EXT_PORT:1): return 0 rtk_port_macForceLinkExt_set(EXT_PORT:2): return 0 rtk_port_macForceLinkExt_set(EXT_PORT:2, MODE:0): return 0 power down all ports org EXT_PORT:1 txDelay: 1, rxDelay: 2 org EXT_PORT:2 txDelay: 1, rxDelay: 2 new EXT_PORT:1 txDelay: 1, rxDelay: 0 new EXT_PORT:2 txDelay: 1, rxDelay: 2 rtk_led_enable_set(LED_GROUP_0...): return 0 rtk_led_enable_set(LED_GROUP_1...): return 0 rtk_led_enable_set(LED_GROUP_2...): return 0 rtk_led_operation_set(): return 0 rtk_led_groupConfig_set(LED_GROUP_0...): return 0 rtk_led_groupConfig_set(LED_GROUP_1...): return 0 rtk_led_groupConfig_set(LED_GROUP_2...): return 0 rtk_led_modeForce_set(LED_GROUP_0...): return 0 rtk_led_modeForce_set(LED_GROUP_1...): return 0 rtk_led_modeForce_set(LED_GROUP_2...): return 0 current led blinkRate: 0 rtk_switch_maxPktLen_get(): return 0 current rtk_switch_maxPktLen: 3 rtk_switch_maxPktLen_set(): return 0 rtk_switch_greenEthernet_get(): return 0 current rtk_switch_greenEthernet state: 1 rtk_switch_greenEthernet_set(): return 0 rtk_vlan_init(): return 0 rtk_filter_igrAcl_init(): return 0 wan_stb_x 0 STB,LAN/WAN ports mask 0x000,058/041 rtl8367rb driver initialized Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled serial8250: ttyS0 at MMIO 0x10000500 (irq = 37) is a 16550A serial8250: ttyS1 at MMIO 0x10000c00 (irq = 12) is a 16550A brd: module loaded deice id : c8 40 17 c8 40 (4017c840) 25Q64BSIG(c8 4017c840) (8192 Kbytes) mtd .name = raspi, .size = 0x00800000 (0M) .erasesize = 0x00000008 (0K) .numeraseregions = 65536 partion 3: ffffffff 7b0000 partion 4: 144840 6bb7c0 #add mtd partition# Creating 6 MTD partitions on "raspi": 0x000000000000-0x000000030000 : "Bootloader" 0x000000030000-0x000000040000 : "nvram" 0x000000040000-0x000000050000 : "Factory" 0x000000050000-0x000000800000 : "linux" 0x000000144840-0x000000800000 : "rootfs" 0x000000000000-0x000000800000 : "ALL" rdm_major = 253 SMACCR1 -- : 0x00006045 SMACCR0 -- : 0xcb936968 Ralink APSoC Ethernet Driver Initilization. v3.1 512 rx/tx descriptors allocated, mtu = 1500! SMACCR1 -- : 0x00006045 SMACCR0 -- : 0xcb936968 PROC INIT OK! PPP generic driver version 2.4.2 PPP Deflate Compression module registered PPP MPPE Compression module registered NET: Registered protocol family 24 PPTP driver version 0.8.5 IMQ driver loaded successfully. Hooking IMQ before NAT on PREROUTING. Hooking IMQ after NAT on POSTROUTING. u32 classifier nf_conntrack version 0.5.0 (964 buckets, 3856 max) matchsize=264 xt_time: kernel timezone is -0000 GRE over IPv4 demultiplexor driver gre: can't add protocol ip_tables: (C) 2000-2006 Netfilter Core Team, Type=Linux arp_tables: (C) 2002 David S. Miller TCP cubic registered NET: Registered protocol family 10 ip6_tables: (C) 2000-2006 Netfilter Core Team NET: Registered protocol family 17 L2TP core driver, V2.0 PPPoL2TP kernel driver, V2.0 802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com> All bugs added by David S. Miller <davem@redhat.com> VFS: Mounted root (squashfs filesystem) readonly on device 31:4. Freeing unused kernel memory: 164k freed offset 0x6000 elapse 0ms 1: set_action 0 Hit ENTER for console... firmware version: 3.0.0.4.380_10760-g21a5898 mtd productid: RT-AC53 bootloader version: RT-AC53-01-00-00-02 firmware version: 3.0.0.4 odmpid: RT-AC53 current FW productid: RT-AC53 current FW firmver: 3.0.0.4 clean_mode(1) clean_time(2) threshold(0) free_caches: Start syncing... free_caches: Start cleaning... free_caches: waiting 2 second... free_caches: Finish. [1 init:init_nvram +9] init_nvram for model(64) set_basic_ifname_vars: WAN vlan2 LAN vlan1 2G ra0 5G rai0 USB NULL AP_LAN vlan1 DW_WAN (null) DW_LAN vlan3 force_dwlan 0, sw_mode 1 wan_ifnames: vlan2 num_of_mssid_support(0x0093): [mssid] support [3] mssid config_switch(0x014a): link down all ports power down all ports Algorithmics/MIPS FPU Emulator v1.5 LAN: P1,P2,P3,P4 WAN: P0 wan_stb_x 0 STB,LAN/WAN ports mask 0x000,058/041 mtkswitch!!!=0 mt7620_vlan_set: idx=1, vid=2, portmap=00000111, stag=0 config_switch(0x0184): ISP Profile/STB: none/0 set unknown unicast strom control rate as: 20 set unknown multicast strom control rate as: 20 set multicast strom control rate as: 20 set broadcast strom control rate as: 20 config_switch(0x0389): link up wan port(s) rt2860v2_ap: module license 'Proprietary' taints kernel. Disabling lock debugging due to kernel taint rt2860v2: === pAd = c04b7000, size = 1080216 === <-- RTMPAllocTxRxRingMemory, Status=0 <-- RTMPAllocAdapterBlock, Status=0 rt2860v2:AP Driver version-2.7.2.0_edcca_monitor_20131222 hotplug net INTERFACE=ra0 ACTION=add MT7610ap:register rtpci MT7610ap: === pAd = c0a82000, size = 1920128 === <-- RTMPAllocTxRxRingMemory, Status=0 <-- RTMPAllocAdapterBlock, Status=0 MT7610ap:pAd->CSRBaseAddress =0xc0980000, csr_addr=0xc0980000! MT7610ap:device_id =0x7650 MT7610ap:==>MT76x0_WLAN_ChipOnOff(): OnOff:1, pAd->WlanFunCtrl:0x0, Reg-WlanFunCtrl=0xff000002 MT7610ap:MACVersion = 0x76502000 hotplug net INTERFACE=rai0 ACTION=add start_logger: )ifconfig: name=Raeth v3.1 (eth2 flags=1043 TaskletIFUP addr=(null),SkbRecycle netmask=(null) phy_tx_ring = 0x02ae6000, tx_ring = 0xa2ae6000 phy_rx_ring0 = 0x02aec000, rx_ring0 = 0xa2aec000 SMACCR1 -- : 0x00006045 SMACCR0 -- : 0xcb936968 ESW: Link Status Changed - Port5 Link UP CDMA_CSG_CFG = 81000000 GDMA1_FWD_CFG = 20710000 hotplug net INTERFACE=vlan1 ACTION=add hotplug net INTERFACE=vlan2 ACTION=add update_lan_state(lan_, 0, 0) start_lan: setting up the bridge br0 _ifconfig: name=vlan1 flags=1243 IFUP addr=(null) netmask=(null) start_lan: setting MAC of br0 bridge to 60:45:CB:93:69:68 gen ralink config warning: 50!!!!rt2860v2:RX DESC a3ff7000 size = 2048 Miss some configuration, please check!!!! _ifconfig: name=ra0rt2860v2:check_runtime_para 555: reg_spec - CE flags=1243 IFUPrt2860v2:check_runtime_para 563: don't need to check runtime para addr=(null) netmask=(null) hotplug net INTERFACE=br0 ACTION=add rt2860v2:APSDCapable[0]=1 rt2860v2:APSDCapable[1]=1 rt2860v2:APSDCapable[2]=1 rt2860v2:APSDCapable[3]=1 rt2860v2:APSDCapable[4]=1 rt2860v2:APSDCapable[5]=1 rt2860v2:APSDCapable[6]=1 rt2860v2:APSDCapable[7]=1 rt2860v2:APSDCapable[8]=1 rt2860v2:APSDCapable[9]=1 rt2860v2:APSDCapable[10]=1 rt2860v2:APSDCapable[11]=1 rt2860v2:APSDCapable[12]=1 rt2860v2:APSDCapable[13]=1 rt2860v2:APSDCapable[14]=1 rt2860v2:APSDCapable[15]=1 rt2860v2:default ApCliAPSDCapable[0]=1 rt2860v2:pAd->ed_chk = 1 rt2860v2:Key1Str is Invalid key length(0) or Type(0) rt2860v2:Key2Str is Invalid key length(0) or Type(0) rt2860v2:Key3Str is Invalid key length(0) or Type(0) rt2860v2:Key4Str is Invalid key length(0) or Type(0) start ch = 1, ch->num = 2 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 start ch = 3, ch->num = 9 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 start ch = 12, ch->num = 2 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 start ch = 14, ch->num = 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 rt2860v2:RTMPSetDefaultChannel() : default channel to 1 rt2860v2:1. Phy Mode = 9 rt2860v2:2. Phy Mode = 9 rt2860v2:E2PROM: D0 target power=0xff28 rt2860v2:E2PROM: 40 MW Power Delta= 1 rt2860v2:3. Phy Mode = 9 rt2860v2:AntCfgInit: primary/secondary ant 0/1 rt2860v2:Initialize RF Central Registers for E2 !!! rt2860v2:Initialize RF Central Registers for E3 !!! rt2860v2:Initialize RF Channel Registers for E2 !!! rt2860v2:Initialize RF Channel Registers for E3 !!! rt2860v2:Initialize RF DCCal Registers for E2 !!! rt2860v2:Initialize RF DCCal Registers for E3 !!! rt2860v2:Change as GPIO Mode(0x18141d) rt2860v2:D1 = 0, D2 = 10, CalCode = 23 !!! rt2860v2:RT6352_Temperature_Init : BBPR49 = 0x0 rt2860v2:RT6352_Temperature_Init : TemperatureRef25C = 0xfffffff6 rt2860v2:Current Temperature from BBP_R49=0xfffffff7 rt2860v2:RT6352_TssiTableAdjust: upper_bound = 0x7F decimal: 127 rt2860v2:RT6352_TssiTableAdjust: lower_bound = 0xFFFFFF80 decimal: -128 rt2860v2:*** RT6352_TssiTableAdjust: G Tssi[-7 .. +7] = -128 -128 -128 -128 -37 -26 -16 - 0 - 16 26 33 127 127 127 127, offset=-10, tuning=1 rt2860v2:RT6352_TssiTableAdjust: G Tssi[-7 .. +7] = -128 -128 -128 -128 -47 -36 -26 - -10 - 6 16 23 117 117 117 117, offset=-10, tuning=1 rt2860v2:mp_temperature=0xfffffffe, step = +0 rt2860v2:E2PROM: G Tssi[-7 .. +7] = -128 -128 -128 -128 -47 -36 -26 - -10 - 6 16 23 117 117 117 117, offset=-10, tuning=1 rt2860v2: TX BW Filter Calibration !!! rt2860v2: RX BW Filter Calibration !!! rt2860v2:LOFT Calibration Done! rt2860v2:IQCalibration Start! rt2860v2:IQCalibration Done! CH = 0, (gain= 0, phase=3e) rt2860v2:IQCalibration Start! rt2860v2:IQCalibration Done! CH = 1, (gain= 0, phase=3e) rt2860v2:TX IQ Calibration Done! rt2860v2:Change as Normal Mode(0x8141d) rt2860v2:After Change, now GPIO_MODE value is 0x8141d rt2860v2:RT6352_Init_ExtPA_ExtLNA: Enable Ext-PA. init MAC rt2860v2:RT6352_Init_ExtPA_ExtLNA: Enable Ext-LNA. rt2860v2:RT6352_Init_ExtPA_ExtLNA: Enable Ext-PA. rt2860v2:RT6352_Init_ExtPA_ExtLNA: Init Ext-LNA BBP. rt2860v2:RT6352_Init_ExtPA_ExtLNA: Init Ext-PA MAC. rt2860v2:bAutoTxAgcG = 1 rt2860v2:MCS Set = ff ff 00 00 01 rt2860v2:SYNC - BBP R4 to 20MHz.l ch1 bssid=58:23:8c:04:0c:fe ch1 bssid=78:81:02:ef:59:dc ch1 bssid=e2:88:5d:e6:8c:4b ch1 bssid=e0:88:5d:e6:df:20 ch1 bssid=e2:88:5d:e6:df:22 ch1 bssid=20:2b:c1:ea:3d:55 ch6 bssid=fa:8f:ca:90:d7:bd ch6 bssid=fc:94:e3:11:62:63 ch6 bssid=fc:94:e3:12:37:93 ch6 bssid=cc:03:fa:e4:88:30 ch6 bssid=b4:2a:0e:4a:c0:ab ch6 bssid=b6:2a:0e:4a:c0:ad ch6 bssid=34:31:c4:0c:e4:45 ch11 bssid=ae:cd:6b:e6:0b:ad ch11 bssid=34:31:c4:62:f6:01 ch11 bssid=f0:9f:c2:a4:e5:76 ch11 bssid=fe:b4:e6:ad:a4:8e ch11 bssid=5c:f4:ab:a7:d9:fc ch11 bssid=9a:9f:57:b1:ec:15 ===================================================== Channel 1 : Dirty = 420, False CCA = 0, Busy Time = 12849, Skip Channel = FALSE Channel 2 : Dirty = 332, False CCA = 0, Busy Time = 255, Skip Channel = FALSE Channel 3 : Dirty = 336, False CCA = 0, Busy Time = 2095, Skip Channel = FALSE Channel 4 : Dirty = 340, False CCA = 0, Busy Time = 1061, Skip Channel = FALSE Channel 5 : Dirty = 344, False CCA = 0, Busy Time = 629, Skip Channel = FALSE Channel 6 : Dirty = 490, False CCA = 0, Busy Time = 13001, Skip Channel = FALSE Channel 7 : Dirty = 344, False CCA = 0, Busy Time = 850, Skip Channel = FALSE Channel 8 : Dirty = 340, False CCA = 0, Busy Time = 656, Skip Channel = FALSE Channel 9 : Dirty = 336, False CCA = 0, Busy Time = 742, Skip Channel = FALSE Channel 10 : Dirty = 332, False CCA = 0, Busy Time = 7564, Skip Channel = FALSE Channel 11 : Dirty = 420, False CCA = 0, Busy Time = 21598, Skip Channel = FALSE Channel 12 : Dirty = 192, False CCA = 0, Busy Time = 3753, Skip Channel = FALSE Channel 13 : Dirty = 168, False CCA = 0, Busy Time = 611, Skip Channel = FALSE ===================================================== Rule 1 CCA value : Min Dirtiness (Include extension channel) ==> Select Channel 13 Min Dirty = 504 ExChannel = 9 , 0 BW = 40 rt2860v2:SYNC - BBP R4 to 20MHz.l rt2860v2:SYNC - BBP R4 to 20MHz.l rt2860v2:SYNC - BBP R4 to 20MHz.l rt2860v2:SYNC - BBP R4 to 20MHz.l rt2860v2:SYNC - BBP R4 to 20MHz.l rt2860v2:SYNC - BBP R4 to 20MHz.l rt2860v2:SYNC - BBP R4 to 20MHz.l rt2860v2:SYNC - BBP R4 to 20MHz.l rt2860v2:@@@ ed_monitor_init : ===> rt2860v2:@@@ ed_monitor_init : <=== rt2860v2:Main bssid = 60:45:cb:93:69:68 <==== rt28xx_init, Status=0 0x1300 = 00064300 rt2860v2:@@@ ed_monitor_init : ===> rt2860v2:@@@ ed_monitor_init : <=== hotplug net INTERFACE=apcli0 ACTION=add hotplug net INTERFACE=wds2 ACTION=add hotplug net INTERFACE=wds1 ACTION=add hotplug net INTERFACE=wds0 ACTION=add [doSystem] iwpriv ra0 set TxPower=100 hotplug net INTERFACE=wds3 ACTION=add gen ralink iNIC config warning: 50!!!! Miss some configuration, please check!!!! _ifconfig: name=rai0 flags=1243 IFUP addr=(null) netmask=(null) load fw spent 16ms MT7610ap:RX DESC a2c70000 size = 2048 MT7610ap:RX1 DESC a2c71000 size = 2048 mtd_local_read: cal_part [Factory] from 248 lend 4 retlen 4 MT7610ap:check_runtime_para 539: reg_spec - CE MT7610ap:check_runtime_para 547: don't need to check runtime para MT7610ap:cfg_mode=14 MT7610ap:cfg_mode=14 MT7610ap:wmode_band_equal(): Band Not Equal! MT7610ap:APSDCapable[0]=1 MT7610ap:APSDCapable[1]=1 MT7610ap:APSDCapable[2]=1 MT7610ap:APSDCapable[3]=1 MT7610ap:APSDCapable[4]=1 MT7610ap:APSDCapable[5]=1 MT7610ap:APSDCapable[6]=1 MT7610ap:APSDCapable[7]=1 MT7610ap:APSDCapable[8]=1 MT7610ap:APSDCapable[9]=1 MT7610ap:APSDCapable[10]=1 MT7610ap:APSDCapable[11]=1 MT7610ap:APSDCapable[12]=1 MT7610ap:APSDCapable[13]=1 MT7610ap:APSDCapable[14]=1 MT7610ap:APSDCapable[15]=1 MT7610ap:default ApCliAPSDCapable[0]=1 MT7610ap:default ApCliAPSDCapable[1]=1 MT7610ap:pAd->ed_chk = 1 MT7610ap:Key1Str is Invalid key length(0) or Type(0) MT7610ap:Key2Str is Invalid key length(0) or Type(0) MT7610ap:Key3Str is Invalid key length(0) or Type(0) MT7610ap:Key4Str is Invalid key length(0) or Type(0) start ch = 36, ch->num = 1 0 0 0 0 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 42 42 42 42 42 42 38 38 42 42 42 42 42 42 38 38 40 40 40 40 40 40 38 38 36 36 start ch = 38, ch->num = 1 0 0 0 0 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 42 42 42 42 42 42 38 38 42 42 42 42 42 42 38 38 40 40 40 40 40 40 38 38 36 36 start ch = 40, ch->num = 1 0 0 0 0 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 42 42 42 42 42 42 38 38 42 42 42 42 42 42 38 38 40 40 40 40 40 40 38 38 36 36 start ch = 42, ch->num = 1 0 0 0 0 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 42 42 42 42 42 42 38 38 42 42 42 42 42 42 38 38 40 40 40 40 40 40 38 38 36 36 start ch = 44, ch->num = 1 0 0 0 0 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 42 42 42 42 42 42 38 38 42 42 42 42 42 42 38 38 40 40 40 40 40 40 38 38 36 36 start ch = 46, ch->num = 1 0 0 0 0 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 42 42 42 42 42 42 38 38 42 42 42 42 42 42 38 38 40 40 40 40 40 40 38 38 36 36 start ch = 48, ch->num = 1 0 0 0 0 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 42 42 42 42 42 42 38 38 42 42 42 42 42 42 38 38 40 40 40 40 40 40 38 38 36 36 start ch = 52, ch->num = 1 0 0 0 0 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 42 42 42 42 42 42 38 38 42 42 42 42 42 42 38 38 40 40 40 40 40 40 38 38 36 36 start ch = 54, ch->num = 1 0 0 0 0 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 42 42 42 42 42 42 38 38 42 42 42 42 42 42 38 38 40 40 40 40 40 40 38 38 36 36 start ch = 56, ch->num = 1 0 0 0 0 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 42 42 42 42 42 42 38 38 42 42 42 42 42 42 38 38 40 40 40 40 40 40 38 38 36 36 start ch = 58, ch->num = 1 0 0 0 0 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 42 42 42 42 42 42 38 38 42 42 42 42 42 42 38 38 40 40 40 40 40 40 38 38 36 36 start ch = 60, ch->num = 1 0 0 0 0 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 42 42 42 42 42 42 38 38 42 42 42 42 42 42 38 38 40 40 40 40 40 40 38 38 36 36 start ch = 62, ch->num = 1 0 0 0 0 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 42 42 42 42 42 42 38 38 42 42 42 42 42 42 38 38 40 40 40 40 40 40 38 38 36 36 start ch = 64, ch->num = 1 0 0 0 0 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 42 42 42 42 42 42 38 38 42 42 42 42 42 42 38 38 40 40 40 40 40 40 38 38 36 36 start ch = 100, ch->num = 1 0 0 0 0 44 44 44 44 44 44 40 40 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 42 42 42 42 42 42 38 38 36 36 start ch = 102, ch->num = 1 0 0 0 0 44 44 44 44 44 44 40 40 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 42 42 42 42 42 42 38 38 36 36 start ch = 104, ch->num = 1 0 0 0 0 44 44 44 44 44 44 40 40 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 42 42 42 42 42 42 38 38 36 36 start ch = 106, ch->num = 1 0 0 0 0 44 44 44 44 44 44 40 40 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 42 42 42 42 42 42 38 38 36 36 start ch = 108, ch->num = 1 0 0 0 0 44 44 44 44 44 44 40 40 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 42 42 42 42 42 42 38 38 36 36 start ch = 110, ch->num = 1 0 0 0 0 44 44 44 44 44 44 40 40 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 42 42 42 42 42 42 38 38 36 36 start ch = 112, ch->num = 1 0 0 0 0 44 44 44 44 44 44 40 40 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 42 42 42 42 42 42 38 38 36 36 start ch = 116, ch->num = 1 0 0 0 0 44 44 44 44 44 44 40 40 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 42 42 42 42 42 42 38 38 36 36 start ch = 118, ch->num = 1 0 0 0 0 44 44 44 44 44 44 40 40 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 42 42 42 42 42 42 38 38 36 36 start ch = 120, ch->num = 1 0 0 0 0 44 44 44 44 44 44 40 40 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 42 42 42 42 42 42 38 38 36 36 start ch = 122, ch->num = 1 0 0 0 0 44 44 44 44 44 44 40 40 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 42 42 42 42 42 42 38 38 36 36 start ch = 124, ch->num = 1 0 0 0 0 44 44 44 44 44 44 40 40 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 42 42 42 42 42 42 38 38 36 36 start ch = 126, ch->num = 1 0 0 0 0 44 44 44 44 44 44 40 40 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 42 42 42 42 42 42 38 38 36 36 start ch = 128, ch->num = 1 0 0 0 0 44 44 44 44 44 44 40 40 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 42 42 42 42 42 42 38 38 36 36 start ch = 132, ch->num = 1 0 0 0 0 44 44 44 44 44 44 40 40 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 42 42 42 42 42 42 38 38 36 36 start ch = 134, ch->num = 1 0 0 0 0 44 44 44 44 44 44 40 40 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 42 42 42 42 42 42 38 38 36 36 start ch = 136, ch->num = 1 0 0 0 0 44 44 44 44 44 44 40 40 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 42 42 42 42 42 42 38 38 36 36 start ch = 140, ch->num = 1 0 0 0 0 44 44 44 44 44 44 40 40 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 44 44 44 44 44 44 38 38 42 42 42 42 42 42 38 38 36 36 MT7610ap:1. Phy Mode = 49 MT7610ap:2. Phy Mode = 49 drivers/net/wireless/MT7610_ap/./chips/mt76x0.c:2419 assert (pAd->TxPower[choffset].Channel == 149)failed drivers/net/wireless/MT7610_ap/./chips/mt76x0.c:2436 assert (pAd->TxPower[choffset].Channel == 42)failed MT7610ap:ext_pa_current_setting = 1 MT7610ap:MT76x0_TssiTableAdjust: upper_bound = 0x7F decimal: 127 MT7610ap:MT76x0_TssiTableAdjust: lower_bound = 0xFFFFFF80 decimal: -128 MT7610ap:*** MT76x0_TssiTableAdjust: A Tssi[-7 .. +7] = -128 -128 -128 -128 -15 -9 -5 * 0 * 6 12 19 127 127 127 127, offset=-10, tuning=1 MT7610ap:MT76x0_TssiTableAdjust: A Tssi[-7 .. +7] = -128 -128 -128 -128 -25 -19 -15 * -10 * -4 2 9 117 117 117 117, offset=-10, tuning=1 MT7610ap:mp_temperature=0xfffffff6, step = +0 MT7610ap:MT76x0_TssiTableAdjust: upper_bound = 0x7F decimal: 127 MT7610ap:MT76x0_TssiTableAdjust: lower_bound = 0xFFFFFF80 decimal: -128 MT7610ap:*** MT76x0_TssiTableAdjust: A Tssi[-7 .. +7] = -128 -128 -128 -128 -15 -9 -5 * -10 * 6 12 19 127 127 127 127, offset=-10, tuning=1 MT7610ap:MT76x0_TssiTableAdjust: A Tssi[-7 .. +7] = -128 -128 -128 -128 -25 -19 -15 * -10 * -4 2 9 117 117 117 117, offset=-10, tuning=1 MT7610ap:mp_temperature=0xfffffff6, step = +0 MT7610ap:3. Phy Mode = 49 MT7610ap:AntCfgInit: primary/secondary ant 0/1 MT7610ap:ChipStructAssign(): RALINK6590 hook ! MT7610ap:bAutoTxAgcG = 1 MT7610ap:@@@ BuildChannel # 36 :: Pwr0 = 33, Pwr1 =0, Flags = c0, RemainingTimeForUse=0 MT7610ap:@@@ BuildChannel # 40 :: Pwr0 = 33, Pwr1 =0, Flags = c0, RemainingTimeForUse=0 MT7610ap:@@@ BuildChannel # 44 :: Pwr0 = 33, Pwr1 =0, Flags = c0, RemainingTimeForUse=0 MT7610ap:@@@ BuildChannel # 48 :: Pwr0 = 30, Pwr1 =0, Flags = c0, RemainingTimeForUse=0 MT7610ap:@@@ BuildChannel # 52 :: Pwr0 = 30, Pwr1 =0, Flags = c0, RemainingTimeForUse=0 MT7610ap:@@@ BuildChannel # 56 :: Pwr0 = 30, Pwr1 =0, Flags = c0, RemainingTimeForUse=0 MT7610ap:@@@ BuildChannel # 60 :: Pwr0 = 30, Pwr1 =0, Flags = c0, RemainingTimeForUse=0 MT7610ap:@@@ BuildChannel # 64 :: Pwr0 = 30, Pwr1 =0, Flags = c0, RemainingTimeForUse=0 MT7610ap:@@@ BuildChannel # 100 :: Pwr0 = 26, Pwr1 =0, Flags = c0, RemainingTimeForUse=0 MT7610ap:@@@ BuildChannel # 104 :: Pwr0 = 26, Pwr1 =0, Flags = c0, RemainingTimeForUse=0 MT7610ap:@@@ BuildChannel # 108 :: Pwr0 = 26, Pwr1 =0, Flags = c0, RemainingTimeForUse=0 MT7610ap:@@@ BuildChannel # 112 :: Pwr0 = 26, Pwr1 =0, Flags = c0, RemainingTimeForUse=0 MT7610ap:@@@ BuildChannel # 116 :: Pwr0 = 26, Pwr1 =0, Flags = c0, RemainingTimeForUse=0 MT7610ap:@@@ BuildChannel # 132 :: Pwr0 = 23, Pwr1 =0, Flags = 40, RemainingTimeForUse=0 MT7610ap:@@@ BuildChannel # 136 :: Pwr0 = 23, Pwr1 =0, Flags = 40, RemainingTimeForUse=0 MT7610ap:@@@ BuildChannel # 140 :: Pwr0 = 23, Pwr1 =0, Flags = 0, RemainingTimeForUse=0 MT7610ap:RTMPSetPhyMode: channel is out of range, use first channel=0 MT7610ap:MCS Set = ff 00 00 00 01 MT7610ap:MT76x0_ChipBBPAdjust():rf_bw=2, ext_ch=1, PrimCh=36, HT-CentCh=38, VHT-CentCh=42 MT7610ap: RXIQ Cal 2C70=[0] , RXBackup=[0] MT7610ap:APStartUp(): AP Set CentralFreq at 42(Prim=36, HT-CentCh=38, VHT-CentCh=42, BBP_BW=2) MT7610ap:LOG#0 60:45:cb:93:69:6c restart access point MT7610ap:@@@ ed_monitor_init : ===> MT7610ap:@@@ ed_monitor_init : <=== MT7610ap:Main bssid = 60:45:cb:93:69:6c <==== rt28xx_init, Status=0 hotplug net INTERFACE=apclii1 ACTION=add hotplug net INTERFACE=apclii0 ACTION=add hotplug net INTERFACE=wdsi3 ACTION=add hotplug net INTERFACE=wdsi2 ACTION=add hotplug net INTERFACE=wdsi0 ACTION=add hotplug net INTERFACE=wdsi1 ACTION=add MT7610ap: RXIQ Cal 2C70=[0] , RXBackup=[0] MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap:RXIQ cal idx[0]:cnt[1], MT7610ap:RXIQ cal idx[3]:cnt[5], MT7610ap: RXIQBackup = 3 MT7610ap: RXIQ Cal 2C70=[3] , RXBackup=[3] MT7610ap: RXIQ Cal 2C70=[3] , RXBackup=[3] MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap: RXIQ Cal 2C70=[3] , RXBackup=[3] MT7610ap: RXIQ Cal 2C70=[3] , RXBackup=[3] MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap: RXIQ Cal 2C70=[3] , RXBackup=[3] MT7610ap: RXIQ Cal 2C70=[3] , RXBackup=[3] MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap: RXIQ Cal 2C70=[3] , RXBackup=[3] MT7610ap:SYNC - BBP R4 to 20MHz.l MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap: RXIQ Cal 2C70=[4] , RXBackup=[3] MT7610ap: RXIQ Cal 2C70=[4] , RXBackup=[3] MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap: RXIQ Cal 2C70=[0] , RXBackup=[3] MT7610ap:RXIQ Cal use backup result [3]!! MT7610ap: RXIQ Cal 2C70=[3] , RXBackup=[3] MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap: RXIQ Cal 2C70=[4] , RXBackup=[3] MT7610ap: RXIQ Cal 2C70=[4] , RXBackup=[3] MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap: RXIQ Cal 2C70=[4] , RXBackup=[3] MT7610ap: RXIQ Cal 2C70=[4] , RXBackup=[3] MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap: RXIQ Cal 2C70=[4] , RXBackup=[3] MT7610ap: RXIQ Cal 2C70=[4] , RXBackup=[3] MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap: RXIQ Cal 2C70=[4] , RXBackup=[3] MT7610ap: RXIQ Cal 2C70=[4] , RXBackup=[3] MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap: RXIQ Cal 2C70=[4] , RXBackup=[3] MT7610ap: RXIQ Cal 2C70=[4] , RXBackup=[3] MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap: RXIQ Cal 2C70=[4] , RXBackup=[3] MT7610ap: RXIQ Cal 2C70=[4] , RXBackup=[3] MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap: RXIQ Cal 2C70=[0] , RXBackup=[3] MT7610ap:RXIQ Cal use backup result [3]!! MT7610ap: RXIQ Cal 2C70=[3] , RXBackup=[3] MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap: RXIQ Cal 2C70=[0] , RXBackup=[3] MT7610ap:RXIQ Cal use backup result [3]!! MT7610ap: RXIQ Cal 2C70=[3] , RXBackup=[3] MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap: RXIQ Cal 2C70=[0] , RXBackup=[3] MT7610ap:RXIQ Cal use backup result [3]!! MT7610ap: RXIQ Cal 2C70=[3] , RXBackup=[3] MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap: RXIQ Cal 2C70=[0] , RXBackup=[3] MT7610ap:RXIQ Cal use backup result [3]!! MT7610ap: RXIQ Cal 2C70=[3] , RXBackup=[3] MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap: RXIQ Cal 2C70=[0] , RXBackup=[3] MT7610ap:RXIQ Cal use backup result [3]!! MT7610ap: RXIQ Cal 2C70=[3] , RXBackup=[3] MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap: RXIQ Cal 2C70=[0] , RXBackup=[3] MT7610ap:RXIQ Cal use backup result [3]!! MT7610ap: RXIQ Cal 2C70=[3] , RXBackup=[3] MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap: RXIQ Cal 2C70=[0] , RXBackup=[3] MT7610ap:RXIQ Cal use backup result [3]!! MT7610ap: RXIQ Cal 2C70=[3] , RXBackup=[3] MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap: RXIQ Cal 2C70=[0] , RXBackup=[3] MT7610ap:RXIQ Cal use backup result [3]!! MT7610ap: RXIQ Cal 2C70=[3] , RXBackup=[3] ===================================================== Channel 36 : Dirty = 0, ApCnt=0, Busy Time = 131, Skip Channel = FALSE Channel 40 : Dirty = 0, ApCnt=0, Busy Time = 240, Skip Channel = FALSE Channel 44 : Dirty = 0, ApCnt=0, Busy Time = 83, Skip Channel = FALSE Channel 48 : Dirty = 0, ApCnt=0, Busy Time = 83, Skip Channel = FALSE Channel 52 : Dirty = 0, ApCnt=0, Busy Time = 83, Skip Channel = FALSE Channel 56 : Dirty = 0, ApCnt=0, Busy Time = 83, Skip Channel = FALSE Channel 60 : Dirty = 0, ApCnt=0, Busy Time = 83, Skip Channel = FALSE Channel 64 : Dirty = 0, ApCnt=0, Busy Time = 83, Skip Channel = FALSE Channel 100 : Dirty = 0, ApCnt=0, Busy Time = 83, Skip Channel = FALSE Channel 104 : Dirty = 0, ApCnt=0, Busy Time = 83, Skip Channel = FALSE Channel 108 : Dirty = 0, ApCnt=0, Busy Time = 83, Skip Channel = FALSE Channel 112 : Dirty = 0, ApCnt=0, Busy Time = 83, Skip Channel = FALSE Channel 116 : Dirty = 0, ApCnt=0, Busy Time = 83, Skip Channel = TRUE Channel 132 : Dirty = 0, ApCnt=0, Busy Time = 83, Skip Channel = TRUE Channel 136 : Dirty = 0, ApCnt=0, Busy Time = 83, Skip Channel = TRUE Channel 140 : Dirty = 0, ApCnt=0, Busy Time = 83, Skip Channel = TRUE ===================================================== Rule 1 APCnt : dirtiness == 0 (no one used and no interference) ==> Select Channel 36 MT7610ap:@@@ APStop: go to ed_monitor_exit()!! MT7610ap:@@@ ed_monitor_exit : ===> MT7610ap:@@@ ed_monitor_exit : <=== MT7610ap:MT76x0_ChipBBPAdjust():rf_bw=2, ext_ch=1, PrimCh=36, HT-CentCh=38, VHT-CentCh=42 MT7610ap: RXIQ Cal 2C70=[3] , RXBackup=[3] MT7610ap:APStartUp(): AP Set CentralFreq at 42(Prim=36, HT-CentCh=38, VHT-CentCh=42, BBP_BW=2) MT7610ap:LOG#1 60:45:cb:93:69:6c restart access point MT7610ap:FullCalibration(): docal = [0000] valid bit[0] MT7610ap: RXIQ Cal 2C70=[4] , RXBackup=[3] MT7610ap:@@@ ed_monitor_init : ===> MT7610ap:@@@ ed_monitor_init : <=== 0x1300 = 00064300 MT7610ap:RTMPDrvOpen(1):Check if PDMA is idle! MT7610ap:RTMPDrvOpen(2):Check if PDMA is idle! MT7610ap:@@@ ed_monitor_init : ===> MT7610ap:@@@ ed_monitor_init : <=== [doSystem] iwpriv rai0 set TxPower=100 _ifconfig: name=br0 flags=1243 IFUP addr=192.168.1.1 netmask=255.255.255.0 _ifconfig: name=lo flags=1043 IFUP addr=127.0.0.1 netmask=255.0.0.0 route_manip: cmd=ADD name=lo addr=127.0.0.0 netmask=255.0.0.0 gateway=0.0.0.0 metric=0 update_lan_state(lan_, 2, 0) nat_rule: stop_nat_rules 1. stop_nat_rules: apply the redirect_rules! start_lan 2160 MT7610ap:edcca_tx_stop_start():stop tx start_wsc_pin_enrollee: start wsc (0) [doSystem] iwpriv ra0 set WscConfMode=7 WPS: PIN [doSystem] iwpriv ra0 set WscMode=1 [1 init:start_dnsmasq +31] begin [1 init:stop_dnsmasq +31] begin # wanduck: Got LAN(-1) information: # Enable direct rule [1 init:stop_dnsmasq +31] end [1 init:start_dnsmasq +31] end start_lan_port(0) 1 decomp: fname=/var/lib/misc/rstats-speed.gz decomp: gzip -dc /var/lib/misc/rstats-speed.gz > /var/tmp/rstats-uncomp != 0 load: speed_count = 0 load: read source= save_path= load_history: fname=/var/lib/misc/rstats-history.gz decomp: fname=/var/lib/misc/rstats-history.gz [doSystem] iwpriv ra0 set WatchdogPid=202 decomp: gzip -dc /var/lib/mset watchdog pid as: 202 isc/rstats-history.gz > /var/tmp/rstats-uncomp != 0 decomp: fname=/var/lib/misc/rstats-history.gz decomp: gzip -dc /var/lib/misc/rstats-history.gz > /var/tmp/rstats-uncomp != 0 load_history: load failed MT7610ap:edcca_tx_stop_start():start tx [doSystem] iwpriv rai0 set WatchdogPid=202 set watchdog pid as: 202 TZ watchdog reinit_hwnat:WAN: unit -1,0 type 0 nat_x 1 qos 0: action 1. hwnat_wifi = 1 clean_mode(1) clean_time(2) threshold(0) free_caches: Start syncing... free_caches: Start cleaning... free_caches: waiting 2 second... free_caches: Finish. [1 init:init_main +36] recv signal 14 from pid [1:/sbin/init] (from user) MT7610ap:edcca_tx_stop_start():stop tx MT7610ap:edcca_tx_stop_start():start tx MT7610ap:edcca_tx_stop_start():stop tx MT7610ap:edcca_tx_stop_start():start tx MT7610ap:edcca_tx_stop_start():stop tx MT7610ap:edcca_tx_stop_start():start tx MT7610ap:edcca_tx_stop_start():stop tx MT7610ap:edcca_tx_stop_start():start tx