MediaTek / Ralink

  • A quite good source for product specs on MediaTek/Ralink SoCs seems to be here:
  • OpenWrt specific:
    • all MediaTek/Ralink SoCs are merged under the target ramips.
    • building a target requires a target-specific firmware (that is, most devices need customized firmware). The kernel is patched with the command line that has the board name in it. This mechanism is similar to what is done for ar71xx platforms.
  • FIXME: there might still be some historical information in the OpenWrt dev wiki, but it must be well hidden then. Seems there is nothing that can be found today...
Target Subtarget SoC RAM Ant MIPS Devices
ramips RT288x RT2880 SDR 2T3R 4KEc see ToH
RT3x5x/RT5350 RT3050 SDR 2T2R 24KEc see ToH
RT3052 SDR 2T2R 24KEc see ToH
RT3350 SDR 1T1R 24KEc see ToH
RT3352 SDR/DDR2 2T2R 24KEc see ToH
RT5350 SDR 1T1R 24KEc see ToH
RT3662/RT3883 RT3662 SDR/DDR2 2T3R 74Kc see ToH
RT3883 SDR/DDR2 3T3R 74Kc see ToH
MT7620 MT7620a DDR2 2T2R 24KEc see ToH
MT7620n SDR/DDR1/2 2T2R 24KEc see ToH
MT7621 MT7621AT DDR2/3 n/a 1004Kc see ToH
MT7621ST DDR2/3 n/a 1004Kc see ToH
MT7628 MT7628 DDR1/2 2T2R 24kec see ToH
MT7688 MT7688 DDR1/2 1T1R 24kec see ToH
ramips :?: n/a :?: RT6856 ? ? 34KEc see ToH

On MT7620A and likely other Ralink / Mediatek SOCs, the RGMII delay is set with the Port I control register in the GSW (gigabit switch) subsystem

for boards with uboot and an available console (option 4?), the register can be read with the command

  md 0x10117014 1

and the following bits tell you the OEM bootloader / chip defaults

BIT(2)RX no delay
BIT(3)TX delay

For a complete explanation, look for the register 0x7014 in the MT7620 Programming Guide


10117014: 1f08000c

c -→ 1100 -→ TX delay only

8 -→ PHY_BASE address

1f -→ internal PHYs disabled

Remember: You have to read bits from right to left. For example 1f08000c in binary becomes 00011111000010000000000000001100

0001 1111 0000 1000 0000 0000 0000 1100
   |    |    |    |    |    |    |    |   
  28   24   20   16   12    8    4    0



  • RT63260 The RT63260 is a highly integrated single-chip solution combining AFE (Analog Front End) chip technology and an ADSL2/2+ wired ADSL modem application together on one chip. It includes a 32-bit network processor and a Discrete Multi-Tone (DMT) engine for ADSL
    • combine with RT63087 AFE (Analog Front-End) for VDSL2
  • RT63368 It incorporates a MIPS 34Kc CPU and a DMT (Discrete Multi-Tone)-engine for VDSL2
    • combine with RT63087 AFE (Analog Front-End) for VDSL2
  • RT65168 It incorporates a MIPS 34Kc CPU and a DMT (Discrete Multi-Tone)-engine for VDSL2
    • combine with RT63095 AFE (Analog Front-End) for VDSL2


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  • Last modified: 2023/12/24 03:24
  • by lmita