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ZyXEL WAP6805 (Altibox Wifi Pluss)

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The ZyXEL WAP6805 (“Altibox Wifi Pluss”) is an AP or WiFi extender with 4 gigabit ethernet ports. The WAP6805 is identical to the WAP6806 except for minor case design differences.

ZyXEL WAP6805 (Altibox Wifi Pluss)

OpenWrt support

Not supported.

Hardware highlights

CPU Ram Flash Network WLAN USB Serial JTag
MT7621ST @ 880 MHz 64 MiB 128 MiB 4x 10/100/1000 bgn + ac No Yes No

Specific configuration

Network interfaces

The default network configuration is:

Interface Name Description Default configuration
br-lan LAN ports (1 to 4) & WiFi 192.168.1.1/24
eth0 DSA CPU port None
eth1 RGMII connection to Quantenna QC840 5 GHz module 1.1.1.1/24
wlan0 MT7603 2 GHz WiFi Disabled

Buttons

hardware.button on howto use and configure the hardware button(s).

Here, we merely name the buttons, so we can use them in the above Howto.

The ZyXEL WAP6805 has the following buttons:

BUTTON Event
Reset reset
WPS wps

Hardware

Info

Architecture MIPS
Vendor EXAMPLE Ralink
Bootloader ZyXEL modified U-Boot
System-On-Chip Mediatek MT7621ST
CPU/Speed 880 MHz
Flash-Chip Spansion S34ML01G2
Flash size 128 MiB NAND
RAM 64 MiB
Wireless MT7603 2.4GHz bgn, Quantenna QV840 5GHz ac (unsupported)
Ethernet 4 x 10/100/1000 Mbit/s
Switch Mediatek MT7530 integrated in MT7621 SoC
USB No
Serial Yes
JTAG No

Photos

front side back label PCB

Opening the case

The WAP6805 is relatively easy to open without breaking anything. There are no labels covering any of the screws, and the clips are mostly visible through the ventilation holes in the case. The circuit board and all antennas are mounted on the same case half. There is no need to detach any cables or anything else to open the case.

  1. remove wall mount cover and the two screws behind it
  2. remove curved top of case held in place by clips
  3. split case halves held together by clips

case top and wall mount cover case half without circuit board

Serial

port.serial general information about the serial port, serial port cable, etc.

serial ports

jumper J1 (MT7621 SoC) 57600, 8N1
jumper RRJ1 (Quantenna module) 115200, 8N1

Bootlogs

OEM bootlog

=================================================================== MT7621 stage1 code Mar 12 2015 14:42:52 (ASIC) CPU=50000000 HZ BUS=12500000 HZ ================================================================== Change MPLL source from XTAL to CR... do MEMPLL setting.. MEMPLL Config : 0x31000000 3PLL mode + External loopback === XTAL-40Mhz === DDR-800Mhz === PLL3 FB_DL: 0x3, 1/0 = 537/487 0D000000 PLL4 FB_DL: 0xb, 1/0 = 552/472 2D000000 PLL2 FB_DL: 0xf, 1/0 = 558/466 3D000000 do DDR setting..[00320381] Apply DDR2 Setting...(use default AC) 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120 -------------------------------------------------------------------------------- 0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0007:| 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0008:| 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0009:| 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0010:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0011:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DRAMC_DQSCTL1[0e0]=1A000000 DRAMC_DQSGCTL[124]=80000000 rank 0 coarse = 8 rank 0 fine = 48 B:| 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 opt_dle value:8 DRAMC_DDR2CTL[07c]=40001203 DRAMC_PADCTL4[0e4]=00000015 DRAMC_DQIDLY1[210]=0A070708 DRAMC_DQIDLY2[214]=05050708 DRAMC_DQIDLY3[218]=08060705 DRAMC_DQIDLY4[21c]=06050A06 DRAMC_R0DELDLY[018]=00002E2F ================================================================== RX DQS perbit delay software calibration ================================================================== 1.0-15 bit dq delay value ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 7 7 6 7 5 5 3 3 5 6 10 | 5 7 5 8 4 5 -------------------------------------- ================================================================== 2.dqs window x=pass dqs delay value (min~max)center y=0-7bit DQ of every group input delay:DQS0 =47 DQS1 = 46 ================================================================== bit DQS0 bit DQS1 0 (1~91)46 8 (1~91)46 1 (2~92)47 9 (1~90)45 2 (1~92)46 10 (1~90)45 3 (1~88)44 11 (1~89)45 4 (0~89)44 12 (1~89)45 5 (1~89)45 13 (1~88)44 6 (1~89)45 14 (1~90)45 7 (1~89)45 15 (1~89)45 ================================================================== 3.dq delay value last ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 8 7 7 10 8 7 5 5 5 7 10 | 6 8 6 10 5 6 ================================================================== ================================================================== TX perbyte calibration ================================================================== DQS loop = 15, cmp_err_1 = ffff0000 dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1 dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2 DQ loop=15, cmp_err_1 = ffff0000 dqs_perbyte_dly.last_dqdly_pass[0]=15, finish count=1 dqs_perbyte_dly.last_dqdly_pass[1]=15, finish count=2 byte:0, (DQS,DQ)=(8,8) byte:1, (DQS,DQ)=(8,8) DRAMC_DQODLY1[200]=88888888 DRAMC_DQODLY2[204]=88888888 20,data:88 [EMI] DRAMC calibration passed =================================================================== MT7621 stage1 code done CPU=50000000 HZ BUS=12500000 HZ =================================================================== Z-LOADER (Dec 1 2015 - 12:05:30) DRAM: 64 MB Config XHCI 40M PLL ****************************** Software System Reset Occurred ****************************** Allocate 16 byte aligned buffer: 83fe1dd0 Enable NFI Clock # MTK NAND # : Use HW ECC NAND ID [01 F1 80 1D 01] Device found in MTK table, ID: 1f1, EXT_ID: 801d01 Support this Device in MTK table! 1f1 select_chip [NAND]select ecc bit:4, sparesize :64 spare_per_sector=16 Signature matched and data read! load_fact_bbt success 1021 load fact bbt success [mtk_nand] probe successfully! mtd->writesize=2048 mtd->oobsize=64, mtd->erasesize=131072 devinfo.iowidth=8 ============================================ Ralink UBoot Version: 4.3.0.0 -------------------------------------------- ASIC MT7621AS (MAC to MT7530 Mode) DRAM_CONF_FROM: Auto-Detection DRAM_TYPE: DDR2 DRAM bus: 16 bit Xtal Mode=3 OCP Ratio=1/4 Flash component: NAND Flash Date:Dec 1 2015 Time:12:05:30 ============================================ icache: sets:256, ways:4, linesz:32 ,total:32768 dcache: sets:256, ways:4, linesz:32 ,total:32768 #Reset_MT7530 . Z-LOADER V1.17 | 12/01/2015 12:05:37 .... Waitting for RX_DMA_BUSY status Start... done wait multiboot...  5 4 3 2 1 0 Hit ESC key to stop autoboot:  3 2 1 0 .............................................................................................................................................## Booting image at c0000000 ... Image Name: 1.00(AAXJ.1)D0 Image Type: MIPS Linux Kernel Image (lzma compressed) Data Size: 9230848 Bytes = 8.8 MB Load Address: 80001000 Entry Point: 8000d1d0 ............................................................................................................................................. Verifying Checksum ... OK Uncompressing Kernel Image ... OK Starting kernel ... LINUX started... THIS IS ASIC Linux version 2.6.36 (max@134620M) (gcc version 4.6.3 (Buildroot 2012.11.1) ) #53 SMP Thu Jul 14 12:22:13 CST 2016 The CPU feqenuce set to 880 MHz GCMP present CPU revision is: 0001992f (MIPS 1004Kc) Software DMA cache coherency Determined physical RAM map: memory: 04000000 @ 00000000 (usable) Initrd not found or empty - disabling initrd Zone PFN ranges: Normal 0x00000000 -> 0x00004000 Movable zone start PFN for each node early_node_map[1] active PFN ranges 0: 0x00000000 -> 0x00004000 avail: cpu2 is not ready avail: cpu3 is not ready Detected 1 available secondary CPU(s) PERCPU: Embedded 7 pages/cpu @81083000 s6464 r8192 d14016 u65536 pcpu-alloc: s6464 r8192 d14016 u65536 alloc=16*4096 pcpu-alloc: [0] 0 [0] 1 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 16256 Kernel command line: console=ttyS1,57600n8 root=/dev/ram0 console=ttyS1,57600 root=/dev/ram0 rootfstype=squashfs,jffs2 PID hash table entries: 256 (order: -2, 1024 bytes) Dentry cache hash table entries: 8192 (order: 3, 32768 bytes) Inode-cache hash table entries: 4096 (order: 2, 16384 bytes) Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes MIPS secondary cache 256kB, 8-way, linesize 32 bytes. Writing ErrCtl register=00011e4c Readback ErrCtl register=00011e4c Memory: 51840k/65536k available (4114k kernel code, 13696k reserved, 1486k data, 7160k init, 0k highmem) Hierarchical RCU implementation. Verbose stalled-CPUs detection is disabled. NR_IRQS:128 Trying to install interrupt handler for IRQ24 Trying to install interrupt handler for IRQ25 Trying to install interrupt handler for IRQ22 Trying to install interrupt handler for IRQ9 Trying to install interrupt handler for IRQ10 Trying to install interrupt handler for IRQ11 Trying to install interrupt handler for IRQ12 Trying to install interrupt handler for IRQ13 Trying to install interrupt handler for IRQ14 Trying to install interrupt handler for IRQ16 Trying to install interrupt handler for IRQ17 Trying to install interrupt handler for IRQ18 Trying to install interrupt handler for IRQ19 Trying to install interrupt handler for IRQ20 Trying to install interrupt handler for IRQ21 Trying to install interrupt handler for IRQ23 Trying to install interrupt handler for IRQ26 Trying to install interrupt handler for IRQ27 Trying to install interrupt handler for IRQ28 Trying to install interrupt handler for IRQ15 Trying to install interrupt handler for IRQ8 Trying to install interrupt handler for IRQ29 Trying to install interrupt handler for IRQ30 Trying to install interrupt handler for IRQ31 CPU0: status register was 11000000 CPU0: status register now 11000000 CPU0: status register frc 11001800 console [ttyS1] enabled Calibrating delay loop... 579.58 BogoMIPS (lpj=1159168) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 512 launch: starting cpu1 launch: cpu1 gone! CPU revision is: 0001992f (MIPS 1004Kc) Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes MIPS secondary cache 256kB, 8-way, linesize 32 bytes. Brought up 2 CPUs Synchronize counters across 2 CPUs: done. NET: Registered protocol family 16 release PCIe RST: RALINK_RSTCTRL = 1000000 PCIE PHY initialize ***** Xtal 40MHz ***** start MT7621 PCIe register access RALINK_RSTCTRL = 1000000 RALINK_CLKCFG1 = 77ffeff8 *************** MT7621 PCIe RC mode ************* pcie_link status = 0x1 RALINK_RSTCTRL= 1000000 *** Configure Device number setting of Virtual PCI-PCI bridge *** RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2 PCIE0 enabled interrupt enable status: 100000 Port 0 N_FTS = 1b105000 config reg done init_rt2880pci done bio: create slab <bio-0> at 0 vgaarb: loaded SCSI subsystem initialized pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000) pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff] pci 0000:00:00.0: BAR 1: assigned [mem 0x60100000-0x6010ffff] pci 0000:00:00.0: BAR 1: set to [mem 0x60100000-0x6010ffff] (PCI address [0x60100000-0x6010ffff] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff] pci 0000:01:00.0: BAR 0: set to [mem 0x60000000-0x600fffff] (PCI address [0x60000000-0x600fffff] pci 0000:00:00.0: PCI bridge to [bus 01-01] pci 0000:00:00.0: bridge window [io disabled] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff] pci 0000:00:00.0: bridge window [mem pref disabled] BAR0 at slot 0 = 0 bus=0x0, slot = 0x0 res[0]->start = 0 res[0]->end = 0 res[1]->start = 60100000 res[1]->end = 6010ffff res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 bus=0x1, slot = 0x0, irq=0x4 res[0]->start = 60000000 res[0]->end = 600fffff res[1]->start = 0 res[1]->end = 0 res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 Switching to clocksource MIPS NET: Registered protocol family 2 IP route cache hash table entries: 1024 (order: 0, 4096 bytes) TCP established hash table entries: 2048 (order: 2, 16384 bytes) TCP bind hash table entries: 2048 (order: 2, 16384 bytes) TCP: Hash tables configured (established 2048 bind 2048) TCP reno registered UDP hash table entries: 128 (order: 0, 4096 bytes) UDP-Lite hash table entries: 128 (order: 0, 4096 bytes) NET: Registered protocol family 1 4 CPUs re-calibrate udelay(lpj = 1167360) msgmni has been set to 101 Block layer SCSI generic (bsg) driver version 0.4 loaded (major 254) io scheduler noop registered (default) Ralink gpio driver initialized spidrv_major = 217 Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled serial8250: ttyS0 at MMIO 0x1e000d00 (irq = 27) is a 16550A serial8250: ttyS1 at MMIO 0x1e000c00 (irq = 26) is a 16550A brd: module loaded MediaTek Nand driver init, version v2.1 Fix AHB virt2phys error Allocate 16 byte aligned buffer: 80ca8840 Enable NFI Clock # MTK NAND # : Use HW ECC NAND ID [01 F1 80 1D 01, 00801d01] Device found in MTK table, ID: 1f1, EXT_ID: 801d01 Support this Device in MTK table! 1f1 NAND device: Manufacturer ID: 0x01, Chip ID: 0xf1 (AMD NAND 128MiB 3,3V 8-bit) [NAND]select ecc bit:4, sparesize :64 spare_per_sector=16 Scanning device for bad blocks Creating 10 MTD partitions on "MT7621-NAND": 0x000000000000-0x000008000000 : "ALL" 0x000000000000-0x000000100000 : "Bootloader" 0x000000100000-0x000000200000 : "MRD" 0x000000200000-0x000000300000 : "Factory" 0x000000300000-0x000000400000 : "Config" 0x000000400000-0x000002400000 : "Kernel" 0x000002400000-0x000004400000 : "Kernel2" 0x000004400000-0x000004500000 : "Private" 0x000004500000-0x000005500000 : "Log" 0x000005500000-0x000008000000 : "App" [mtk_nand] probe successfully! compare signature failed ffc0 compare signature failed ff80 Signature matched and data read! load_fact_bbt success 1021 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 rdm_major = 253 GMAC1_MAC_ADRH -- : 0x00006031 GMAC1_MAC_ADRL -- : 0x97661610 Ralink APSoC Ethernet Driver Initilization. v3.1 512 rx/tx descriptors allocated, mtu = 1500! GMAC1_MAC_ADRH -- : 0x00006031 GMAC1_MAC_ADRL -- : 0x97661610 PROC INIT OK! register mt_drv === pAd = c0282000, size = 813160 === <-- RTMPAllocTxRxRingMemory, Status=0, ErrorValue=0x <-- RTMPAllocAdapterBlock, Status=0 pAd->CSRBaseAddress =0xc0180000, csr_addr=0xc0180000! device_id =0x7603 RtmpChipOpsHook(507): Not support for HIF_MT yet! mt7603_init()--> mt_bcn_buf_init(224): Not support for HIF_MT yet! <--mt7603_init() nf_conntrack version 0.5.0 (2048 buckets, 8192 max) GRE over IPv4 demultiplexor driver ip_tables: (C) 2000-2006 Netfilter Core Team, Type=Restricted Cone TCP cubic registered NET: Registered protocol family 10 IPv6 over IPv4 tunneling driver NET: Registered protocol family 17 L2TP core driver, V2.0 802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com> All bugs added by David S. Miller <davem@redhat.com> Freeing unused kernel memory: 7160k freed init started: BusyAlgorithmics/MIPS FPU Emulator v1.5 Box v1.12.1 (2018-04-17 17devpts: called with bogus options :31:16 CEST) starting pid 33, tty '': '/etc_ro/rcS' mount: mounting none on /proc/bus/usb failed: No such file or directory Welcome to _______ _______ ___ __ ____ _ _ ___ | ___ \| __ || | |__|| internet.sh 1>/dev/null 2>&1 (none) login: TX_BCN DESC a25b7000 size = 320 RX[0] DESC a25bb000 size = 2048 RX[1] DESC a25be000 size = 2048 E2pAccessMode=2 cfg_mode=9 cfg_mode=9 wmode_band_equal(): Band Equal! APSDCapable[0]=0 APSDCapable[1]=0 APSDCapable[2]=0 APSDCapable[3]=0 APSDCapable[4]=0 APSDCapable[5]=0 APSDCapable[6]=0 APSDCapable[7]=0 APSDCapable[8]=0 APSDCapable[9]=0 APSDCapable[10]=0 APSDCapable[11]=0 APSDCapable[12]=0 APSDCapable[13]=0 APSDCapable[14]=0 APSDCapable[15]=0 FW Version:_mt7603mp FW Build Date:20150624233050 CmdAddressLenReq:(ret = 0) CmdFwStartReq: override = 1, address = 1048576 CmdStartDLRsp: WiFI FW Download Success AsicDMASchedulerInit(): DMA Scheduler Mode=0(LMAC) efuse_probe: efuse = 10000012 RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5 RtmpEepromGetDefault::e2p_dafault=1 RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1 NVM is FLASH mode, flash_offset = 0x40000 1. Phy Mode = 14 Country Region from e2p = ffff tssi_1_target_pwr_g_band = 34 2. Phy Mode = 14 3. Phy Mode = 14 NICInitPwrPinCfg(14): Not support for HIF_MT yet! NICInitializeAsic(584): Not support rtmp_mac_sys_reset () for HIF_MT yet! mt_mac_init()--> mt7603_init_mac_cr()--> AsicSetMacMaxLen(1859): Set the Max RxPktLen=1024! <--mt_mac_init() WTBL Segment 1 info: MemBaseAddr/FID:0x28000/0 EntrySize/Cnt:32/128 WTBL Segment 2 info: MemBaseAddr/FID:0x40000/0 EntrySize/Cnt:64/128 WTBL Segment 3 info: MemBaseAddr/FID:0x42000/64 EntrySize/Cnt:64/128 WTBL Segment 4 info: MemBaseAddr/FID:0x44000/128 EntrySize/Cnt:32/128 MtAsicACQueue: Write CR:21510, Value=10421 MtAsicACQueue: Write CR:21500, Value=10421 AntCfgInit(2538): Not support for HIF_MT yet! RTMPSetPhyMode(): channel out of range, use first ch=0 MCS Set = ff ff 00 00 01 mt7603_switch_channel(): Switch to Ch#1(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#2(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#3(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#4(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#5(2T2R), BBP_BW=0 rmt7603_switch_channel(): Switch to Ch#6(2T2R), BBP_BW=0 oomt7603_switch_channel(): Switch to Ch#7(2T2R), BBP_BW=0 tmt7603_switch_channel(): Switch to Ch#8(2T2R), BBP_BW=0 Password: mt7603_switch_channel(): Switch to Ch#9(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#10(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#11(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#12(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#13(2T2R), BBP_BW=0 mt7603_switch_channel(): Switch to Ch#4(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l mt7603_switch_channel(): Switch to Ch#5(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l mt7603_switch_channel(): Switch to Ch#6(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l mt7603_switch_channel(): Switch to Ch#7(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l mt7603_switch_channel(): Switch to Ch#8(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l mt7603_switch_channel(): Switch to Ch#9(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l mt7603_switch_channel(): Switch to Ch#10(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l mt7603_switch_channel(): Switch to Ch#11(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l mt7603_switch_channel(): Switch to Ch#12(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l mt7603_switch_channel(): Switch to Ch#13(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l [PMF]ap_pmf_init:: apidx=0, MFPC=0, MFPR=0, SHA256=0 [PMF]RTMPMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0 [PMF]ap_pmf_init:: apidx=1, MFPC=0, MFPR=0, SHA256=0 [PMF]RTMPMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0 [PMF]ap_pmf_init:: apidx=2, MFPC=0, MFPR=0, SHA256=0 [PMF]RTMPMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0 [PMF]ap_pmf_init:: apidx=3, MFPC=0, MFPR=0, SHA256=0 [PMF]RTMPMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0 [PMF]ap_pmf_init:: apidx=4, MFPC=0, MFPR=0, SHA256=0 [PMF]RTMPMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0 [PMF]ap_pmf_init:: apidx=5, MFPC=0, MFPR=0, SHA256=0 [PMF]RTMPMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0 [PMF]ap_pmf_init:: apidx=6, MFPC=0, MFPR=0, SHA256=0 [PMF]RTMPMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0 [PMF]ap_pmf_init:: apidx=7, MFPC=0, MFPR=0, SHA256=0 [PMF]RTMPMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0 AsicSetRalinkBurstMode(4185): Not support for HIF_MT yet! RTMPSetPiggyBack(921): Not support for HIF_MT yet! mt7603_switch_channel(): Switch to Ch#11(2T2R), BBP_BW=0 AsicSetTxPreamble(4172): Not support for HIF_MT yet! AsicAddSharedKeyEntry(2025): Not support for HIF_MT yet! AsicAddSharedKeyEntry(2025): Not support for HIF_MT yet! AsicAddSharedKeyEntry(2025): Not support for HIF_MT yet! AsicAddSharedKeyEntry(2025): Not support for HIF_MT yet! AsicAddSharedKeyEntry(2025): Not support for HIF_MT yet! AsicAddSharedKeyEntry(2025): Not support for HIF_MT yet! AsicAddSharedKeyEntry(2025): Not support for HIF_MT yet! AsicAddSharedKeyEntry(2025): Not support for HIF_MT yet! AsicSetPreTbtt(): bss_idx=0, PreTBTT timeout = 0xa0 Main bssid = 62:31:87:66:16:10 <==== rt28xx_init, Status=0 @@@ ed_monitor_init : ===> @@@ ed_monitor_init : <=== WiFi Startup Cost (ra0): 7.880s Raeth v3.1 (Tasklet) free_head_phy is 0xae6000!!! free_tail_phy is 0xae7ff0!!! txd_pool=a0ae8000 phy_txd_pool=00AE8000 ei_local->skb_free start address is 0x83ccd47c. free_txd: a0ae8010, ei_local->cpu_ptr: 00AE8000 POOL HEAD_PTR | DMA_PTR | CPU_PTR ----------------+---------+-------- 0xa0ae8000 0x00AE8000 0x00AE8000 phy_rx_ring0 = 0x00aea000, rx_ring0 = 0xa0aea000 phy_rx_ring0 = 0x00aee000, rx_ring0 = 0xa0aee000 change HW-TRAP to 0x17ccf!!!!!!!!!!!!GMAC1_MAC_ADRH -- : 0x00006031 GMAC1_MAC_ADRL -- : 0x97661610 GDMA2_MAC_ADRH -- : 0x0000000c GDMA2_MAC_ADRL -- : 0x432880e5 eth3: ===> VirtualIF_open CDMA_CSG_CFG = 81000000 GDMA1_FWD_CFG = 20710000 GDMA2_FWD_CFG = 20710000 device ra0 entered promiscuous mode device eth2 entered promiscuous mode br0: port 2(eth2) entering learning state br0: port 2(eth2) entering learning state br0: port 1(ra0) entering learning state br0: port 1(ra0) entering learning state br0: port 2(eth2) entering learning state br0: port 1(ra0) entering learning state br0: port 2(eth2) entering learning state br0: port 2(eth2) entering learning state br0: port 1(ra0) entering learning state br0: port 1(ra0) entering learning state WAP6805-5692 login: ESW: Link Status Changed - Port3 Link UP set mcastVlan to 0 in ethernet driver ADDRCONF(NETDEV_UP): sit0: link is not ready ADDRCONF(NETDEV_UP): ip6tnl0: link is not ready ADDRCONF(NETDEV_UP): ra1: link is not ready ADDRCONF(NETDEV_UP): ra2: link is not ready ADDRCONF(NETDEV_UP): ra3: link is not ready ADDRCONF(NETDEV_UP): ra4: link is not ready ADDRCONF(NETDEV_UP): ra5: link is not ready ADDRCONF(NETDEV_UP): ra6: link is not ready ADDRCONF(NETDEV_UP): ra7: link is not ready ADDRCONF(NETDEV_UP): eth3: link is not ready switch register base addr to 0xbe110000 write offset 0x8, value 0x9000c ESW: Link Status Changed - Port3 Link Down eth3: ===> VirtualIF_open device eth3 entered promiscuous mode br0: port 3(eth3) entering learning state br0: port 3(eth3) entering learning state killall rt2860apd 1>/dev/null 2>&1 1>/dev/null 2>&1 br0: port 2(eth2) entering forwarding state br0: port 1(ra0) entering forwarding state dropbralink_gpio: irq number(999) pid =1242 ear.sh 1>/dev/null 2>&1 br0: port 3(eth3) entering forwarding state killall -q udpsvd 1>/dev/null 2>&1 udpsvd -Ev 0 69 tftpd& 1>/dev/null 2>&1 ntp.sh 1>/dev/null 2>&1 rm -rf /var/run/wscd.pid.ra0 1>/dev/null 2>&1 iwpriv ra0 set WscConfMode=0 1>/dev/null 2>&1 iwpriv ra0 set WscConfMode=7 1>/dev/null 2>&1 iwpriv ra0 set WscConfStatus=1 1>/dev/null 2>&1 route add -host 239.255.255.250 dev br0 1>/dev/null 2>&1 wscd -m 1 -a 169.254.71.254 -i ra0 -D 1>/dev/null 2>&1 killall -q klogd 1>/dev/null 2>&1 killall -q syslogd 1>/dev/null 2>&1 syslogd -C8 1>/dev/null 2>&1 1>/dev/null 2>&1 klogd 1>/dev/null 2>&1 1>/dev/null 2>&1 killall -q mini_httpd 1>/dev/null 2>&1 mkdir -p /var/web 1>/dev/null 2>&1 cp -r /etc_ro/web/* /var/web 1>/dev/null 2>&1 mini_httpd -p 80 -C /etc_ro/mini_httpd_debug.conf 1>/dev/null 2>&1 ESW: Link Status Changed - Port3 Link UP Monitord: Received a SIGTSTP PING 192.168.1.33 (192.168.1.33): 56 data bytes 64 bytes from 192.168.1.33: seq=0 ttl=64 time=4.602 ms --- 192.168.1.33 ping statistics --- 1 packets transmitted, 1 packets received, 0% packet loss round-trip min/avg/max = 4.602/4.602/4.602 ms config igmpsnoop off. switch reg write offset=2308, value=9355 config igmpsnoop. ntp.sh 1>/dev/null 2>&1 process '/sbin/gett wpsState=0 monitorInterface=-1 wpsEnd=0 WAP6805-5692 login:


OpenWrt bootlog

=================================================================== MT7621 stage1 code Mar 12 2015 14:42:52 (ASIC) CPU=50000000 HZ BUS=12500000 HZ ================================================================== Change MPLL source from XTAL to CR... do MEMPLL setting.. MEMPLL Config : 0x31000000 3PLL mode + External loopback === XTAL-40Mhz === DDR-800Mhz === PLL3 FB_DL: 0x4, 1/0 = 626/398 11000000 PLL4 FB_DL: 0xb, 1/0 = 552/472 2D000000 PLL2 FB_DL: 0x10, 1/0 = 706/318 41000000 do DDR setting..[00320381] Apply DDR2 Setting...(use default AC) 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120 -------------------------------------------------------------------------------- 0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0007:| 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0008:| 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0009:| 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0010:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0011:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DRAMC_DQSCTL1[0e0]=1A000000 DRAMC_DQSGCTL[124]=80000000 rank 0 coarse = 8 rank 0 fine = 48 B:| 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 opt_dle value:8 DRAMC_DDR2CTL[07c]=40001203 DRAMC_PADCTL4[0e4]=00000015 DRAMC_DQIDLY1[210]=09070707 DRAMC_DQIDLY2[214]=03040606 DRAMC_DQIDLY3[218]=09070705 DRAMC_DQIDLY4[21c]=07060A06 DRAMC_R0DELDLY[018]=00002F2E ================================================================== RX DQS perbit delay software calibration ================================================================== 1.0-15 bit dq delay value ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 7 7 7 7 6 6 3 2 5 7 10 | 5 7 5 8 4 5 -------------------------------------- ================================================================== 2.dqs window x=pass dqs delay value (min~max)center y=0-7bit DQ of every group input delay:DQS0 =46 DQS1 = 47 ================================================================== bit DQS0 bit DQS1 0 (2~91)46 8 (1~93)47 1 (2~91)46 9 (3~92)47 2 (1~92)46 10 (1~90)45 3 (1~87)44 11 (1~90)45 4 (1~91)46 12 (1~91)46 5 (2~91)46 13 (1~89)45 6 (1~89)45 14 (1~90)45 7 (1~89)45 15 (1~89)45 ================================================================== 3.dq delay value last ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 7 7 7 9 6 6 4 3 5 7 10 | 7 9 6 10 6 7 ================================================================== ================================================================== TX perbyte calibration ================================================================== DQS loop = 15, cmp_err_1 = ffff0000 dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1 dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2 DQ loop=15, cmp_err_1 = ffff0000 dqs_perbyte_dly.last_dqdly_pass[0]=15, finish count=1 dqs_perbyte_dly.last_dqdly_pass[1]=15, finish count=2 byte:0, (DQS,DQ)=(8,8) byte:1, (DQS,DQ)=(8,8) DRAMC_DQODLY1[200]=88888888 DRAMC_DQODLY2[204]=88888888 20,data:88 [EMI] DRAMC calibration passed =================================================================== MT7621 stage1 code done CPU=50000000 HZ BUS=12500000 HZ =================================================================== Z-LOADER (Dec 1 2015 - 12:05:30) DRAM: 64 MB Config XHCI 40M PLL ****************************** Software System Reset Occurred ****************************** Allocate 16 byte aligned buffer: 83fe1dd0 Enable NFI Clock # MTK NAND # : Use HW ECC NAND ID [01 F1 80 1D 01] Device found in MTK table, ID: 1f1, EXT_ID: 801d01 Support this Device in MTK table! 1f1 select_chip [NAND]select ecc bit:4, sparesize :64 spare_per_sector=16 Signature matched and data read! load_fact_bbt success 1021 load fact bbt success [mtk_nand] probe successfully! mtd->writesize=2048 mtd->oobsize=64, mtd->erasesize=131072 devinfo.iowidth=8 ============================================ Ralink UBoot Version: 4.3.0.0 -------------------------------------------- ASIC MT7621AS (MAC to MT7530 Mode) DRAM_CONF_FROM: Auto-Detection DRAM_TYPE: DDR2 DRAM bus: 16 bit Xtal Mode=3 OCP Ratio=1/4 Flash component: NAND Flash Date:Dec 1 2015 Time:12:05:30 ============================================ icache: sets:256, ways:4, linesz:32 ,total:32768 dcache: sets:256, ways:4, linesz:32 ,total:32768 #Reset_MT7530 . Z-LOADER V1.17 | 12/01/2015 12:05:37 .... Waitting for RX_DMA_BUSY status Start... done wait multiboot...  5 4 3 2 1 0 Hit ESC key to stop autoboot:  3 2 1 0 ..............................................................................................................................................## Booting image at c0000000 ... Image Name: MIPS OpenWrt Linux-5.4.28 Image Type: MIPS Linux Kernel Image (lzma compressed) Data Size: 9244273 Bytes = 8.8 MB Load Address: 80001000 Entry Point: 80001000 .............................................................................................................................................. Verifying Checksum ... OK Uncompressing Kernel Image ... OK Starting kernel ... [ 0.000000] Linux version 5.4.28 (bjorn@canardo) (gcc version 8.4.0 (OpenWrt GCC 8.4.0 r12648+28-67b04e767a0d)) #0 SMP Sun Apr 5 15:23:15 2020 [ 0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3 [ 0.000000] printk: bootconsole [early0] enabled [ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc) [ 0.000000] MIPS: machine is ZyXEL WAP6805 [ 0.000000] Initrd not found or empty - disabling initrd [ 0.000000] VPE topology {2} total 2 [ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. [ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes [ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. [ 0.000000] Zone ranges: [ 0.000000] Normal [mem 0x0000000000000000-0x0000000003ffffff] [ 0.000000] HighMem empty [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000000000000-0x0000000003ffffff] [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000003ffffff] [ 0.000000] percpu: Embedded 14 pages/cpu s26672 r8192 d22480 u57344 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 16240 [ 0.000000] Kernel command line: console=ttyS0,57600 rootfstype=squashfs,jffs2 [ 0.000000] Dentry cache hash table entries: 8192 (order: 3, 32768 bytes, linear) [ 0.000000] Inode-cache hash table entries: 4096 (order: 2, 16384 bytes, linear) [ 0.000000] Writing ErrCtl register=00011e40 [ 0.000000] Readback ErrCtl register=00011e40 [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off [ 0.000000] Memory: 49584K/65536K available (5546K kernel code, 198K rwdata, 1208K rodata, 7948K init, 229K bss, 15952K reserved, 0K cma-reserved, 0K highmem) [ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] rcu: Hierarchical RCU implementation. [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2. [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies. [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2 [ 0.000000] NR_IRQS: 256 [ 0.000000] random: get_random_bytes called from start_kernel+0x340/0x554 with crng_init=0 [ 0.000000] CPU Clock: 880MHz [ 0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns [ 0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4343773742 ns [ 0.000009] sched_clock: 32 bits at 440MHz, resolution 2ns, wraps every 4880645118ns [ 0.015485] Calibrating delay loop... 583.68 BogoMIPS (lpj=1167360) [ 0.055803] pid_max: default: 32768 minimum: 301 [ 0.065118] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.079518] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.097367] rcu: Hierarchical SRCU implementation. [ 0.107324] smp: Bringing up secondary CPUs ... [ 0.118297] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. [ 0.118307] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes [ 0.118319] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. [ 0.118429] CPU1 revision is: 0001992f (MIPS 1004Kc) [ 0.144395] Synchronize counters for CPU 1: done. [ 0.204046] smp: Brought up 1 node, 2 CPUs [ 0.216399] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns [ 0.235709] futex hash table entries: 512 (order: 2, 16384 bytes, linear) [ 0.249403] pinctrl core: initialized pinctrl subsystem [ 0.261305] NET: Registered protocol family 16 [ 0.310677] clocksource: Switched to clocksource GIC [ 0.322654] NET: Registered protocol family 2 [ 0.332033] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes, linear) [ 0.348578] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.363750] TCP bind hash table entries: 1024 (order: 1, 8192 bytes, linear) [ 0.377741] TCP: Hash tables configured (established 1024 bind 1024) [ 0.390500] UDP hash table entries: 256 (order: 1, 8192 bytes, linear) [ 0.403400] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear) [ 0.417489] NET: Registered protocol family 1 [ 0.426055] PCI: CLS 0 bytes, default 32 [ 7.454263] 4 CPUs re-calibrate udelay(lpj = 1163264) [ 7.465913] workingset: timestamp_bits=14 max_order=14 bucket_order=0 [ 7.492226] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 7.503743] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc. [ 7.528238] mt7621_gpio 1e000600.gpio: registering 32 gpios [ 7.539582] mt7621_gpio 1e000600.gpio: registering 32 gpios [ 7.551022] mt7621_gpio 1e000600.gpio: registering 32 gpios [ 7.562982] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled [ 7.577146] printk: console [ttyS0] disabled [ 7.585597] 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 15, base_baud = 3125000) is a 16550A [ 7.603533] printk: console [ttyS0] enabled [ 7.603533] printk: console [ttyS0] enabled [ 7.620081] printk: bootconsole [early0] disabled [ 7.620081] printk: bootconsole [early0] disabled [ 7.641041] mt7621-nand 1e003000.nand: Using programmed access timing: 31c07388 [ 7.655934] nand: device found, Manufacturer ID: 0x01, Chip ID: 0xf1 [ 7.668596] nand: AMD/Spansion S34ML01G2 [ 7.676416] nand: 128 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64 [ 7.691506] mt7621-nand 1e003000.nand: ECC strength adjusted to 4 bits [ 7.704546] mt7621-nand 1e003000.nand: Using programmed access timing: 21005134 [ 7.719119] mt7621-nand 1e003000.nand: Using programmed access timing: 21005134 [ 7.733683] Scanning device for bad blocks [ 9.850823] 9 fixed-partitions partitions found on MTD device mt7621-nand [ 9.864347] Creating 9 MTD partitions on "mt7621-nand": [ 9.874769] 0x000000000000-0x000000100000 : "Bootloader" [ 9.886873] 0x000000100000-0x000000200000 : "MRD" [ 9.897660] 0x000000200000-0x000000300000 : "Factory" [ 9.909107] 0x000000300000-0x000000400000 : "Config" [ 9.920440] 0x000000400000-0x000002400000 : "firmware" [ 10.061195] 0x000002400000-0x000004400000 : "Kernel2" [ 10.072945] 0x000004400000-0x000004500000 : "Private" [ 10.084402] 0x000004500000-0x000005500000 : "Log" [ 10.095360] 0x000005500000-0x000008000000 : "App" [ 10.107421] libphy: Fixed MDIO Bus: probed [ 10.140762] libphy: mdio: probed [ 10.147477] mt7530 mdio-bus:1f: MT7530 adapts as multi-chip module [ 10.161534] mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 16 [ 10.178303] mtk_soc_eth 1e100000.ethernet: generated random MAC address 46:21:a4:d9:e1:ad [ 10.195393] mtk_soc_eth 1e100000.ethernet eth1: mediatek frame engine at 0xbe100000, irq 16 [ 10.214476] mt7621-pci 1e140000.pcie: Parsing DT failed [ 10.226949] random: fast init done [ 10.227806] NET: Registered protocol family 10 [ 10.244564] Segment Routing with IPv6 [ 10.252008] NET: Registered protocol family 17 [ 10.261214] 8021q: 802.1Q VLAN Support v1.8 [ 10.272288] mt7530 mdio-bus:1f: MT7530 adapts as multi-chip module [ 10.989140] libphy: dsa slave smi: probed [ 11.006342] mt7530 mdio-bus:1f lan0 (uninitialized): PHY [dsa-0.0:00] driver [Generic PHY] [ 11.034345] mt7530 mdio-bus:1f lan1 (uninitialized): PHY [dsa-0.0:01] driver [Generic PHY] [ 11.062343] mt7530 mdio-bus:1f lan2 (uninitialized): PHY [dsa-0.0:02] driver [Generic PHY] [ 11.090347] mt7530 mdio-bus:1f lan3 (uninitialized): PHY [dsa-0.0:03] driver [Generic PHY] [ 11.178273] mt7530 mdio-bus:1f: configuring for fixed/rgmii link mode [ 11.802269] mt7530 mdio-bus:1f: Link is Up - 1Gbps/Full - flow control off [ 11.886303] DSA: tree 0 setup [ 11.892599] rt2880-pinmux pinctrl: pcie is already enabled [ 11.903563] mt7621-pci 1e140000.pcie: Error applying setting, reverse things back [ 11.918659] mt7621-pci-phy 1e149000.pcie-phy: PHY for 0xbe149000 (dual port = 1) [ 11.933552] mt7621-pci-phy 1e14a000.pcie-phy: PHY for 0xbe14a000 (dual port = 0) [ 12.048187] mt7621-pci-phy 1e149000.pcie-phy: Xtal is 40MHz [ 12.059311] mt7621-pci-phy 1e14a000.pcie-phy: Xtal is 40MHz [ 12.170203] mt7621-pci 1e140000.pcie: pcie1 no card, disable it (RST & CLK) [ 12.184079] mt7621-pci 1e140000.pcie: pcie2 no card, disable it (RST & CLK) [ 12.197959] mt7621-pci 1e140000.pcie: PCIE0 enabled [ 12.207690] mt7621-pci 1e140000.pcie: PCI coherence region base: 0x60000000, mask/settings: 0xf0000002 [ 12.226455] mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00 [ 12.239150] pci_bus 0000:00: root bus resource [io 0x1e160000-0x1e16ffff] [ 12.252857] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff] [ 12.266567] pci_bus 0000:00: root bus resource [bus 00-ff] [ 12.277543] pci 0000:00:00.0: [0e8d:0801] type 01 class 0x060400 [ 12.289551] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x7fffffff] [ 12.302049] pci 0000:00:00.0: reg 0x14: [mem 0x60200000-0x6020ffff] [ 12.314618] pci 0000:00:00.0: supports D1 [ 12.322611] pci 0000:00:00.0: PME# supported from D0 D1 D3hot [ 12.335745] pci 0000:01:00.0: [14c3:7603] type 00 class 0x028000 [ 12.347796] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000fffff] [ 12.360430] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold [ 12.373920] pci 0000:00:00.0: PCI bridge to [bus 01-ff] [ 12.384361] pci 0000:00:00.0: bridge window [io 0x0000-0x0fff] [ 12.396511] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff] [ 12.410043] pci 0000:00:00.0: bridge window [mem 0x60100000-0x601fffff pref] [ 12.424448] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 [ 12.437683] pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000] [ 12.450872] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000] [ 12.464751] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff] [ 12.478289] pci 0000:00:00.0: BAR 9: assigned [mem 0x60100000-0x601fffff pref] [ 12.492686] pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff] [ 12.506227] pci 0000:00:00.0: BAR 7: assigned [io 0x1e160000-0x1e160fff] [ 12.519792] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff] [ 12.533325] pci 0000:00:00.0: PCI bridge to [bus 01] [ 12.543234] pci 0000:00:00.0: bridge window [io 0x1e160000-0x1e160fff] [ 12.556766] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff] [ 12.570302] pci 0000:00:00.0: bridge window [mem 0x60100000-0x601fffff pref] [ 12.585415] hctosys: unable to open rtc device (rtc0) [ 12.628017] Freeing unused kernel memory: 7948K [ 12.637114] This architecture does not have kernel memory protection. [ 12.649957] Run /init as init process [ 12.682861] init: Console is alive [ 12.689916] init: - watchdog - [ 12.707016] kmodloader: loading kernel modules from /etc/modules-boot.d/* [ 12.724281] mt7621-qtn-rgmii: changed register 0x1e110008 value from 0x000c000c to 0x0009000c [ 12.743909] kmodloader: done loading kernel modules from /etc/modules-boot.d/* [ 12.770633] init: - preinit - [ 12.907357] mtk_soc_eth 1e100000.ethernet eth0: configuring for fixed/rgmii link mode [ 12.923550] mtk_soc_eth 1e100000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx [ 12.940437] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [ 13.019154] random: jshn: uninitialized urandom read (4 bytes read) [ 13.079177] random: jshn: uninitialized urandom read (4 bytes read) [ 13.123875] random: jshn: uninitialized urandom read (4 bytes read) [ 13.362285] mt7530 mdio-bus:1f lan0: configuring for phy/gmii link mode [ 13.402434] 8021q: adding VLAN 0 to HW filter on device lan0 Press the [f] key and hit [enter] to enter failsafe mode Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level [ 17.638029] procd: - early - [ 17.643906] procd: - watchdog - [ 18.198439] procd: - watchdog - [ 18.205065] procd: - ubus - [ 18.216155] urandom_read: 5 callbacks suppressed [ 18.216167] random: ubusd: uninitialized urandom read (4 bytes read) [ 18.262885] random: ubusd: uninitialized urandom read (4 bytes read) [ 18.276855] procd: - init - Please press Enter to activate this console. [ 18.645286] kmodloader: loading kernel modules from /etc/modules.d/* [ 18.675871] Loading modules backported from Linux version v5.4.27-0-g585e0cc08069 [ 18.690857] Backport generated by backports.git v5.4.27-1-0-gf6e8852f [ 18.732538] xt_time: kernel timezone is -0000 [ 18.802968] pci 0000:00:00.0: enabling device (0006 -> 0007) [ 18.814317] mt7603e 0000:01:00.0: enabling device (0000 -> 0002) [ 18.826516] mt7603e 0000:01:00.0: ASIC revision: 76030010 [ 18.847273] urngd: v1.0.2 started. [ 18.988851] random: crng init done [ 19.455343] mt7603e 0000:01:00.0: Firmware Version: ap_pcie [ 19.466555] mt7603e 0000:01:00.0: Build Time: 20160107100755 [ 19.502284] mt7603e 0000:01:00.0: firmware init done [ 19.728031] PPP generic driver version 2.4.2 [ 19.740757] NET: Registered protocol family 24 [ 19.767673] kmodloader: done loading kernel modules from /etc/modules.d/* [ 31.972305] mtk_soc_eth 1e100000.ethernet eth0: Link is Down [ 31.998363] mtk_soc_eth 1e100000.ethernet eth0: configuring for fixed/rgmii link mode [ 32.016674] mtk_soc_eth 1e100000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx [ 32.034979] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [ 32.122292] mt7530 mdio-bus:1f lan0: configuring for phy/gmii link mode [ 32.154491] 8021q: adding VLAN 0 to HW filter on device lan0 [ 32.166516] br-lan: port 1(lan0) entered blocking state [ 32.176979] br-lan: port 1(lan0) entered disabled state [ 32.214295] device lan0 entered promiscuous mode [ 32.223511] device eth0 entered promiscuous mode [ 32.370406] mt7530 mdio-bus:1f lan1: configuring for phy/gmii link mode [ 32.410765] 8021q: adding VLAN 0 to HW filter on device lan1 [ 32.423434] br-lan: port 2(lan1) entered blocking state [ 32.433942] br-lan: port 2(lan1) entered disabled state [ 32.494319] device lan1 entered promiscuous mode [ 32.638282] mt7530 mdio-bus:1f lan2: configuring for phy/gmii link mode [ 32.678471] 8021q: adding VLAN 0 to HW filter on device lan2 [ 32.690335] br-lan: port 3(lan2) entered blocking state [ 32.700762] br-lan: port 3(lan2) entered disabled state [ 32.794299] device lan2 entered promiscuous mode [ 32.930282] mt7530 mdio-bus:1f lan3: configuring for phy/gmii link mode [ 32.970461] 8021q: adding VLAN 0 to HW filter on device lan3 [ 32.982411] br-lan: port 4(lan3) entered blocking state [ 32.992858] br-lan: port 4(lan3) entered disabled state [ 33.110305] device lan3 entered promiscuous mode [ 33.178344] mtk_soc_eth 1e100000.ethernet eth1: configuring for fixed/rgmii-rxid link mode [ 33.195530] mtk_soc_eth 1e100000.ethernet eth1: Link is Up - 1Gbps/Full - flow control off [ 33.214088] IPv6: ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready [ 37.266298] mt7530 mdio-bus:1f lan3: Link is Up - 1Gbps/Full - flow control rx/tx [ 37.281289] br-lan: port 4(lan3) entered blocking state [ 37.291753] br-lan: port 4(lan3) entered forwarding state [ 37.350321] IPv6: ADDRCONF(NETDEV_CHANGE): br-lan: link becomes ready BusyBox v1.31.1 () built-in shell (ash) _______ ________ __ | |.-----.-----.-----.| | | |.----.| |_ | - || _ | -__| || | | || _|| _| |_______|| __|_____|__|__||________||__| |____| |__| W I R E L E S S F R E E D O M ----------------------------------------------------- OpenWrt SNAPSHOT, r12839+4-95bd6a04b56a ----------------------------------------------------- === WARNING! ===================================== There is no root password defined on this device! Use the "passwd" command to set up a new password in order to prevent unauthorized SSH logins. -------------------------------------------------- root@OpenWrt:/#


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toh/zyxel/zyxel_wap6805.txt · Last modified: 2020/04/30 10:50 by tmomas