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| inbox:toh:wifire:s1500_nbn [2022/04/26 11:53] – [OpenWrt support] demiurge67 | toh:wifire:s1500_nbn [2024/02/12 11:13] – external edit | ||
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| ====== WiFire S1500 NBN ====== | ====== WiFire S1500 NBN ====== | ||
| - | ~~NOTOC~~ | ||
| - | |||
| /* This template is intended to be used via https:// | /* This template is intended to be used via https:// | ||
| - | {{page> | ||
| - | //Write a short, relevant description of the device. Include | + | OEM/ODM name: Sercomm S1500 BUC |
| + | The WiFire S1500.NBN is a CPE wireless router based on the MT7621 platform. | ||
| - | This devices is manufactured by OEM/ODM SerComm Corporation. | + | /* //Write a short, relevant description of the device. Include a technical overview, but avoid marketing buzzwords/ |
| - | The production common name is Sercomm S1500 | + | |
| /*****/ | /*****/ | ||
| Line 15: | Line 12: | ||
| /*****/ | /*****/ | ||
| - | {{ media:example:genericrouter1.png?200|Generic Router}} | + | {{media:wifire:e514.png?400|WiFire S1500.NBN}} |
| - | ===== OpenWrt support | + | ===== Supported Versions |
| - | <color red> | + | <!-- ToH: { |
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | } --> | ||
| - | /*** if info available: uncomment and fill in | ||
| - | ===== Supporting activities ===== | ||
| - | //Describe if there are any ongoing activities that might lead to OpenWrt support.// | ||
| - | |||
| - | * | ||
| - | ***/ | ||
| - | OpenWrt forum thread: https:// | ||
| - | |||
| - | /*** if info available: uncomment and fill in | ||
| ===== Experimental firmware ===== | ===== Experimental firmware ===== | ||
| - | //List experimental firmware download links here.// | + | * Community builds - https://forum.openwrt.org/ |
| - | //None at this time.// | ||
| - | * External image (add link) | ||
| - | * trunk image (add link) | ||
| - | * ... | ||
| - | ***/ | ||
| - | |||
| - | |||
| - | ===== Hardware highlights ===== | ||
| - | ^ CPU ^ Ram ^ Flash ^ Network | ||
| - | | MediaTek MT7621AT (880 MHz, 2 cores) | ||
| + | ===== Hardware Highlights ===== | ||
| + | <!-- ToH: { | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | } --> | ||
| /*** if info available: uncomment and fill in | /*** if info available: uncomment and fill in | ||
| Line 58: | Line 52: | ||
| ***/ | ***/ | ||
| + | ===== Installation ===== | ||
| + | |||
| + | |||
| + | /* stable release */ | ||
| + | <!-- ToH: { | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | } --> | ||
| + | |||
| + | |||
| + | -> [[docs: | ||
| + | |||
| + | ===== OpenWrt installation ===== | ||
| + | |||
| + | - Remove all dots from the factory image filename (except the dot before file extension) | ||
| + | - Upload and update the firmware via the original web interface | ||
| + | - Two options are possible after the reboot: | ||
| + | * OpenWrt - that's OK, the mission accomplished | ||
| + | * Stock firmware - install Stock firmware (to switch booflag from Sercomm0 to Sercomm1) and then OpenWrt factory image. | ||
| + | |||
| + | |||
| + | ===== Return to Stock ===== | ||
| + | 1. Change the bootflag to Sercomm1 in OpenWrt CLI and then reboot: | ||
| + | <code bash> | ||
| + | printf 1 | dd bs=1 seek=7 count=1 of=/ | ||
| + | </ | ||
| + | |||
| + | 2. Optional: Update with any version of stock firmware if you want to overwrite OpenWrt in Slot 0 completely. | ||
| - | /*** if info available: uncomment and fill in | ||
| ===== Debricking ===== | ===== Debricking ===== | ||
| -> [[docs: | -> [[docs: | ||
| - | ***/ | + | |
| + | ==== sercomm-recovery utility ==== | ||
| + | 1. Compile [[https:// | ||
| + | <code bash> | ||
| + | git clone https:// | ||
| + | make | ||
| + | </ | ||
| + | |||
| + | 2. Connect the router with a cable and run sercomm-recovery: | ||
| + | <code bash> | ||
| + | sudo ./ | ||
| + | </ | ||
| + | where: | ||
| + | | ||
| + | | ||
| + | | ||
| + | |||
| + | 3. Wait until the router is flashed and rebooted. | ||
| + | |||
| + | [[https:// | ||
| + | |||
| + | It's also possible to create a recovery image containing OpenWrt. | ||
| + | |||
| + | === How to make own recovery images === | ||
| + | |||
| + | You can use mtd0 (" | ||
| Line 114: | Line 164: | ||
| ===== Hardware ===== | ===== Hardware ===== | ||
| ==== Info ==== | ==== Info ==== | ||
| - | ^ Architecture | ||
| - | ^ Vendor | ||
| - | ^ Bootloader | ||
| - | ^ System-On-Chip | ||
| - | ^ CPU/ | ||
| - | ^ Flash-Chip | ||
| - | ^ Flash size | 128 MiB | | ||
| - | ^ RAM | 128 MiB (Nanya NT5CC64M16GP) | ||
| - | ^ Wireless / 2.4 GHz | MT7602EN, b/g/n, MIMO 2x2 | | ||
| - | ^ Wireless / 5 GHz | MT7612EN, a/n/ac, MIMO 2x2 | | ||
| - | ^ Ethernet | ||
| - | ^ Switch | ||
| - | ^ Buttons | ||
| - | ^ USB | 1x 2.0 | | ||
| - | ^ Serial | ||
| - | ^ mPCIe | via J2 on PCB (Not soldered on the board) | | ||
| - | ^ JTAG | [[# | ||
| + | <!-- ToH: { | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | } --> | ||
| + | |||
| + | <!-- ToH: { | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | } --> | ||
| /*** if info available: uncomment and fill in | /*** if info available: uncomment and fill in | ||
| Line 148: | Line 198: | ||
| /* e.g. {{: | /* e.g. {{: | ||
| /* Thanks, your wiki administration - Oct. 2015 */ | /* Thanks, your wiki administration - Oct. 2015 */ | ||
| + | === Exterier Photo === | ||
| + | {{ : | ||
| + | {{ : | ||
| - | **Insert photo of front of the casing** | ||
| - | **Insert photo of back of the casing** | + | === Back Lable === |
| - | **Insert photo of backside label** | + | {{ : |
| - | **Insert photo of PCB** | + | === Photo of PCB === |
| + | {{ : | ||
| + | {{ : | ||
| ==== Opening the case ==== | ==== Opening the case ==== | ||
| Line 163: | Line 217: | ||
| </ | </ | ||
| - | ==== Serial | + | ==== UART ==== |
| - | -> [[docs: | + | |
| - | How to connect to the Serial Port of this specific device:\\ | + | ^ Serial connection parameters | 57600, 8N1, 3.3V | |
| - | **Insert photo of PCB with markings for serial port** | + | |
| - | + | ||
| - | <WRAP BOX> | + | |
| - | FIXME //Replace EXAMPLE by real values.// | + | |
| - | </ | + | |
| - | + | ||
| - | ^ Serial connection parameters\\ for WiFire S1500 NBN v4 | 57600, 8N1, 3.3V | | + | |
| **[J4] on PCB:** | **[J4] on PCB:** | ||
| Line 181: | Line 227: | ||
| ^4.| RX | | ^4.| RX | | ||
| + | {{: | ||
| ==== JTAG ==== | ==== JTAG ==== | ||
| - | -> [[docs: | ||
| How to connect to the JTAG Port of this specific device:\\ | How to connect to the JTAG Port of this specific device:\\ | ||
| - | **Insert photo of PCB with markings for JTAG port** | + | |
| + | {{: | ||
| ===== Stock firmware ===== | ===== Stock firmware ===== | ||
| Line 193: | Line 239: | ||
| v. 2.0.14 - (build @ 2017-03-17, 13:15:30) - No link | v. 2.0.14 - (build @ 2017-03-17, 13:15:30) - No link | ||
| | | ||
| + | |||
| + | === Memory === | ||
| + | |||
| + | ^mtd ^Partion ^Start ^End ^Байт ^Hex ^KiB ^MiB^ | ||
| + | |1 |Uboot |0 |100 000 |1 048 576 |100 000 |1 024 |1| | ||
| + | |2 |Factory |100 000 |200 000 |1 048 576 |100 000 |1 024 |1| | ||
| + | |3 |Sys_Data |200 000 |1 600 000 |20 971 520 |1 400 000 |20 480 |20| | ||
| + | |4 |Boot_Flag |1 600 000 |1 700 000 |1 048 576 |100 000 |1 024 |1| | ||
| + | |5 |Kernel_1 |1 700 000 |1B00 000 |4 194 304 |400 000 |4 096 |4| | ||
| + | |6 |Kernel_2 |1b00 000 |1F00 000 |4 194 304 |400 000 |4 096 |4| | ||
| + | |7 |RootFS_1 |1F00 000 |4D00 000 |48 234 496 |2E00 000 |47 104 |46| | ||
| + | |8 |RootFS_2 |4D00 000 |7B00 000 |48 234 496 |2E00 000 |47 104 |46| | ||
| + | |9 |Ftool |7B00 000 |7C00 000 |1 048 576 |100 000 |1 024 |1| | ||
| + | |10 |BCT |7C00 000 |7F80 000 |3 670 016 |380 000 |3 584 |3,5| | ||
| + | |-|Reserved |7F80 000 |8 000 000 |524 288 |80 000 |512 |0, | ||
| + | |0 |All |0 |7F80 000 |133 693 440 |7F80 000 |130 560 |127,5| | ||
| + | |||
| === Layout factory-data === | === Layout factory-data === | ||
| Line 214: | Line 277: | ||
| ^5g |*:10 |LAN +2| | ^5g |*:10 |LAN +2| | ||
| + | |||
| + | |||
| + | ===== Bootloader mods ===== | ||
| + | |||
| + | ==== Restoring the original U-boot bootloader and stock firmware | ||
| + | |||
| + | {{page> | ||
| + | |||
| + | **Input conditions: | ||
| + | * router with Breed bootloader installed | ||
| + | |||
| + | **You will need:** | ||
| + | * PC or Virtual machine with Linux | ||
| + | * mtd partitions backup (**uboot.bin** - //u-boot bootloader//, | ||
| + | * http server with mtd partitions backup (i.e. with IP 192.168.1.2) | ||
| + | * recovery image (see [[: | ||
| + | |||
| + | |||
| + | === U-Boot and stock firmware recovery steps === | ||
| + | |||
| + | **<color # | ||
| + | |||
| + | 1. Enter the Breed telnet shell (IP: 192.168.1.1) | ||
| + | |||
| + | 2. Download //Factory// backup from your http server and write it: | ||
| + | <code bash> | ||
| + | wget http:// | ||
| + | </ | ||
| + | <code bash> | ||
| + | flash erase 0x100000 0x100000 | ||
| + | </ | ||
| + | <code bash> | ||
| + | flash write 0x100000 0x80001000 0x100000 | ||
| + | </ | ||
| + | |||
| + | 3. Download //u-boot bootloader// | ||
| + | |||
| + | **<color # | ||
| + | |||
| + | <code bash> | ||
| + | wget http:// | ||
| + | </ | ||
| + | <code bash> | ||
| + | flash erase 0x0 0x100000 | ||
| + | </ | ||
| + | <code bash> | ||
| + | flash write 0x0 0x80001000 0x100000 | ||
| + | </ | ||
| + | |||
| + | 4. Check written data and reboot: | ||
| + | <code bash> | ||
| + | flash dump 0x0 | ||
| + | </ | ||
| + | <code bash> | ||
| + | flash dump 0x100000 | ||
| + | </ | ||
| + | |||
| + | 5. Use [[: | ||
| ===== Bootlogs ===== | ===== Bootlogs ===== | ||
| + | |||
| ==== OEM bootlog ==== | ==== OEM bootlog ==== | ||
| <WRAP bootlog> | <WRAP bootlog> | ||
| - | < | + | < |
| + | MT7621 | ||
| + | CPU=50000000 HZ BUS=16666666 HZ | ||
| + | ================================================================== | ||
| + | Change MPLL source from XTAL to CR... | ||
| + | do MEMPLL setting.. | ||
| + | MEMPLL Config : 0x11100000 | ||
| + | 3PLL mode + External loopback | ||
| + | === XTAL-40Mhz === DDR-1200Mhz === | ||
| + | PLL3 FB_DL: 0xa, 1/0 = 524/500 29000000 | ||
| + | PLL2 FB_DL: 0xf, 1/0 = 515/509 3D000000 | ||
| + | MEMPLL 3PLL mode calibration fail | ||
| + | do DDR setting..[00320381] | ||
| + | Apply DDR3 Setting...(use customer AC) | ||
| + | 0 8 | ||
| + | -------------------------------------------------------------------------------- | ||
| + | 0000: | ||
| + | 0001: | ||
| + | 0002: | ||
| + | 0003: | ||
| + | 0004: | ||
| + | 0005: | ||
| + | 0006: | ||
| + | 0007: | ||
| + | 0008: | ||
| + | 0009: | ||
| + | 000A: | ||
| + | 000B: | ||
| + | 000C: | ||
| + | 000D: | ||
| + | 000E: | ||
| + | 000F: | ||
| + | 0010: | ||
| + | 0011: | ||
| + | 0012: | ||
| + | 0013: | ||
| + | 0014: | ||
| + | 0015: | ||
| + | 0016: | ||
| + | 0017: | ||
| + | 0018: | ||
| + | 0019: | ||
| + | 001A: | ||
| + | 001B: | ||
| + | 001C: | ||
| + | 001D: | ||
| + | 001E: | ||
| + | 001F: | ||
| + | rank 0 coarse = 16 | ||
| + | rank 0 fine = 40 | ||
| + | B:| 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 | ||
| + | opt_dle value:10 | ||
| + | DRAMC_R0DELDLY[018]=00002223 | ||
| + | ================================================================== | ||
| + | RX DQS perbit delay software calibration | ||
| + | ================================================================== | ||
| + | 1.0-15 bit dq delay value | ||
| + | ================================================================== | ||
| + | bit| | ||
| + | -------------------------------------- | ||
| + | 0 | 10 9 10 10 7 7 9 6 5 7 | ||
| + | 10 | 8 9 9 10 8 10 | ||
| + | -------------------------------------- | ||
| + | |||
| + | ================================================================== | ||
| + | 2.dqs window | ||
| + | x=pass dqs delay value (min~max)center | ||
| + | y=0-7bit DQ of every group | ||
| + | input delay:DQS0 =35 DQS1 = 34 | ||
| + | ================================================================== | ||
| + | bit | ||
| + | 0 (1~66)33 | ||
| + | 1 (1~69)35 | ||
| + | 2 (1~68)34 | ||
| + | 3 (1~66)33 | ||
| + | 4 (1~65)33 | ||
| + | 5 (1~68)34 | ||
| + | 6 (1~66)33 | ||
| + | 7 (1~66)33 | ||
| + | ================================================================== | ||
| + | 3.dq delay value last | ||
| + | ================================================================== | ||
| + | bit| 0 1 2 3 4 5 6 7 8 9 | ||
| + | -------------------------------------- | ||
| + | 0 | 12 9 11 12 9 8 11 8 6 7 | ||
| + | 10 | 8 10 10 11 8 10 | ||
| + | ================================================================== | ||
| + | ================================================================== | ||
| + | | ||
| + | ================================================================== | ||
| + | DQS loop = 15, cmp_err_1 = ffff0000 | ||
| + | dqs_perbyte_dly.last_dqsdly_pass[0]=15, | ||
| + | dqs_perbyte_dly.last_dqsdly_pass[1]=15, | ||
| + | DQ loop=15, cmp_err_1 = ffff0000 | ||
| + | dqs_perbyte_dly.last_dqdly_pass[0]=15, | ||
| + | dqs_perbyte_dly.last_dqdly_pass[1]=15, | ||
| + | byte:0, (DQS, | ||
| + | byte:1, (DQS, | ||
| + | 20, | ||
| + | [EMI] DRAMC calibration passed | ||
| + | |||
| + | =================================================================== | ||
| + | MT7621 | ||
| + | CPU=50000000 HZ BUS=16666666 HZ | ||
| + | =================================================================== | ||
| + | |||
| + | |||
| + | U-Boot 1.1.3 (Apr 22 2016 - 16:35:20) | ||
| + | |||
| + | Board: Ralink APSoC DRAM: 128 MB | ||
| + | relocate_code Pointer at: 87fac000 | ||
| + | |||
| + | Config XHCI 40M PLL | ||
| + | Allocate 16 byte aligned buffer: 87fe0050 | ||
| + | Enable NFI Clock | ||
| + | # MTK NAND # : Use HW ECC | ||
| + | NAND ID [C8 D1 80 95 40] | ||
| + | Device not found, ID: c8d1 | ||
| + | Not Support this Device! | ||
| + | chip_mode=00000001 | ||
| + | Support this Device in MTK table! c8d1 | ||
| + | select_chip | ||
| + | [NAND]select ecc bit:4, sparesize :64 spare_per_sector=16 | ||
| + | Signature matched and data read! | ||
| + | load_fact_bbt success 2047 | ||
| + | load fact bbt success | ||
| + | [mtk_nand] probe successfully! | ||
| + | mtd-> | ||
| + | Env addr : 0x80000 | ||
| + | ..============================================ | ||
| + | Ralink UBoot Version: 4.2.0.6 | ||
| + | -------------------------------------------- | ||
| + | ASIC MT7621A DualCore (MAC to MT7530 Mode) | ||
| + | DRAM_CONF_FROM: | ||
| + | DRAM_TYPE: DDR3 | ||
| + | DRAM bus: 16 bit | ||
| + | Xtal Mode=3 OCP Ratio=1/3 | ||
| + | Flash component: NAND Flash | ||
| + | Date:Apr 22 2016 Time: | ||
| + | ============================================ | ||
| + | icache: sets:256, ways:4, linesz:32 , | ||
| + | dcache: sets:256, ways:4, linesz:32 , | ||
| + | |||
| + | ##### The CPU freq = 880 MHZ #### | ||
| + | | ||
| + | # | ||
| + | set LAN/WAN LLLLW | ||
| + | ..Example expects ABI version 2 | ||
| + | Actual U-Boot ABI version 2 | ||
| + | |||
| + | ****************************************** | ||
| + | Uboot StandAlone Entry | ||
| + | ****************************************** | ||
| + | 0, cmd | ||
| + | 1, 0x0000000D | ||
| + | cmd : 0x0000000D | ||
| + | |||
| + | |||
| + | Press Ctrl+C to Enter the Main loop... | ||
| + | 0 Example expects ABI version 2 | ||
| + | Actual U-Boot ABI version 2 | ||
| + | |||
| + | ****************************************** | ||
| + | Uboot StandAlone Entry | ||
| + | ****************************************** | ||
| + | 0, boot | ||
| + | Flash Sector Number : 1024. | ||
| + | |||
| + | *************************************************** | ||
| + | Sercomm Boot Version 1.14.0 | ||
| + | |||
| + | *************************************************** | ||
| + | Entering Firmware : Everything is OK. | ||
| + | Begin to verify the backup image... | ||
| + | kernel addr: 0x1B00100 | ||
| + | ........................................calculate_kernel_crc: | ||
| + | ok! | ||
| + | Second image selected | ||
| + | kernel addr : | ||
| + | kernel addr : | ||
| + | ## Booting image at c1700100 ... | ||
| + | Image Name: Linux Kernel Image | ||
| + | Image Type: MIPS Linux Kernel Image (lzma compressed) | ||
| + | Data Size: 2495604 Bytes = 2.4 MB | ||
| + | Load Address: 80001000 | ||
| + | Entry Point: | ||
| + | ....................................... | ||
| + | | ||
| + | |||
| + | |||
| + | |||
| + | commandline in boot is : console=ttyS1, | ||
| + | |||
| + | |||
| + | |||
| + | No initrd | ||
| + | ## Transferring control to Linux (at address 8000f540) ... | ||
| + | ## Giving linux memsize in MB, 128 | ||
| + | |||
| + | Starting kernel ... | ||
| + | |||
| + | |||
| + | LINUX started... | ||
| + | |||
| + | THIS IS ASIC | ||
| + | Linux version 2.6.36+ (evan_dai@ubuntu) (gcc version 4.6.3 (Buildroot 2012.11.1) ) #1 SMP PREEMPT Tue Apr 26 22:33:56 CST 2016 | ||
| + | |||
| + | The CPU feqenuce set to 880 MHz | ||
| + | GCMP present | ||
| + | CPU revision is: 0001992f (MIPS 1004Kc) | ||
| + | Software DMA cache coherency | ||
| + | Determined physical RAM map: | ||
| + | | ||
| + | Zone PFN ranges: | ||
| + | Normal | ||
| + | Movable zone start PFN for each node | ||
| + | early_node_map[1] active PFN ranges | ||
| + | 0: 0x00000000 -> 0x00008000 | ||
| + | Detected 3 available secondary CPU(s) | ||
| + | PERCPU: Embedded 7 pages/cpu @81103000 s7040 r8192 d13440 u65536 | ||
| + | pcpu-alloc: s7040 r8192 d13440 u65536 alloc=16*4096 | ||
| + | pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 | ||
| + | Built 1 zonelists in Zone order, mobility grouping on. Total pages: 32512 | ||
| + | Kernel command line: console=ttyS1, | ||
| + | PID hash table entries: 512 (order: -1, 2048 bytes) | ||
| + | Dentry cache hash table entries: 16384 (order: 4, 65536 bytes) | ||
| + | Inode-cache hash table entries: 8192 (order: 3, 32768 bytes) | ||
| + | Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes. | ||
| + | Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes | ||
| + | MIPS secondary cache 256kB, 8-way, linesize 32 bytes. | ||
| + | Writing ErrCtl register=00014dce | ||
| + | Readback ErrCtl register=00014dce | ||
| + | Memory: 122300k/ | ||
| + | Hierarchical RCU implementation. | ||
| + | Verbose stalled-CPUs detection is disabled. | ||
| + | NR_IRQS: | ||
| + | Trying to install interrupt handler for IRQ24 | ||
| + | Trying to install interrupt handler for IRQ25 | ||
| + | Trying to install interrupt handler for IRQ22 | ||
| + | Trying to install interrupt handler for IRQ9 | ||
| + | Trying to install interrupt handler for IRQ10 | ||
| + | Trying to install interrupt handler for IRQ11 | ||
| + | Trying to install interrupt handler for IRQ12 | ||
| + | Trying to install interrupt handler for IRQ13 | ||
| + | Trying to install interrupt handler for IRQ14 | ||
| + | Trying to install interrupt handler for IRQ16 | ||
| + | Trying to install interrupt handler for IRQ17 | ||
| + | Trying to install interrupt handler for IRQ18 | ||
| + | Trying to install interrupt handler for IRQ19 | ||
| + | Trying to install interrupt handler for IRQ20 | ||
| + | Trying to install interrupt handler for IRQ21 | ||
| + | Trying to install interrupt handler for IRQ23 | ||
| + | Trying to install interrupt handler for IRQ26 | ||
| + | Trying to install interrupt handler for IRQ27 | ||
| + | Trying to install interrupt handler for IRQ28 | ||
| + | Trying to install interrupt handler for IRQ15 | ||
| + | Trying to install interrupt handler for IRQ8 | ||
| + | Trying to install interrupt handler for IRQ29 | ||
| + | Trying to install interrupt handler for IRQ30 | ||
| + | Trying to install interrupt handler for IRQ31 | ||
| + | console [ttyS1] enabled | ||
| + | Calibrating delay loop... 577.53 BogoMIPS (lpj=1155072) | ||
| + | pid_max: default: 32768 minimum: 301 | ||
| + | Mount-cache hash table entries: 512 | ||
| + | launch: starting cpu1 | ||
| + | launch: cpu1 gone! | ||
| + | CPU revision is: 0001992f (MIPS 1004Kc) | ||
| + | Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes. | ||
| + | Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes | ||
| + | MIPS secondary cache 256kB, 8-way, linesize 32 bytes. | ||
| + | launch: starting cpu2 | ||
| + | launch: cpu2 gone! | ||
| + | CPU revision is: 0001992f (MIPS 1004Kc) | ||
| + | Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes. | ||
| + | Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes | ||
| + | MIPS secondary cache 256kB, 8-way, linesize 32 bytes. | ||
| + | launch: starting cpu3 | ||
| + | launch: cpu3 gone! | ||
| + | CPU revision is: 0001992f (MIPS 1004Kc) | ||
| + | Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes. | ||
| + | Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes | ||
| + | MIPS secondary cache 256kB, 8-way, linesize 32 bytes. | ||
| + | Brought up 4 CPUs | ||
| + | Synchronize counters across 4 CPUs: done. | ||
| + | NET: Registered protocol family 16 | ||
| + | release PCIe RST: RALINK_RSTCTRL = 7000000 | ||
| + | PCIE PHY initialize | ||
| + | ***** Xtal 40MHz ***** | ||
| + | start MT7621 PCIe register access | ||
| + | RALINK_RSTCTRL = 7000000 | ||
| + | RALINK_CLKCFG1 = 77ffeff8 | ||
| + | |||
| + | *************** MT7621 PCIe RC mode ************* | ||
| + | PCIE2 no card, disable it(RST& | ||
| + | pcie_link status = 0x3 | ||
| + | RALINK_RSTCTRL= 3000000 | ||
| + | *** Configure Device number setting of Virtual PCI-PCI bridge *** | ||
| + | RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2 | ||
| + | PCIE0 enabled | ||
| + | PCIE1 enabled | ||
| + | interrupt enable status: 300000 | ||
| + | Port 1 N_FTS = 1b105000 | ||
| + | Port 0 N_FTS = 1b105000 | ||
| + | config reg done | ||
| + | init_rt2880pci done | ||
| + | bio: create slab < | ||
| + | vgaarb: loaded | ||
| + | SCSI subsystem initialized | ||
| + | usbcore: registered new interface driver usbfs | ||
| + | usbcore: registered new interface driver hub | ||
| + | usbcore: registered new device driver usb | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | pci 0000: | ||
| + | PCI: Enabling device 0000: | ||
| + | PCI: Enabling device 0000: | ||
| + | BAR0 at slot 0 = 0 | ||
| + | bus=0x0, slot = 0x0 | ||
| + | res[0]-> | ||
| + | res[0]-> | ||
| + | res[1]-> | ||
| + | res[1]-> | ||
| + | res[2]-> | ||
| + | res[2]-> | ||
| + | res[3]-> | ||
| + | res[3]-> | ||
| + | res[4]-> | ||
| + | res[4]-> | ||
| + | res[5]-> | ||
| + | res[5]-> | ||
| + | BAR0 at slot 1 = 0 | ||
| + | bus=0x0, slot = 0x1 | ||
| + | res[0]-> | ||
| + | res[0]-> | ||
| + | res[1]-> | ||
| + | res[1]-> | ||
| + | res[2]-> | ||
| + | res[2]-> | ||
| + | res[3]-> | ||
| + | res[3]-> | ||
| + | res[4]-> | ||
| + | res[4]-> | ||
| + | res[5]-> | ||
| + | res[5]-> | ||
| + | bus=0x1, slot = 0x0, irq=0x4 | ||
| + | res[0]-> | ||
| + | res[0]-> | ||
| + | res[1]-> | ||
| + | res[1]-> | ||
| + | res[2]-> | ||
| + | res[2]-> | ||
| + | res[3]-> | ||
| + | res[3]-> | ||
| + | res[4]-> | ||
| + | res[4]-> | ||
| + | res[5]-> | ||
| + | res[5]-> | ||
| + | bus=0x2, slot = 0x1, irq=0x18 | ||
| + | res[0]-> | ||
| + | res[0]-> | ||
| + | res[1]-> | ||
| + | res[1]-> | ||
| + | res[2]-> | ||
| + | res[2]-> | ||
| + | res[3]-> | ||
| + | res[3]-> | ||
| + | res[4]-> | ||
| + | res[4]-> | ||
| + | res[5]-> | ||
| + | res[5]-> | ||
| + | Switching to clocksource MIPS | ||
| + | NET: Registered protocol family 2 | ||
| + | IP route cache hash table entries: 1024 (order: 0, 4096 bytes) | ||
| + | TCP established hash table entries: 4096 (order: 3, 32768 bytes) | ||
| + | TCP bind hash table entries: 4096 (order: 4, 81920 bytes) | ||
| + | TCP: Hash tables configured (established 4096 bind 4096) | ||
| + | TCP reno registered | ||
| + | UDP hash table entries: 128 (order: 0, 6144 bytes) | ||
| + | UDP-Lite hash table entries: 128 (order: 0, 6144 bytes) | ||
| + | NET: Registered protocol family 1 | ||
| + | 4 CPUs re-calibrate udelay(lpj = 1167360) | ||
| + | squashfs: version 4.0 (2009/ | ||
| + | NTFS driver 2.1.29 [Flags: R/W]. | ||
| + | fuse init (API version 7.15) | ||
| + | msgmni has been set to 238 | ||
| + | Block layer SCSI generic (bsg) driver version 0.4 loaded (major 254) | ||
| + | io scheduler noop registered (default) | ||
| + | Ralink gpio driver initialized | ||
| + | Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled | ||
| + | serial8250: ttyS0 at MMIO 0x1e000d00 (irq = 27) is a 16550A | ||
| + | serial8250: ttyS1 at MMIO 0x1e000c00 (irq = 26) is a 16550A | ||
| + | brd: module loaded | ||
| + | MediaTek Nand driver init, version v2.1 Fix AHB virt2phys error | ||
| + | Allocate 16 byte aligned buffer: 8073c9d0 | ||
| + | Enable NFI Clock | ||
| + | # MTK NAND # : Use HW ECC | ||
| + | NAND ID [C8 D1 80 95 40, 00809540] | ||
| + | Device not found, ID: c8d1 | ||
| + | Not Support this Device! | ||
| + | chip_mode=00000001 | ||
| + | [NAND] pagesz:2048 , oobsz: 288, | ||
| + | Support this Device in MTK table! c8d1 | ||
| + | NAND device: Manufacturer ID: 0xc8, Chip ID: 0xd1 (Unknown NAND 128MiB 3,3V 8-bit) | ||
| + | [NAND]select ecc bit:4, sparesize :64 spare_per_sector=16 | ||
| + | Signature matched and data read! | ||
| + | load_fact_bbt success 1023 | ||
| + | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
| + | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
| + | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
| + | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
| + | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
| + | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
| + | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
| + | 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ||
| + | mtd: partition " | ||
| + | [mtk_nand] probe successfully! | ||
| + | UBI: attaching mtd8 to ubi0 | ||
| + | UBI: physical eraseblock size: | ||
| + | UBI: logical eraseblock size: 126976 bytes | ||
| + | UBI: smallest flash I/O unit: 2048 | ||
| + | UBI: VID header offset: | ||
| + | UBI: data offset: | ||
| + | UBI: max. sequence number: | ||
| + | UBI: attached mtd8 to ubi0 | ||
| + | UBI: MTD device name: " | ||
| + | UBI: MTD device size: 46 MiB | ||
| + | UBI: number of good PEBs: 368 | ||
| + | UBI: number of bad PEBs: 0 | ||
| + | UBI: max. allowed volumes: | ||
| + | UBI: wear-leveling threshold: | ||
| + | UBI: number of internal volumes: 1 | ||
| + | UBI: number of user volumes: | ||
| + | UBI: available PEBs: 0 | ||
| + | UBI: total number of reserved PEBs: 368 | ||
| + | UBI: number of PEBs reserved for bad PEB handling: 3 | ||
| + | UBI: max/mean erase counter: 2/0 | ||
| + | UBI: image sequence number: | ||
| + | UBI: background thread " | ||
| + | GMAC1_MAC_ADRH -- : 0x0000000c | ||
| + | GMAC1_MAC_ADRL -- : 0x4328800b | ||
| + | Ralink APSoC Ethernet Driver Initilization. v3.1 512 rx/tx descriptors allocated, mtu = 1500! | ||
| + | GMAC1_MAC_ADRH -- : 0x0000000c | ||
| + | GMAC1_MAC_ADRL -- : 0x432880c5 | ||
| + | PROC INIT OK! | ||
| + | PPP generic driver version 2.4.2 | ||
| + | PPP BSD Compression module registered | ||
| + | PPP MPPE Compression module registered | ||
| + | NET: Registered protocol family 24 | ||
| + | PPTP driver version 0.8.5 | ||
| + | IMQ driver loaded successfully. | ||
| + | Hooking IMQ after NAT on PREROUTING. | ||
| + | Hooking IMQ before NAT on POSTROUTING. | ||
| + | usbcore: registered new interface driver catc | ||
| + | catc: v2.8:CATC EL1210A NetMate USB Ethernet driver | ||
| + | usbcore: registered new interface driver asix | ||
| + | usbcore: registered new interface driver ax88179_178a | ||
| + | usbcore: registered new interface driver cdc_ether | ||
| + | usbcore: registered new interface driver net1080 | ||
| + | usbcore: registered new interface driver cdc_subset | ||
| + | usbcore: registered new interface driver zaurus | ||
| + | register rt2860 | ||
| + | |||
| + | |||
| + | === pAd = c0202000, size = 1428136 === | ||
| + | |||
| + | <-- RTMPAllocTxRxRingMemory, | ||
| + | <-- RTMPAllocAdapterBlock, | ||
| + | pAd-> | ||
| + | device_id =0x7662 | ||
| + | ==> | ||
| + | ====> mt76x2_ePA_per_rate_compensate_init: | ||
| + | RtmpChipOpsEepromHook:: | ||
| + | RtmpEepromGetDefault:: | ||
| + | NVM is FLASH mode | ||
| + | |||
| + | |||
| + | === pAd = c0482000, size = 1428136 === | ||
| + | |||
| + | <-- RTMPAllocTxRxRingMemory, | ||
| + | <-- RTMPAllocAdapterBlock, | ||
| + | pAd-> | ||
| + | device_id =0x7662 | ||
| + | ==> | ||
| + | ====> mt76x2_ePA_per_rate_compensate_init: | ||
| + | RtmpChipOpsEepromHook:: | ||
| + | RtmpEepromGetDefault:: | ||
| + | NVM is FLASH mode | ||
| + | FM_OUT value: u4FmOut = 0(0x00000000) | ||
| + | FM_OUT value: u4FmOut = 0(0x00000000) | ||
| + | FM_OUT value: u4FmOut = 0(0x00000000) | ||
| + | FM_OUT value: u4FmOut = 0(0x00000000) | ||
| + | FM_OUT value: u4FmOut = 0(0x00000000) | ||
| + | FM_OUT value: u4FmOut = 0(0x00000000) | ||
| + | FM_OUT value: u4FmOut = 0(0x00000000) | ||
| + | FM_OUT value: u4FmOut = 0(0x00000000) | ||
| + | FM_OUT value: u4FmOut = 0(0x00000000) | ||
| + | FM_OUT value: u4FmOut = 0(0x00000000) | ||
| + | FM_OUT value: u4FmOut = 0(0x00000000) | ||
| + | FM_OUT value: u4FmOut = 0(0x00000000) | ||
| + | FM_OUT value: u4FmOut = 0(0x00000000) | ||
| + | FM_OUT value: u4FmOut = 0(0x00000000) | ||
| + | FM_OUT value: u4FmOut = 0(0x00000000) | ||
| + | FM_OUT value: u4FmOut = 0(0x00000000) | ||
| + | FM_OUT value: u4FmOut = 0(0x00000000) | ||
| + | FM_OUT value: u4FmOut = 0(0x00000000) | ||
| + | FM_OUT value: u4FmOut = 0(0x00000000) | ||
| + | FM_OUT value: u4FmOut = 0(0x00000000) | ||
| + | xhc_mtk xhc_mtk: xHCI Host Controller | ||
| + | xhc_mtk xhc_mtk: new USB bus registered, assigned bus number 1 | ||
| + | xhc_mtk xhc_mtk: irq 22, io mem 0x1e1c0000 | ||
| + | usb usb1: New USB device found, idVendor=1d6b, | ||
| + | usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 | ||
| + | usb usb1: Product: xHCI Host Controller | ||
| + | usb usb1: Manufacturer: | ||
| + | usb usb1: SerialNumber: | ||
| + | hub 1-0:1.0: USB hub found | ||
| + | hub 1-0:1.0: 2 ports detected | ||
| + | xhc_mtk xhc_mtk: xHCI Host Controller | ||
| + | xhc_mtk xhc_mtk: new USB bus registered, assigned bus number 2 | ||
| + | usb usb2: New USB device found, idVendor=1d6b, | ||
| + | usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 | ||
| + | usb usb2: Product: xHCI Host Controller | ||
| + | usb usb2: Manufacturer: | ||
| + | usb usb2: SerialNumber: | ||
| + | hub 2-0:1.0: USB hub found | ||
| + | hub 2-0:1.0: 1 port detected | ||
| + | Initializing USB Mass Storage driver... | ||
| + | usbcore: registered new interface driver usb-storage | ||
| + | USB Mass Storage support registered. | ||
| + | Ralink APSoC Hardware Watchdog Timer | ||
| + | Netfilter messages via NETLINK v0.30. | ||
| + | nf_conntrack version 0.5.0 (1910 buckets, 7640 max) | ||
| + | GRE over IPv4 demultiplexor driver | ||
| + | gre: can't add protocol | ||
| + | ip_tables: (C) 2000-2006 Netfilter Core Team, Type=Linux | ||
| + | TCP cubic registered | ||
| + | NET: Registered protocol family 10 | ||
| + | lo: Disabled Privacy Extensions | ||
| + | ip6_tables: (C) 2000-2006 Netfilter Core Team | ||
| + | NET: Registered protocol family 17 | ||
| + | Bridge firewalling registered | ||
| + | Ebtables v2.0 registered | ||
| + | 802.1Q VLAN Support v1.8 Ben Greear < | ||
| + | All bugs added by David S. Miller < | ||
| + | UBIFS: mounted UBI device 0, volume 0, name " | ||
| + | UBIFS: file system size: | ||
| + | UBIFS: journal size: | ||
| + | UBIFS: media format: | ||
| + | UBIFS: default compressor: zlib | ||
| + | UBIFS: reserved for root: 0 bytes (0 KiB) | ||
| + | VFS: Mounted root (ubifs filesystem) on device 0:12. | ||
| + | Started WatchDog Timer. | ||
| + | Freeing unused kernel memory: 216k freed | ||
| + | init started: BusyBox v1.15.3 () | ||
| + | starting pid 62, tty '': | ||
| + | Algorithmics/ | ||
| + | UBI: attaching mtd3 to ubi3 | ||
| + | UBI: physical eraseblock size: | ||
| + | UBI: logical eraseblock size: 126976 bytes | ||
| + | UBI: smallest flash I/O unit: 2048 | ||
| + | UBI: VID header offset: | ||
| + | UBI: data offset: | ||
| + | UBI: max. sequence number: | ||
| + | UBI: attached mtd3 to ubi3 | ||
| + | UBI: MTD device name: " | ||
| + | UBI: MTD device size: 20 MiB | ||
| + | UBI: number of good PEBs: 160 | ||
| + | UBI: number of bad PEBs: 0 | ||
| + | UBI: max. allowed volumes: | ||
| + | UBI: wear-leveling threshold: | ||
| + | UBI: number of internal volumes: 1 | ||
| + | UBI: number of user volumes: | ||
| + | UBI: available PEBs: 0 | ||
| + | UBI: total number of reserved PEBs: 160 | ||
| + | UBI: number of PEBs reserved for bad PEB handling: 2 | ||
| + | UBI: max/mean erase counter: 2/0 | ||
| + | UBI: image sequence number: | ||
| + | UBI: background thread " | ||
| + | UBI device number 3, total 160 LEBs (20316160 bytes, 19.4 MiB), available 0 LEBs (0 bytes), LEB size 126976 bytes (124.0 KiB) | ||
| + | UBIFS: recovery needed | ||
| + | UBIFS: recovery completed | ||
| + | UBIFS: mounted UBI device 3, volume 0, name " | ||
| + | UBIFS: file system size: | ||
| + | UBIFS: journal size: | ||
| + | UBIFS: media format: | ||
| + | UBIFS: default compressor: zlib | ||
| + | UBIFS: reserved for root: 0 bytes (0 KiB) | ||
| + | sc_drv: module license ' | ||
| + | Disabling lock debugging due to kernel taint | ||
| + | starting pid 109, tty '': | ||
| + | Raeth v3.1 (Tasklet) | ||
| + | phy_free_head is 0x72dc000!!! | ||
| + | phy_free_tail_phy is 0x72ddff0!!! | ||
| + | txd_pool=a72de000 phy_txd_pool=072DE000 | ||
| + | ei_local-> | ||
| + | free_txd: a72de010, ei_local-> | ||
| + | | ||
| + | ----------------+---------+-------- | ||
| + | | ||
| + | |||
| + | phy_qrx_ring = 0x072d5000, qrx_ring = 0xa72d5000 | ||
| + | |||
| + | phy_rx_ring0 = 0x072e0000, rx_ring0 = 0xa72e0000 | ||
| + | change HW-TRAP to 0x17ccf | ||
| + | set LAN/WAN LLLLW | ||
| + | GMAC1_MAC_ADRH -- : 0x0000e060 | ||
| + | GMAC1_MAC_ADRL -- : 0x66543201 | ||
| + | CDMA_CSG_CFG = 81000000 | ||
| + | GDMA1_FWD_CFG = 20710000 | ||
| + | switch reg write offset=2004, | ||
| + | switch reg write offset=2104, | ||
| + | switch reg write offset=2204, | ||
| + | switch reg write offset=2304, | ||
| + | switch reg write offset=2404, | ||
| + | switch reg write offset=2504, | ||
| + | switch reg write offset=2010, | ||
| + | switch reg write offset=2110, | ||
| + | switch reg write offset=2210, | ||
| + | switch reg write offset=2310, | ||
| + | switch reg write offset=2410, | ||
| + | switch reg write offset=2510, | ||
| + | switch reg write offset=2610, | ||
| + | switch reg write offset=2710, | ||
| + | switch reg write offset=2604, | ||
| + | switch reg write offset=2704, | ||
| + | Special Tag Disabled | ||
| + | switch reg write offset=2610, | ||
| + | switch reg write offset=2014, | ||
| + | switch reg write offset=2114, | ||
| + | switch reg write offset=2214, | ||
| + | switch reg write offset=2314, | ||
| + | switch reg write offset=2414, | ||
| + | switch reg write offset=2514, | ||
| + | REG_ESW_WT_MAC_ATC is 0x7ff0002 | ||
| + | done. | ||
| + | |||
| + | (none) login: ap_name=syslogd, | ||
| + | init common module successful | ||
| + | insert firewall block module success | ||
| + | netfilter tcp syn flood module loaded | ||
| + | netfilter other dos module loaded | ||
| + | netfilter brdcstSrc dos module loaded | ||
| + | ap_name=dnrd, | ||
| + | ap_name=phy, | ||
| + | switch reg write offset=2014, | ||
| + | switch reg write offset=2114, | ||
| + | switch reg write offset=2214, | ||
| + | switch reg write offset=2314, | ||
| + | switch reg write offset=2414, | ||
| + | switch reg write offset=2614, | ||
| + | REG_ESW_WT_MAC_ATC is 0x7ff0002 | ||
| + | done. | ||
| + | Set: phy[0].reg[0] = 3300 | ||
| + | Set: phy[1].reg[0] = 3300 | ||
| + | Set: phy[2].reg[0] = 3300 | ||
| + | Set: phy[3].reg[0] = 3300 | ||
| + | interface eth2.1 does not exist! | ||
| + | Set: phy[31].reg[24] = 2ff70 | ||
| + | Set: phy[31].reg[12512] = 2125 | ||
| + | ap_name=wlan, | ||
| + | ap_name=lanip, | ||
| + | ap_name=firewall, | ||
| + | build time = | ||
| + | 20141115060606a | ||
| + | rom patch for E3 IC | ||
| + | |||
| + | platform = | ||
| + | ALPS | ||
| + | hw/sw version = | ||
| + | �� | ||
| + | patch version = | ||
| + | |||
| + | FW Version: | ||
| + | Build Time: | ||
| + | fw for E3 IC | ||
| + | RX[0] DESC a76c2000 size = 4096 | ||
| + | RX[1] DESC a76c3000 size = 4096 | ||
| + | E2pAccessMode=2 | ||
| + | cfg_mode=9 | ||
| + | cfg_mode=9 | ||
| + | wmode_band_equal(): | ||
| + | APSDCapable[0]=0 | ||
| + | APSDCapable[1]=0 | ||
| + | APSDCapable[2]=0 | ||
| + | APSDCapable[3]=0 | ||
| + | APSDCapable[4]=0 | ||
| + | APSDCapable[5]=0 | ||
| + | APSDCapable[6]=0 | ||
| + | APSDCapable[7]=0 | ||
| + | APSDCapable[8]=0 | ||
| + | APSDCapable[9]=0 | ||
| + | lan interface=[br0], | ||
| + | APSDCapable[10]=0 | ||
| + | APSDCapable[11]=0 | ||
| + | APSDCapable[12]=0 | ||
| + | APSDCapable[13]=0 | ||
| + | APSDCapable[14]=0 | ||
| + | APSDCapable[15]=0 | ||
| + | Key2Str is Invalid key length(0) or Type(0) | ||
| + | Key3Str is Invalid key length(0) or Type(0) | ||
| + | Key4Str is Invalid key length(0) or Type(0) | ||
| + | RtmpOSFileOpen(): | ||
| + | --> Error opening / | ||
| + | 1. Phy Mode = 14 | ||
| + | get_chl_grp: | ||
| + | get_chl_grp: | ||
| + | get_chl_grp: | ||
| + | get_chl_grp: | ||
| + | get_chl_grp: | ||
| + | get_chl_grp: | ||
| + | drivers/ | ||
| + | Country Region from e2p = ffff | ||
| + | mt76x2_read_temp_info_from_eeprom:: | ||
| + | mt76x2_read_tx_alc_info_from_eeprom:: | ||
| + | mt76x2_read_tx_alc_info_from_eeprom:: | ||
| + | mt76x2_read_tx_alc_info_from_eeprom:: | ||
| + | mt76x2_read_tx_alc_info_from_eeprom:: | ||
| + | mt76x2_read_tx_alc_info_from_eeprom:: | ||
| + | mt76x2_get_external_lna_gain:: | ||
| + | 2. Phy Mode = 14 | ||
| + | 3. Phy Mode = 14 | ||
| + | andes_pci_fw_init | ||
| + | 0x1300 = 00073200 | ||
| + | AntCfgInit: primary/ | ||
| + | andes_load_cr: | ||
| + | ChipStructAssign(): | ||
| + | RTMPSetPhyMode: | ||
| + | MCS Set = ff ff 00 00 01 | ||
| + | TX0 power compensation = 0x38 | ||
| + | TX1 power compensation = 0x38 | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | SYNC - BBP R4 to 20MHz.l | ||
| + | mt76x2_single_sku:: | ||
| + | SYNC - BBP R4 to 20MHz.l | ||
| + | mt76x2_single_sku:: | ||
| + | SYNC - BBP R4 to 20MHz.l | ||
| + | mt76x2_single_sku:: | ||
| + | SYNC - BBP R4 to 20MHz.l | ||
| + | mt76x2_single_sku:: | ||
| + | SYNC - BBP R4 to 20MHz.l | ||
| + | mt76x2_single_sku:: | ||
| + | SYNC - BBP R4 to 20MHz.l | ||
| + | mt76x2_single_sku:: | ||
| + | SYNC - BBP R4 to 20MHz.l | ||
| + | mt76x2_single_sku:: | ||
| + | SYNC - BBP R4 to 20MHz.l | ||
| + | mt76x2_single_sku:: | ||
| + | SYNC - BBP R4 to 20MHz.l | ||
| + | mt76x2_single_sku:: | ||
| + | SYNC - BBP R4 to 20MHz.l | ||
| + | mt76x2_single_sku:: | ||
| + | SYNC - BBP R4 to 20MHz.l | ||
| + | mt76x2_bbp_adjust(): | ||
| + | mt76x2_single_sku:: | ||
| + | APStartUp(): | ||
| + | Main bssid = e0: | ||
| + | mt76x2_reinit_agc_gain: | ||
| + | mt76x2_reinit_agc_gain: | ||
| + | mt76x2_reinit_hi_lna_gain: | ||
| + | mt76x2_reinit_hi_lna_gain: | ||
| + | <==== rt28xx_init, | ||
| + | RTMPDrvOpen(1): | ||
| + | RTMPDrvOpen(2): | ||
| + | build time = | ||
| + | 20141115060606a | ||
| + | rom patch for E3 IC | ||
| + | |||
| + | platform = | ||
| + | ALPS | ||
| + | hw/sw version = | ||
| + | �� | ||
| + | patch version = | ||
| + | |||
| + | FW Version: | ||
| + | Build Time: | ||
| + | fw for E3 IC | ||
| + | RX[0] DESC a74fd000 size = 4096 | ||
| + | RX[1] DESC a74fe000 size = 4096 | ||
| + | E2pAccessMode=2 | ||
| + | cfg_mode=14 | ||
| + | cfg_mode=14 | ||
| + | wmode_band_equal(): | ||
| + | APSDCapable[0]=0 | ||
| + | APSDCapable[1]=0 | ||
| + | APSDCapable[2]=0 | ||
| + | APSDCapable[3]=0 | ||
| + | APSDCapable[4]=0 | ||
| + | APSDCapable[5]=0 | ||
| + | APSDCapable[6]=0 | ||
| + | APSDCapable[7]=0 | ||
| + | APSDCapable[8]=0 | ||
| + | APSDCapable[9]=0 | ||
| + | APSDCapable[10]=0 | ||
| + | APSDCapable[11]=0 | ||
| + | APSDCapable[12]=0 | ||
| + | APSDCapable[13]=0 | ||
| + | APSDCapable[14]=0 | ||
| + | APSDCapable[15]=0 | ||
| + | Key1Str is Invalid key length(0) or Type(0) | ||
| + | Key3Str is Invalid key length(0) or Type(0) | ||
| + | Key4Str is Invalid key length(0) or Type(0) | ||
| + | RtmpOSFileOpen(): | ||
| + | --> Error opening / | ||
| + | 1. Phy Mode = 49 | ||
| + | get_chl_grp: | ||
| + | get_chl_grp: | ||
| + | get_chl_grp: | ||
| + | get_chl_grp: | ||
| + | get_chl_grp: | ||
| + | get_chl_grp: | ||
| + | drivers/ | ||
| + | Country Region from e2p = ffff | ||
| + | mt76x2_read_temp_info_from_eeprom:: | ||
| + | mt76x2_read_tx_alc_info_from_eeprom:: | ||
| + | mt76x2_read_tx_alc_info_from_eeprom:: | ||
| + | mt76x2_read_tx_alc_info_from_eeprom:: | ||
| + | mt76x2_read_tx_alc_info_from_eeprom:: | ||
| + | mt76x2_read_tx_alc_info_from_eeprom:: | ||
| + | mt76x2_get_external_lna_gain:: | ||
| + | 2. Phy Mode = 49 | ||
| + | 3. Phy Mode = 49 | ||
| + | andes_pci_fw_init | ||
| + | 0x1300 = 00073200 | ||
| + | AntCfgInit: primary/ | ||
| + | andes_load_cr: | ||
| + | ChipStructAssign(): | ||
| + | RTMPSetPhyMode: | ||
| + | MCS Set = ff ff 00 00 01 | ||
| + | TX0 power compensation = 0x38 | ||
| + | TX1 power compensation = 0x38 | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_single_sku:: | ||
| + | mt76x2_bbp_adjust(): | ||
| + | mt76x2_single_sku:: | ||
| + | APStartUp(): | ||
| + | Main bssid = e0: | ||
| + | mt76x2_reinit_agc_gain: | ||
| + | mt76x2_reinit_agc_gain: | ||
| + | mt76x2_reinit_hi_lna_gain: | ||
| + | mt76x2_reinit_hi_lna_gain: | ||
| + | <==== rt28xx_init, | ||
| + | RTMPDrvOpen(1): | ||
| + | RTMPDrvOpen(2): | ||
| + | ap_name=networkmap, | ||
| + | ap_name=hw_nat, | ||
| + | ap_name=qtbl, | ||
| + | Insert quick routing module ... | ||
| + | ###### | ||
| + | | ||
| + | | ||
| + | | ||
| + | | ||
| + | | ||
| + | | ||
| + | | ||
| + | | ||
| + | | ||
| + | | ||
| + | | ||
| + | | ||
| + | | ||
| + | | ||
| + | | ||
| + | ###### | ||
| + | ap_name=qos, | ||
| + | ap_name=qos_cls, | ||
| + | set offset 214 as b44 for sch rate control. | ||
| + | set offset 214 as e440b44 for sch rate control. | ||
| + | sch | ||
| + | set offset 84 as 80000000 for sch selection. | ||
| + | resv | ||
| + | set offset 80 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset 84 as 80000000 for rate control. | ||
| + | sch | ||
| + | set offset 94 as 80000000 for sch selection. | ||
| + | rate | ||
| + | set offset 94 as 80000000 for rate control. | ||
| + | resv | ||
| + | set offset 90 as 3232 for reservation. | ||
| + | sch | ||
| + | set offset a4 as 80000000 for sch selection. | ||
| + | rate | ||
| + | set offset a4 as 80000000 for rate control. | ||
| + | resv | ||
| + | set offset a0 as 3232 for reservation. | ||
| + | sch | ||
| + | set offset b4 as 80000000 for sch selection. | ||
| + | resv | ||
| + | set offset b0 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset b4 as 80000000 for rate control. | ||
| + | sch | ||
| + | set offset c4 as 80000000 for sch selection. | ||
| + | resv | ||
| + | set offset c0 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset c4 as 80000000 for rate control. | ||
| + | sch | ||
| + | set offset d4 as 80000000 for sch selection. | ||
| + | resv | ||
| + | set offset d0 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset d4 as 80000000 for rate control. | ||
| + | sch | ||
| + | set offset e4 as 80000000 for sch selection. | ||
| + | resv | ||
| + | set offset e0 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset e4 as 80000000 for rate control. | ||
| + | sch | ||
| + | set offset f4 as 80000000 for sch selection. | ||
| + | resv | ||
| + | set offset f0 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset f4 as 80000000 for rate control. | ||
| + | set queue mapping: skb with mark 8 to queue 8. | ||
| + | set queue mapping: skb with mark 9 to queue 9. | ||
| + | set queue mapping: skb with mark a to queue 10. | ||
| + | set queue mapping: skb with mark a to queue 11. | ||
| + | set queue mapping: skb with mark c to queue 12. | ||
| + | set queue mapping: skb with mark d to queue 13. | ||
| + | set queue mapping: skb with mark e to queue 14. | ||
| + | set queue mapping: skb with mark f to queue 15. | ||
| + | sch | ||
| + | set offset 4 as 0 for sch selection. | ||
| + | resv | ||
| + | set offset 0 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset 4 as 8000e44 for rate control. | ||
| + | weight | ||
| + | set offset 4 as 8001e44 for max rate weight. | ||
| + | set queue mapping: skb with mark 0 to queue 0. | ||
| + | sch | ||
| + | set offset 14 as 0 for sch selection. | ||
| + | resv | ||
| + | set offset 10 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset 14 as 8000e44 for rate control. | ||
| + | weight | ||
| + | set offset 14 as 8004e44 for max rate weight. | ||
| + | set queue mapping: skb with mark 1 to queue 1. | ||
| + | sch | ||
| + | set offset 24 as 0 for sch selection. | ||
| + | resv | ||
| + | set offset 20 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset 24 as 8000e44 for rate control. | ||
| + | weight | ||
| + | set offset 24 as 8004e44 for max rate weight. | ||
| + | set queue mapping: skb with mark 2 to queue 2. | ||
| + | sch | ||
| + | set offset 34 as 0 for sch selection. | ||
| + | resv | ||
| + | set offset 30 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset 34 as 0 for rate control. | ||
| + | set queue mapping: skb with mark 3 to queue 3. | ||
| + | set offset 214 as e440b44 for sch rate control. | ||
| + | set offset 214 as e440b44 for sch rate control. | ||
| + | sch | ||
| + | set offset 84 as 80000000 for sch selection. | ||
| + | resv | ||
| + | set offset 80 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset 84 as 80000000 for rate control. | ||
| + | sch | ||
| + | set offset 94 as 80000000 for sch selection. | ||
| + | rate | ||
| + | set offset 94 as 80000000 for rate control. | ||
| + | resv | ||
| + | set offset 90 as 3232 for reservation. | ||
| + | sch | ||
| + | set offset a4 as 80000000 for sch selection. | ||
| + | rate | ||
| + | set offset a4 as 80000000 for rate control. | ||
| + | resv | ||
| + | set offset a0 as 3232 for reservation. | ||
| + | sch | ||
| + | set offset b4 as 80000000 for sch selection. | ||
| + | resv | ||
| + | set offset b0 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset b4 as 80000000 for rate control. | ||
| + | sch | ||
| + | set offset c4 as 80000000 for sch selection. | ||
| + | resv | ||
| + | set offset c0 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset c4 as 80000000 for rate control. | ||
| + | sch | ||
| + | set offset d4 as 80000000 for sch selection. | ||
| + | resv | ||
| + | set offset d0 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset d4 as 80000000 for rate control. | ||
| + | sch | ||
| + | set offset e4 as 80000000 for sch selection. | ||
| + | resv | ||
| + | set offset e0 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset e4 as 80000000 for rate control. | ||
| + | sch | ||
| + | set offset f4 as 80000000 for sch selection. | ||
| + | resv | ||
| + | set offset f0 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset f4 as 80000000 for rate control. | ||
| + | set queue mapping: skb with mark 8 to queue 8. | ||
| + | set queue mapping: skb with mark 9 to queue 9. | ||
| + | set queue mapping: skb with mark a to queue 10. | ||
| + | set queue mapping: skb with mark a to queue 11. | ||
| + | set queue mapping: skb with mark c to queue 12. | ||
| + | set queue mapping: skb with mark d to queue 13. | ||
| + | set queue mapping: skb with mark e to queue 14. | ||
| + | set queue mapping: skb with mark f to queue 15. | ||
| + | sch | ||
| + | set offset 4 as 8001e44 for sch selection. | ||
| + | resv | ||
| + | set offset 0 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset 4 as 8001e44 for rate control. | ||
| + | weight | ||
| + | set offset 4 as 8001e44 for max rate weight. | ||
| + | set queue mapping: skb with mark 0 to queue 0. | ||
| + | sch | ||
| + | set offset 14 as 8004e44 for sch selection. | ||
| + | resv | ||
| + | set offset 10 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset 14 as 8004e44 for rate control. | ||
| + | weight | ||
| + | set offset 14 as 8004e44 for max rate weight. | ||
| + | set queue mapping: skb with mark 1 to queue 1. | ||
| + | sch | ||
| + | set offset 24 as 8004e44 for sch selection. | ||
| + | resv | ||
| + | set offset 20 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset 24 as 8004e44 for rate control. | ||
| + | weight | ||
| + | set offset 24 as 8004e44 for max rate weight. | ||
| + | set queue mapping: skb with mark 2 to queue 2. | ||
| + | sch | ||
| + | set offset 34 as 0 for sch selection. | ||
| + | resv | ||
| + | set offset 30 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset 34 as 0 for rate control. | ||
| + | set queue mapping: skb with mark 3 to queue 3. | ||
| + | set offset 214 as e440b44 for sch rate control. | ||
| + | set offset 214 as e440b44 for sch rate control. | ||
| + | sch | ||
| + | set offset 84 as 80000000 for sch selection. | ||
| + | resv | ||
| + | set offset 80 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset 84 as 80000000 for rate control. | ||
| + | sch | ||
| + | set offset 94 as 80000000 for sch selection. | ||
| + | rate | ||
| + | set offset 94 as 80000000 for rate control. | ||
| + | resv | ||
| + | set offset 90 as 3232 for reservation. | ||
| + | sch | ||
| + | set offset a4 as 80000000 for sch selection. | ||
| + | rate | ||
| + | set offset a4 as 80000000 for rate control. | ||
| + | resv | ||
| + | set offset a0 as 3232 for reservation. | ||
| + | sch | ||
| + | set offset b4 as 80000000 for sch selection. | ||
| + | resv | ||
| + | set offset b0 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset b4 as 80000000 for rate control. | ||
| + | sch | ||
| + | set offset c4 as 80000000 for sch selection. | ||
| + | resv | ||
| + | set offset c0 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset c4 as 80000000 for rate control. | ||
| + | sch | ||
| + | set offset d4 as 80000000 for sch selection. | ||
| + | resv | ||
| + | set offset d0 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset d4 as 80000000 for rate control. | ||
| + | sch | ||
| + | set offset e4 as 80000000 for sch selection. | ||
| + | resv | ||
| + | set offset e0 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset e4 as 80000000 for rate control. | ||
| + | sch | ||
| + | set offset f4 as 80000000 for sch selection. | ||
| + | resv | ||
| + | set offset f0 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset f4 as 80000000 for rate control. | ||
| + | set queue mapping: skb with mark 8 to queue 8. | ||
| + | set queue mapping: skb with mark 9 to queue 9. | ||
| + | set queue mapping: skb with mark a to queue 10. | ||
| + | set queue mapping: skb with mark a to queue 11. | ||
| + | set queue mapping: skb with mark c to queue 12. | ||
| + | set queue mapping: skb with mark d to queue 13. | ||
| + | set queue mapping: skb with mark e to queue 14. | ||
| + | set queue mapping: skb with mark f to queue 15. | ||
| + | sch | ||
| + | set offset 4 as 8001e44 for sch selection. | ||
| + | resv | ||
| + | set offset 0 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset 4 as 8001e44 for rate control. | ||
| + | weight | ||
| + | set offset 4 as 8001e44 for max rate weight. | ||
| + | set queue mapping: skb with mark 0 to queue 0. | ||
| + | sch | ||
| + | set offset 14 as 8004e44 for sch selection. | ||
| + | resv | ||
| + | set offset 10 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset 14 as 8004e44 for rate control. | ||
| + | weight | ||
| + | set offset 14 as 8004e44 for max rate weight. | ||
| + | set queue mapping: skb with mark 1 to queue 1. | ||
| + | sch | ||
| + | set offset 24 as 8004e44 for sch selection. | ||
| + | resv | ||
| + | set offset 20 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset 24 as 8004e44 for rate control. | ||
| + | weight | ||
| + | set offset 24 as 8004e44 for max rate weight. | ||
| + | set queue mapping: skb with mark 2 to queue 2. | ||
| + | sch | ||
| + | set offset 34 as 0 for sch selection. | ||
| + | resv | ||
| + | set offset 30 as 3232 for reservation. | ||
| + | rate | ||
| + | set offset 34 as 0 for rate control. | ||
| + | set queue mapping: skb with mark 3 to queue 3. | ||
| + | ap_name=cpm, | ||
| + | ap_name=wanip, | ||
| + | ap_name=dnrd, | ||
| + | ap_name=dnrd, | ||
| + | Tue Apr 26 23:18:10 UTC 2016 | ||
| + | ap_name=httpd, | ||
| + | ap_name=coredump, | ||
| + | ap_name=srt, | ||
| + | ap_name=rp, action=start | ||
| + | bind: Address already in use | ||
| + | bind: Address already in use | ||
| + | ap_name=udpecho, | ||
| + | ap_name=ntp, | ||
| + | ap_name=ingress_qos, | ||
| + | ap_name=ingress_classify, | ||
| + | ap_name=qos_remark, | ||
| + | ap_name=ipv6wd, | ||
| + | ap_name=telnetd, | ||
| + | ap_name=sshd, | ||
| + | ap_name=ftpd, | ||
| + | ap_name=igd_upnp, | ||
| + | ap_name=dnsr, | ||
| + | ap_name=cron, | ||
| + | Could not load host key: / | ||
| + | Could not load host key: / | ||
| + | |||
| + | S1500 login: superuser | ||
| + | Password: | ||
| + | Welcome to s1500, you can type '?' | ||
| + | |||
| + | view @ s1500> show sysinfo | ||
| + | Vendor: | ||
| + | Model: | ||
| + | CPU: MT7621 | ||
| + | Firmware Version: | ||
| + | Lib Version: | ||
| + | Build Time: (build @ 2016-04-26, 23:18:10) | ||
| + | Hardware Version: | ||
| + | Bootloader Version: | ||
| + | Serial Number: | ||
| + | Time Since Last Boot: 0:17:31 | ||
| + | Reboot Cause: | ||
| + | Product Class: | ||
| + | Current Time: | ||
| </ | </ | ||
| ==== OpenWrt bootlog ==== | ==== OpenWrt bootlog ==== | ||
| <WRAP bootlog> | <WRAP bootlog> | ||
| - | < | + | < |
| - | </WRAP>\\ | + | MT7621 |
| + | CPU=50000000 HZ BUS=16666666 HZ | ||
| + | ================================================================== | ||
| + | Change MPLL source from XTAL to CR... | ||
| + | do MEMPLL setting.. | ||
| + | MEMPLL Config : 0x11100000 | ||
| + | 3PLL mode + External loopback | ||
| + | === XTAL-40Mhz === DDR-1200Mhz === | ||
| + | PLL3 FB_DL: 0xa, 1/0 = 582/442 29000000 | ||
| + | PLL2 FB_DL: 0x10, 1/0 = 686/338 41000000 | ||
| + | MEMPLL 3PLL mode calibration fail | ||
| + | do DDR setting..[00320381] | ||
| + | Apply DDR3 Setting...(use customer AC) | ||
| + | 0 8 | ||
| + | -------------------------------------------------------------------------------- | ||
| + | 0000: | ||
| + | 0001: | ||
| + | 0002: | ||
| + | 0003: | ||
| + | 0004: | ||
| + | 0005: | ||
| + | 0006: | ||
| + | 0007: | ||
| + | 0008: | ||
| + | 0009: | ||
| + | 000A: | ||
| + | 000B: | ||
| + | 000C: | ||
| + | 000D: | ||
| + | 000E: | ||
| + | 000F: | ||
| + | 0010: | ||
| + | 0011: | ||
| + | 0012: | ||
| + | 0013: | ||
| + | 0014: | ||
| + | 0015: | ||
| + | 0016: | ||
| + | 0017: | ||
| + | 0018: | ||
| + | 0019: | ||
| + | 001A: | ||
| + | 001B: | ||
| + | 001C: | ||
| + | 001D: | ||
| + | 001E: | ||
| + | 001F: | ||
| + | rank 0 coarse = 15 | ||
| + | rank 0 fine = 80 | ||
| + | B:| 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 | ||
| + | opt_dle value:11 | ||
| + | DRAMC_R0DELDLY[018]=00002222 | ||
| + | ================================================================== | ||
| + | RX DQS perbit delay software calibration | ||
| + | ================================================================== | ||
| + | 1.0-15 bit dq delay value | ||
| + | ================================================================== | ||
| + | bit| | ||
| + | -------------------------------------- | ||
| + | 0 | 10 9 10 10 7 7 9 6 5 7 | ||
| + | 10 | 8 9 9 10 8 10 | ||
| + | -------------------------------------- | ||
| + | ================================================================== | ||
| + | 2.dqs window | ||
| + | x=pass dqs delay value (min~max)center | ||
| + | y=0-7bit DQ of every group | ||
| + | input delay:DQS0 =34 DQS1 = 34 | ||
| + | ================================================================== | ||
| + | bit | ||
| + | 0 (0~66)33 | ||
| + | 1 (1~68)34 | ||
| + | 2 (1~66)33 | ||
| + | 3 (1~64)32 | ||
| + | 4 (1~64)32 | ||
| + | 5 (1~66)33 | ||
| + | 6 (1~66)33 | ||
| + | 7 (1~66)33 | ||
| + | ================================================================== | ||
| + | 3.dq delay value last | ||
| + | ================================================================== | ||
| + | bit| 0 1 2 3 4 5 6 7 8 9 | ||
| + | -------------------------------------- | ||
| + | 0 | 11 9 11 12 9 8 10 7 6 8 | ||
| + | 10 | 8 12 10 12 8 10 | ||
| + | ================================================================== | ||
| + | ================================================================== | ||
| + | | ||
| + | ================================================================== | ||
| + | DQS loop = 15, cmp_err_1 = ffff0000 | ||
| + | dqs_perbyte_dly.last_dqsdly_pass[0]=15, | ||
| + | dqs_perbyte_dly.last_dqsdly_pass[1]=15, | ||
| + | DQ loop=15, cmp_err_1 = ffff0000 | ||
| + | dqs_perbyte_dly.last_dqdly_pass[0]=15, | ||
| + | dqs_perbyte_dly.last_dqdly_pass[1]=15, | ||
| + | byte:0, (DQS, | ||
| + | byte:1, (DQS, | ||
| + | 20,data:88 | ||
| + | [EMI] DRAMC calibration passed | ||
| + | |||
| + | =================================================================== | ||
| + | MT7621 | ||
| + | CPU=50000000 HZ BUS=16666666 HZ | ||
| + | =================================================================== | ||
| + | |||
| + | |||
| + | U-Boot 1.1.3 (Apr 22 2016 - 16:35:20) | ||
| + | |||
| + | Board: Ralink APSoC DRAM: 128 MB | ||
| + | relocate_code Pointer at: 87fac000 | ||
| + | |||
| + | Config XHCI 40M PLL | ||
| + | ****************************** | ||
| + | Software System Reset Occurred | ||
| + | ****************************** | ||
| + | Allocate 16 byte aligned buffer: 87fe0050 | ||
| + | Enable NFI Clock | ||
| + | # MTK NAND # : Use HW ECC | ||
| + | NAND ID [C8 D1 80 95 40] | ||
| + | Device not found, ID: c8d1 | ||
| + | Not Support this Device! | ||
| + | chip_mode=00000001 | ||
| + | Support this Device in MTK table! c8d1 | ||
| + | select_chip | ||
| + | [NAND]select ecc bit:4, sparesize :64 spare_per_sector=16 | ||
| + | Signature matched and data read! | ||
| + | load_fact_bbt success 2047 | ||
| + | load fact bbt success | ||
| + | [mtk_nand] probe successfully! | ||
| + | mtd-> | ||
| + | Env addr : 0x80000 | ||
| + | ..============================================ | ||
| + | Ralink UBoot Version: 4.2.0.6 | ||
| + | -------------------------------------------- | ||
| + | ASIC MT7621A DualCore (MAC to MT7530 Mode) | ||
| + | DRAM_CONF_FROM: | ||
| + | DRAM_TYPE: DDR3 | ||
| + | DRAM bus: 16 bit | ||
| + | Xtal Mode=3 OCP Ratio=1/3 | ||
| + | Flash component: NAND Flash | ||
| + | Date:Apr 22 2016 Time: | ||
| + | ============================================ | ||
| + | icache: sets:256, ways:4, linesz:32 , | ||
| + | dcache: sets:256, ways:4, linesz:32 , | ||
| + | |||
| + | ##### The CPU freq = 880 MHZ #### | ||
| + | | ||
| + | # | ||
| + | set LAN/WAN LLLLW | ||
| + | ..Example expects ABI version 2 | ||
| + | Actual U-Boot ABI version 2 | ||
| + | |||
| + | ****************************************** | ||
| + | Uboot StandAlone Entry | ||
| + | ****************************************** | ||
| + | 0, cmd | ||
| + | 1, 0x0000000D | ||
| + | cmd : 0x0000000D | ||
| + | |||
| + | |||
| + | Press Ctrl+C to Enter the Main loop... | ||
| + | 0 Example expects ABI version 2 | ||
| + | Actual U-Boot ABI version 2 | ||
| + | |||
| + | ****************************************** | ||
| + | Uboot StandAlone Entry | ||
| + | ****************************************** | ||
| + | 0, boot | ||
| + | Flash Sector Number : 1024. | ||
| + | |||
| + | *************************************************** | ||
| + | Sercomm Boot Version 1.14.0 | ||
| + | |||
| + | *************************************************** | ||
| + | Entering Firmware : Everything is OK. | ||
| + | Begin to verify the default image... | ||
| + | kernel addr: 0x1700100 | ||
| + | ............................................calculate_kernel_crc: | ||
| + | ok! | ||
| + | First image selected | ||
| + | kernel addr : | ||
| + | kernel addr : | ||
| + | ## Booting image at c1300100 ... | ||
| + | Image Name: MIPS OpenWrt Linux-5.10.115 | ||
| + | Image Type: MIPS Linux Kernel Image (lzma compressed) | ||
| + | Data Size: 2769385 Bytes = 2.6 MB | ||
| + | Load Address: 80001000 | ||
| + | Entry Point: | ||
| + | ........................................... | ||
| + | | ||
| + | |||
| + | |||
| + | |||
| + | commandline in boot is : console=ttyS1, | ||
| + | |||
| + | |||
| + | |||
| + | No initrd | ||
| + | ## Transferring control to Linux (at address 80001000) ... | ||
| + | ## Giving linux memsize in MB, 128 | ||
| + | |||
| + | Starting kernel ... | ||
| + | |||
| + | |||
| + | |||
| + | OpenWrt kernel loader for MIPS based SoC | ||
| + | Copyright (C) 2011 Gabor Juhos < | ||
| + | Decompressing kernel... done! | ||
| + | Starting kernel at 80001000... | ||
| + | |||
| + | [ 0.000000] Linux version 5.10.115 (ubuntu@z) (mipsel-openwrt-linux-musl-gcc (OpenWrt GCC 11.2.0 r19623-4b1d5a65de) 11.2.0, GNU ld (GNU Binutils) 2.37) #0 SMP Sun May 29 18:57:08 2022 | ||
| + | [ 0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3 | ||
| + | [ 0.000000] printk: bootconsole [early0] enabled | ||
| + | [ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc) | ||
| + | [ 0.000000] MIPS: machine is WiFire S1500.NBN | ||
| + | [ 0.000000] Initrd not found or empty - disabling initrd | ||
| + | [ 0.000000] VPE topology {2,2} total 4 | ||
| + | [ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. | ||
| + | [ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes | ||
| + | [ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. | ||
| + | [ 0.000000] Zone ranges: | ||
| + | [ 0.000000] | ||
| + | [ 0.000000] | ||
| + | [ 0.000000] Movable zone start for each node | ||
| + | [ 0.000000] Early memory node ranges | ||
| + | [ 0.000000] | ||
| + | [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff] | ||
| + | [ 0.000000] percpu: Embedded 15 pages/cpu s30096 r8192 d23152 u61440 | ||
| + | [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 32480 | ||
| + | [ 0.000000] Kernel command line: console=ttyS0, | ||
| + | [ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes, linear) | ||
| + | [ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes, linear) | ||
| + | [ 0.000000] Writing ErrCtl register=00014dc0 | ||
| + | [ 0.000000] Readback ErrCtl register=00014dc0 | ||
| + | [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off | ||
| + | [ 0.000000] Memory: 119280K/ | ||
| + | [ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, | ||
| + | [ 0.000000] rcu: Hierarchical RCU implementation. | ||
| + | [ 0.000000] | ||
| + | [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies. | ||
| + | [ 0.000000] NR_IRQS: 256 | ||
| + | [ 0.000000] random: get_random_bytes called from start_kernel+0x3cc/ | ||
| + | [ 0.000000] CPU Clock: 880MHz | ||
| + | [ 0.000000] clocksource: | ||
| + | [ 0.000012] sched_clock: | ||
| + | [ 0.015865] clocksource: | ||
| + | [ 0.033727] Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688) | ||
| + | [ 0.106059] pid_max: default: 32768 minimum: 301 | ||
| + | [ 0.115371] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) | ||
| + | [ 0.129777] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) | ||
| + | [ 0.147791] rcu: Hierarchical SRCU implementation. | ||
| + | [ 0.157564] dyndbg: Ignore empty _ddebug table in a CONFIG_DYNAMIC_DEBUG_CORE build | ||
| + | [ 0.173052] smp: Bringing up secondary CPUs ... | ||
| + | [ 0.182620] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. | ||
| + | [ 0.182631] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes | ||
| + | [ 0.182643] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. | ||
| + | [ 0.182764] CPU1 revision is: 0001992f (MIPS 1004Kc) | ||
| + | [ 0.242972] Synchronize counters for CPU 1: done. | ||
| + | [ 0.305002] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. | ||
| + | [ 0.305011] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes | ||
| + | [ 0.305018] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. | ||
| + | [ 0.305062] CPU2 revision is: 0001992f (MIPS 1004Kc) | ||
| + | [ 0.363964] Synchronize counters for CPU 2: done. | ||
| + | [ 0.424170] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. | ||
| + | [ 0.424179] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes | ||
| + | [ 0.424186] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. | ||
| + | [ 0.424236] CPU3 revision is: 0001992f (MIPS 1004Kc) | ||
| + | [ 0.483536] Synchronize counters for CPU 3: done. | ||
| + | [ 0.543143] smp: Brought up 1 node, 4 CPUs | ||
| + | [ 0.555604] clocksource: | ||
| + | [ 0.575109] futex hash table entries: 1024 (order: 3, 32768 bytes, linear) | ||
| + | [ 0.588933] pinctrl core: initialized pinctrl subsystem | ||
| + | [ 0.601003] NET: Registered protocol family 16 | ||
| + | [ 0.612196] cpuidle: using governor teo | ||
| + | [ 0.643194] random: fast init done | ||
| + | [ 0.663034] clocksource: | ||
| + | [ 0.674853] NET: Registered protocol family 2 | ||
| + | [ 0.683709] IP idents hash table entries: 2048 (order: 2, 16384 bytes, linear) | ||
| + | [ 0.698656] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes, linear) | ||
| + | [ 0.715218] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear) | ||
| + | [ 0.730367] TCP bind hash table entries: 1024 (order: 1, 8192 bytes, linear) | ||
| + | [ 0.744384] TCP: Hash tables configured (established 1024 bind 1024) | ||
| + | [ 0.757097] UDP hash table entries: 256 (order: 1, 8192 bytes, linear) | ||
| + | [ 0.769983] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear) | ||
| + | [ 0.784024] NET: Registered protocol family 1 | ||
| + | [ 0.792562] PCI: CLS 0 bytes, default 32 | ||
| + | [ 0.802809] workingset: timestamp_bits=14 max_order=15 bucket_order=1 | ||
| + | [ 0.819660] squashfs: version 4.0 (2009/ | ||
| + | [ 0.831142] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc. | ||
| + | [ 0.852870] mt7621_gpio 1e000600.gpio: | ||
| + | [ 0.864380] mt7621_gpio 1e000600.gpio: | ||
| + | [ 0.875735] mt7621_gpio 1e000600.gpio: | ||
| + | [ 0.887717] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled | ||
| + | [ 0.901856] printk: console [ttyS0] disabled | ||
| + | [ 0.910342] 1e000c00.uartlite: | ||
| + | [ 0.928252] printk: console [ttyS0] enabled | ||
| + | [ 0.928252] printk: console [ttyS0] enabled | ||
| + | [ 0.944802] printk: bootconsole [early0] disabled | ||
| + | [ 0.944802] printk: bootconsole [early0] disabled | ||
| + | [ 0.965839] nand: device found, Manufacturer ID: 0xc8, Chip ID: 0xd1 | ||
| + | [ 0.978562] nand: ESMT NAND 128MiB 3,3V 8-bit | ||
| + | [ 0.987400] nand: 128 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64 | ||
| + | [ 1.002484] mt7621-nand 1e003000.nand: | ||
| + | [ 1.015604] 12 fixed-partitions partitions found on MTD device mt7621-nand | ||
| + | [ 1.029299] Creating 12 MTD partitions on " | ||
| + | [ 1.039886] 0x000000000000-0x000007f80000 : " | ||
| + | [ 3.012012] 0x000000000000-0x000000100000 : " | ||
| + | [ 3.039210] 0x000000100000-0x000000200000 : " | ||
| + | [ 3.066097] 0x000000200000-0x000001600000 : " | ||
| + | [ 3.385057] 0x000001600000-0x000001700000 : " | ||
| + | [ 3.412137] 0x000001700000-0x000001b00000 : " | ||
| + | [ 3.484606] 0x000001b00000-0x000001f00000 : " | ||
| + | [ 3.557389] 0x000001f00000-0x000004d00000 : " | ||
| + | [ 4.276344] 0x000004d00000-0x000007b00000 : " | ||
| + | [ 4.995190] 0x000007b00000-0x000007c00000 : " | ||
| + | [ 5.021295] 0x000007c00000-0x000007f80000 : " | ||
| + | [ 5.085605] 0x000000080000-0x0000000a0000 : " | ||
| + | [ 5.106833] Concatenating MTD devices: | ||
| + | [ 5.114377] (0): " | ||
| + | [ 5.119928] (1): " | ||
| + | [ 5.125495] (2): " | ||
| + | [ 5.130521] (3): " | ||
| + | [ 5.135210] into device " | ||
| + | [ 5.142359] 1 fixed-partitions partitions found on MTD device ubi-concat | ||
| + | [ 5.155698] Creating 1 MTD partitions on " | ||
| + | [ 5.165937] 0x000000000000-0x000004680000 : " | ||
| + | [ 6.305337] mt7530 mdio-bus: | ||
| + | [ 6.321650] mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 21 | ||
| + | [ 6.339530] i2c /dev entries driver | ||
| + | [ 6.349056] mt7621-pci 1e140000.pcie: | ||
| + | [ 6.362456] mt7621-pci 1e140000.pcie: | ||
| + | [ 6.379992] mt7621-pci 1e140000.pcie: | ||
| + | [ 6.396296] mt7621-pci 1e140000.pcie: | ||
| + | [ 6.412680] mt7621-pci 1e140000.pcie: | ||
| + | [ 6.425444] NET: Registered protocol family 10 | ||
| + | [ 6.435816] Segment Routing with IPv6 | ||
| + | [ 6.443265] NET: Registered protocol family 17 | ||
| + | [ 6.452530] 8021q: 802.1Q VLAN Support v1.8 | ||
| + | [ 6.464413] mt7530 mdio-bus: | ||
| + | [ 6.496411] mt7530 mdio-bus:1f lan4 (uninitialized): | ||
| + | [ 6.518534] mt7530 mdio-bus:1f lan3 (uninitialized): | ||
| + | [ 6.540589] mt7530 mdio-bus:1f lan2 (uninitialized): | ||
| + | [ 6.562660] mt7530 mdio-bus:1f lan1 (uninitialized): | ||
| + | [ 6.584820] mt7530 mdio-bus:1f wan (uninitialized): | ||
| + | [ 6.606992] mt7530 mdio-bus: | ||
| + | [ 6.623861] DSA: tree 0 setup | ||
| + | [ 6.630075] rt2880-pinmux pinctrl: pcie is already enabled | ||
| + | [ 6.641171] mt7621-pci 1e140000.pcie: | ||
| + | [ 6.654571] mt7621-pci 1e140000.pcie: | ||
| + | [ 6.672104] mt7621-pci 1e140000.pcie: | ||
| + | [ 6.688414] mt7621-pci 1e140000.pcie: | ||
| + | [ 6.704812] mt7621-pci-phy 1e149000.pcie-phy: | ||
| + | [ 6.719915] mt7621-pci-phy 1e14a000.pcie-phy: | ||
| + | [ 6.734921] mt7621-pci 1e140000.pcie: | ||
| + | [ 6.849576] mt7621-pci-phy 1e149000.pcie-phy: | ||
| + | [ 6.860696] mt7621-pci-phy 1e14a000.pcie-phy: | ||
| + | [ 6.972022] mt7621-pci 1e140000.pcie: | ||
| + | [ 6.985904] mt7621-pci 1e140000.pcie: | ||
| + | [ 6.995630] mt7621-pci 1e140000.pcie: | ||
| + | [ 7.005352] mt7621-pci 1e140000.pcie: | ||
| + | [ 7.024072] mt7621-pci 1e140000.pcie: | ||
| + | [ 7.036759] pci_bus 0000:00: root bus resource [io 0x1e160000-0x1e16ffff] | ||
| + | [ 7.050468] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff] | ||
| + | [ 7.064174] pci_bus 0000:00: root bus resource [bus 00-ff] | ||
| + | [ 7.075113] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff] (bus address [0x00000000-0x0fffffff]) | ||
| + | [ 7.095427] pci 0000: | ||
| + | [ 7.107427] pci 0000: | ||
| + | [ 7.119923] pci 0000: | ||
| + | [ 7.132477] pci 0000: | ||
| + | [ 7.140468] pci 0000: | ||
| + | [ 7.152719] pci 0000: | ||
| + | [ 7.164751] pci 0000: | ||
| + | [ 7.177248] pci 0000: | ||
| + | [ 7.189793] pci 0000: | ||
| + | [ 7.197786] pci 0000: | ||
| + | [ 7.211339] pci 0000: | ||
| + | [ 7.223398] pci 0000: | ||
| + | [ 7.237459] pci 0000: | ||
| + | [ 7.249979] pci 0000: | ||
| + | [ 7.264031] pci 0000: | ||
| + | [ 7.276451] pci 0000: | ||
| + | [ 7.290515] pci 0000: | ||
| + | [ 7.300966] pci 0000: | ||
| + | [ 7.313112] pci 0000: | ||
| + | [ 7.326640] pci 0000: | ||
| + | [ 7.341031] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 | ||
| + | [ 7.354478] pci 0000: | ||
| + | [ 7.366503] pci 0000: | ||
| + | [ 7.380078] pci 0000: | ||
| + | [ 7.394124] pci 0000: | ||
| + | [ 7.406541] pci 0000: | ||
| + | [ 7.420631] pci 0000: | ||
| + | [ 7.431082] pci 0000: | ||
| + | [ 7.443229] pci 0000: | ||
| + | [ 7.456758] pci 0000: | ||
| + | [ 7.471150] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 02 | ||
| + | [ 7.484393] pci 0000: | ||
| + | [ 7.497574] pci 0000: | ||
| + | [ 7.511445] pci 0000: | ||
| + | [ 7.524625] pci 0000: | ||
| + | [ 7.538501] pci 0000: | ||
| + | [ 7.552035] pci 0000: | ||
| + | [ 7.566430] pci 0000: | ||
| + | [ 7.579961] pci 0000: | ||
| + | [ 7.594353] pci 0000: | ||
| + | [ 7.607897] pci 0000: | ||
| + | [ 7.621425] pci 0000: | ||
| + | [ 7.634954] pci 0000: | ||
| + | [ 7.648493] pci 0000: | ||
| + | [ 7.663079] pci 0000: | ||
| + | [ 7.677470] pci 0000: | ||
| + | [ 7.687363] pci 0000: | ||
| + | [ 7.700891] pci 0000: | ||
| + | [ 7.714417] pci 0000: | ||
| + | [ 7.728827] pci 0000: | ||
| + | [ 7.743403] pci 0000: | ||
| + | [ 7.757793] pci 0000: | ||
| + | [ 7.767685] pci 0000: | ||
| + | [ 7.781213] pci 0000: | ||
| + | [ 7.794747] pci 0000: | ||
| + | [ 7.813533] UBI: auto-attach mtd12 | ||
| + | [ 7.820332] ubi0: attaching mtd12 | ||
| + | [ 7.827261] mt7530 mdio-bus: | ||
| + | [ 7.943413] UBI: EOF marker found, PEBs from 33 will be erased | ||
| + | [ 8.974645] ubi0: scanning is finished | ||
| + | [ 9.030494] ubi0: volume 1 (" | ||
| + | [ 9.044544] ubi0: attached mtd12 (name " | ||
| + | [ 9.055503] ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes | ||
| + | [ 9.069189] ubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 2048 | ||
| + | [ 9.082707] ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096 | ||
| + | [ 9.096569] ubi0: good PEBs: 564, bad PEBs: 0, corrupted PEBs: 0 | ||
| + | [ 9.108524] ubi0: user volume: 2, internal volumes: 1, max. volumes count: 128 | ||
| + | [ 9.122909] ubi0: max/mean erase counter: 1/0, WL threshold: 4096, image sequence number: 1653850628 | ||
| + | [ 9.141097] ubi0: available PEBs: 0, total reserved PEBs: 564, PEBs reserved for bad PEB handling: 12 | ||
| + | [ 9.159491] ubi0: background thread " | ||
| + | [ 9.161835] block ubiblock0_0: | ||
| + | [ 9.182485] ubiblock: device ubiblock0_0 (rootfs) set to be root filesystem | ||
| + | [ 9.254784] VFS: Mounted root (squashfs filesystem) readonly on device 254:0. | ||
| + | [ 9.274818] Freeing unused kernel memory: 1276K | ||
| + | [ 9.283898] This architecture does not have kernel memory protection. | ||
| + | [ 9.296748] Run /sbin/init as init process | ||
| + | [ | ||
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| + | Press the [f] key and hit [enter] to enter failsafe mode | ||
| + | Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level | ||
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| + | Please press Enter to activate this console. | ||
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| + | [ | ||
| + | [ | ||
| + | [ | ||
| + | |||
| + | |||
| + | |||
| + | BusyBox v1.35.0 (2022-05-29 18:57:08 UTC) built-in shell (ash) | ||
| + | |||
| + | _______ | ||
| + | | ||
| + | | ||
| + | | ||
| + | |__| W I R E L E S S F R E E D O M | ||
| + | | ||
| + | | ||
| + | | ||
| + | === WARNING! ===================================== | ||
| + | There is no root password defined on this device! | ||
| + | Use the " | ||
| + | in order to prevent unauthorized SSH logins. | ||
| + | -------------------------------------------------- | ||
| + | root@OpenWrt:/# | ||
| + | { | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | " | ||
| + | } | ||
| + | }</ | ||
| + | </ | ||
| ===== Notes ===== | ===== Notes ===== | ||
| ===== Tags ===== | ===== Tags ===== | ||
| [[meta: | [[meta: | ||
| - | {{tag>EXAMPLETAG unsupported}} | + | {{tagpage>U-boot}} |
| + | {{tagpage> | ||
| + | {{tagpage> | ||
| + | {{tagpage> | ||
| + | {{tagpage> | ||
| + | {{tagpage> | ||
| + | {{tagpage> | ||
| + | {{tagpage> | ||
| + | {{tagpage> | ||
| + | {{tagpage> | ||
| + | {{tagpage> | ||
| + | {{tagpage> | ||
| + | {{tagpage> | ||
| + | {{tagpage> | ||
| + | {{tagpage> | ||
| + | {{tagpage> | ||
| + | {{tagpage> | ||
| + | {{tagpage> | ||
| + | {{tagpage> | ||
| + | {{tagpage> | ||
| + | {{tagpage> | ||
| + | {{tagpage> | ||