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toh:tp-link:tl-mr3420:deep.mmc.hack [2018/06/25 19:57] – added dts patch deoptimtoh:tp-link:tl-mr3420:deep.mmc.hack [2018/07/02 07:56] – minor addings/changes deoptim
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 <WRAP center important 70%> <WRAP center important 70%>
-This mod does not work on the new **trunk** and **Chaos Calmer 15.05** (since the revision [[https://dev.openwrt.org/changeset/47045|r47045]]).+This mod does not work on the older **//LEDE//** and **//Chaos Calmer 15.05//** (since the revision [[https://dev.openwrt.org/changeset/47045|r47045]]). 
 +**But it works completely on the newest kernel 4.14+(ath79) and does not need to delete anything.**
 \\ \\
-You need to discard this three changes to work property with this mod+If you use older version of branch then you need to discard/remove this three changes to work property with this mod:
-\\ +
-Now just remove three patches from git repository:+
 <code> <code>
 git rm target/linux/generic/patches-3.18/092-01-spi-Check-to-see-if-the-device-is-processing-a-messa.patch git rm target/linux/generic/patches-3.18/092-01-spi-Check-to-see-if-the-device-is-processing-a-messa.patch
Line 47: Line 46:
 **Note:** Keep in mind, very often the unused GPIOs a pulled-down to the ground or pulled-up to the power bus via resistor - this may affect on detection of SD memory cards. **Note:** Keep in mind, very often the unused GPIOs a pulled-down to the ground or pulled-up to the power bus via resistor - this may affect on detection of SD memory cards.
 |  {{media:doc:hardware:gpio_pullup_pulldown.png?nolink}}  | |  {{media:doc:hardware:gpio_pullup_pulldown.png?nolink}}  |
 +\\ 
 +\\
 ==== First way, using common CS0 ==== ==== First way, using common CS0 ====
 {{:meta:icons:tango:48px-emblem-important.svg.png?nolink&16|Important! }} Using this method, you need to purchase a Single (or Schmitt-Trigger) Inverter Gate (which can operates on voltage 3.3V). {{:meta:icons:tango:48px-emblem-important.svg.png?nolink&16|Important! }} Using this method, you need to purchase a Single (or Schmitt-Trigger) Inverter Gate (which can operates on voltage 3.3V).
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 </code></hidden> </code></hidden>
-<hidden Patch for Openwrt/LEDE (4.14+, ath79 platform, dts files)><code diff> +<hidden Patch for Openwrt (4.14+, ath79 platform, dts files)><code diff> 
---a/target/linux/ath79/dts/ar7241_tl-mr3220-v1.dts +diff --git a/target/linux/ath79/dts/ar7241_tp-link.dtsi b/target/linux/ath79/dts/ar7241_tp-link.dtsi 
-+++ b/target/linux/ath79/dts/ar7241_tl-mr3220-v1.dts +index 3846d811ac..d845e06951 100644 
-@@ -90,7 +90,17 @@+--- a/target/linux/ath79/dts/ar7241_tp-link.dtsi 
 ++++ b/target/linux/ath79/dts/ar7241_tp-link.dtsi 
 +@@ -48,7 +48,19 @@
    
  &spi {  &spi {
Line 206: Line 208:
 - num-cs = <1>; - num-cs = <1>;
 + num-cs = <2>; + num-cs = <2>;
-+ /First value is default pin for flash, second value ++ /
-+ // (via comma) the GPIO number for sdcard. But we used ++ * First value is default pin for flash, second value 
-+ // gpio 2 and it equivalent of internal CS0 line. And ++  (via comma) the GPIO number for sdcard. But we used 
-+ // we use it because we use common bus SPI0.0 for two ++  gpio 2 and it equivalent of internal CS0 line. And 
-+ // devices (default Low polarity chip-select, custom ++  we use it because we use common bus SPI0.0 for two 
-+ // High polarity chip-select). ++  devices (default Low polarity chip-select, custom 
-+ // In its core, this is a dummy, because internal CS0 line ++  High polarity chip-select). 
-+ // is locked by HW and SPI driver, and we can not use it at all. ++  In its core, this is a dummy, because internal CS0 line 
-+ // We use this to simply switch SPI bus to another device.++  is locked by HW and SPI driver, and we can not use it at all. 
 ++  We use this to simply switch SPI bus to another device. 
 ++ */
 + cs-gpios = <0>, <&gpio 2 GPIO_ACTIVE_HIGH>; + cs-gpios = <0>, <&gpio 2 GPIO_ACTIVE_HIGH>;
    
   flash@0 {   flash@0 {
   #address-cells = <1>;   #address-cells = <1>;
-@@ -122,6 +132,13 @@+@@ -80,6 +92,13 @@
   };   };
   };   };
Line 232: Line 236:
  };  };
    
- &eth0 {+ &pcie {
  
 </code></hidden> </code></hidden>
 +\\ 
 +\\
 ==== Second way, using GPIO as CS1 (Recommended) ==== ==== Second way, using GPIO as CS1 (Recommended) ====
 Recommended to use any unused GPIO-pin as CS1 for MMC/SD memory card. Recommended to use any unused GPIO-pin as CS1 for MMC/SD memory card.
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 </code></hidden> </code></hidden>
 +<hidden Patch for Openwrt (4.14+, ath79 platform, dts files)><code diff>
 +diff --git a/target/linux/ath79/dts/ar7241_tp-link.dtsi b/target/linux/ath79/dts/ar7241_tp-link.dtsi
 +index 3846d811ac..58399eb4de 100644
 +--- a/target/linux/ath79/dts/ar7241_tp-link.dtsi
 ++++ b/target/linux/ath79/dts/ar7241_tp-link.dtsi
 +@@ -48,7 +48,12 @@
 + 
 + &spi {
 +  status = "okay";
 +- num-cs = <1>;
 ++ num-cs = <2>;
 ++ /*
 ++ * Where first parameter <0> is default CS0 pin for flash
 ++ * and second parameter is GPIO Number for sdcard.
 ++ */
 ++ cs-gpios = <0>, <&gpio 7 GPIO_ACTIVE_HIGH>;
 + 
 +  flash@0 {
 +  #address-cells = <1>;
 +@@ -80,6 +85,13 @@
 +  };
 +  };
 +  };
 ++
 ++ sdcard@0 {
 ++ compatible = "mmc-spi-slot";
 ++ reg = <1>;
 ++ spi-max-frequency = <25000000>;
 ++ voltage-ranges = <3200 3400>;
 ++ };
 + };
 + 
 + &pcie {
  
 +</code></hidden> 
 +\\ 
 +\\
 ==== Third way, using Internal CS1 ==== ==== Third way, using Internal CS1 ====
  
Line 431: Line 471:
  
 </code></hidden> </code></hidden>
 +<hidden Patch for Openwrt (4.14+, ath79 platform, dts files)><code diff>
 +diff --git a/target/linux/ath79/dts/ar7241_tp-link.dtsi b/target/linux/ath79/dts/ar7241_tp-link.dtsi
 +index 3846d811ac..ea915872dc 100644
 +--- a/target/linux/ath79/dts/ar7241_tp-link.dtsi
 ++++ b/target/linux/ath79/dts/ar7241_tp-link.dtsi
 +@@ -48,7 +48,10 @@
 + 
 + &spi {
 +  status = "okay";
 +- num-cs = <1>;
 ++ pinctrl-names = "default";
 ++ pinctrl-0 = <&enable_cs1_bit>;
 ++ num-cs = <2>;
 ++ cs-gpios = <0>, <0>;
 + 
 +  flash@0 {
 +  #address-cells = <1>;
 +@@ -80,6 +83,30 @@
 +  };
 +  };
 +  };
 ++
 ++ sdcard@0 {
 ++ compatible = "mmc-spi-slot";
 ++ reg = <1>;
 ++ spi-max-frequency = <25000000>;
 ++ voltage-ranges = <3200 3400>;
 ++ };
 ++};
 ++
 ++&pinmux {
 ++ enable_cs1_bit: pinmux_enable_cs1_bit {
 ++ pinctrl-single,bits = <
 ++ /*
 ++ * Set AR724X_GPIO_FUNC_SPI_CS_EN1 BIT(13) to 1,
 ++ * i.e. enable hardware CS1 but it turn-off GPIO0;
 ++ * Formula: *addr = (*addr & ~sub-mask) |
 ++ * (value & sub-mask);
 ++ * Where: addr is 0x18000000 + 0x40000 + 0x28 is
 ++ * base address of AR724X GPIO functions;
 ++ * <addr_offset value sub-mask>
 ++ */
 ++ 0x0 0x2000 0x2000
 ++ >;
 ++ };
 + };
 + 
 + &pcie {
  
 +</code></hidden>
 +\\
 == Switching GPIO0 to CS1 on AR71XX SoC: == == Switching GPIO0 to CS1 on AR71XX SoC: ==
 +<hidden Instruction for old Openwrt (including LEDE project)>
 <code c> <code c>
  /* Enabling internal CS1, disable GPIO 0 */  /* Enabling internal CS1, disable GPIO 0 */
  ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN);  ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN);
 </code> </code>
-**Note:** This instruction for old Openwrt (before LEDE project). +</hidden> 
 +\\
 == Switching GPIO0 to CS1 on AR724X SoC: == == Switching GPIO0 to CS1 on AR724X SoC: ==
 +<hidden Instruction for old Openwrt (including LEDE project)>
 <code c> <code c>
  /* Enabling internal CS1, disable GPIO 0 */  /* Enabling internal CS1, disable GPIO 0 */
  ath79_gpio_function_enable(AR724X_GPIO_FUNC_SPI_CS_EN1);  ath79_gpio_function_enable(AR724X_GPIO_FUNC_SPI_CS_EN1);
 </code> </code>
-**Note:** Already used in the above example. This instruction for old Openwrt (before LEDE project)+</hidden> 
 +<hidden Instruction for Openwrt (4.14+, ath79 platform, dts files)> 
 +<code c> 
 + ... 
 + ... 
 + /* Add this two lines to spi enum */ 
 + pinctrl-names = "default"; 
 + pinctrl-0 = <&enable_cs1_bit>; 
 + ... 
 + ... 
 +&pinmux { 
 + enable_cs1_bit: pinmux_enable_cs1_bit { 
 + pinctrl-single,bits = < 
 + /* 
 + * Set AR724X_GPIO_FUNC_SPI_CS_EN1 BIT(13) to 1, 
 + * i.e. enable hardware CS1 but it turn-off GPIO0; 
 + * Formula: *addr = (*addr & ~sub-mask) | 
 + * (value & sub-mask); 
 + * Where: addr is 0x18000000 + 0x40000 + 0x28 is 
 + * base address of AR724X GPIO functions; 
 + * <addr_offset value sub-mask> 
 + */ 
 + 0x0 0x2000 0x2000 
 + >; 
 + }; 
 + }; 
 +</code> 
 +</hidden> 
 +**Note:** Already used in the example above
 +\\
 == Turn off UART and switching GPIO9(Rx) to CS1 on AR933X SoC: == == Turn off UART and switching GPIO9(Rx) to CS1 on AR933X SoC: ==
 +<hidden Instruction for old Openwrt (including LEDE project)>
 <code c> <code c>
  /* Disable UART, enabling GPIO 9 and GPIO 10 */  /* Disable UART, enabling GPIO 9 and GPIO 10 */
Line 453: Line 574:
  ath79_gpio_function_enable(AR933X_GPIO_FUNC_SPI_CS_EN1);  ath79_gpio_function_enable(AR933X_GPIO_FUNC_SPI_CS_EN1);
 </code> </code>
-**Note:** This instruction for old Openwrt (before LEDE project). +</hidden> 
 +\\
 == Configure GPIO11 to CS1 on AR934X SoC: == == Configure GPIO11 to CS1 on AR934X SoC: ==
 +<hidden Instruction for old Openwrt (including LEDE project)>
 <code c> <code c>
  /* We chose GPIO11 - for this example. You can use any unused GPIOs(11-22) */  /* We chose GPIO11 - for this example. You can use any unused GPIOs(11-22) */
Line 465: Line 587:
  ath79_gpio_output_select(DEVICE_GPIO_CS1_MMC, AR934X_GPIO_OUT_SPI_CS1);  ath79_gpio_output_select(DEVICE_GPIO_CS1_MMC, AR934X_GPIO_OUT_SPI_CS1);
 </code> </code>
-**Note:** This instruction for old Openwrt (before LEDE project). +</hidden> 
- +<hidden Instruction for Openwrt (4.14+, ath79 platform, dts files)> 
 +<code c> 
 + ... 
 + ... 
 + /Add this two lines to spi enum *
 + pinctrl-names = "default"; 
 + pinctrl-0 = <&gpio11_to_cs1_bit>; 
 + ... 
 + ... 
 +&pinmux { 
 + gpio11_to_cs1_bitpinmux_gpio11_to_cs1_bit { 
 + pinctrl-single,bits = < 
 + /* 
 +  Set AR934X_GPIO_OUT_SPI_CS1 7 value to GPIO11, 
 + * i.e. enable hardware CS1 but it turn-off GPIO11; 
 + * Formula: *addr = (*addr & ~sub-mask) | 
 + * (value & sub-mask); 
 + * Where: addr is 0x18000000 + 0x40000 + 0x2C is 
 + * base address of AR934X GPIO Output functions; 
 + * <addr_offset value sub-mask>; 
 + */ 
 + /* 
 + * 0x2c+0x8 addr_offset for GPIO11(Bit 31:24)
 + * 0x2c+0xc addr_offset for GPIO12-GPIO15; 
 + * 0x2c+0x10 addr_offset for GPIO16-GPIO19; 
 + * 0x7 value (with Bitwise Left Shift) for mux CS1 
 + * use 0x8 value for mux CS2; 
 + */ 
 + 0x8 0x7000000 0xff000000 
 + >; 
 + }; 
 + }; 
 +</code> 
 +</hidden> 
 +\\ 
 +\\
 ==== How to implement the Hotplug of SD-card ==== ==== How to implement the Hotplug of SD-card ====
 |  {{media:doc:hardware:memory_card_connectors_memory_card_billboard.gif?nolink}}  | |  {{media:doc:hardware:memory_card_connectors_memory_card_billboard.gif?nolink}}  |
Line 577: Line 733:
  
 </code></hidden> </code></hidden>
-// We could use GPIO to IRQ event as card detection (implemented in ''mmc_spi'' module) or GPIO to IRQ event as new hotplug SPI-device (implemented in standart SPI bus driver) - but in all this cases, it was found that it not support hotplug detection with **removing** the SD-card or SPI-device via the IRQ trigger.\\+<hidden Patch for Openwrt (4.14+, ath79 platform, dts files)><code diff> 
 +diff --git a/target/linux/ath79/dts/ar7241_tp-link.dtsi b/target/linux/ath79/dts/ar7241_tp-link.dtsi 
 +index 3846d811ac..d99bafcb2b 100644 
 +--- a/target/linux/ath79/dts/ar7241_tp-link.dtsi 
 ++++ b/target/linux/ath79/dts/ar7241_tp-link.dtsi 
 +@@ -22,13 +22,18 @@ 
 +  gpios = <&gpio 11 GPIO_ACTIVE_LOW>; 
 +  debounce-interval = <60>; 
 +  }; 
 +
 +  qss { 
 +  label = "qss"; 
 +  linux,code = <KEY_WPS_BUTTON>; 
 +  gpios = <&gpio 12 GPIO_ACTIVE_LOW>; 
 +  debounce-interval = <60>; 
 +  }; 
 ++ mmc { 
 ++ label = "mmc"; 
 ++ linux,code = <BTN_0>; 
 ++ gpios = <&gpio 18 GPIO_ACTIVE_LOW>; 
 ++ debounce-interval = <60>; 
 ++ }; 
 +  }; 
 +  
 +  gpio_leds: gpio-leds { 
 +@@ -48,7 +53,12 @@ 
 +  
 + &spi { 
 +  status = "okay"; 
 +- num-cs = <1>; 
 ++ num-cs = <2>; 
 ++ /* 
 ++ * Where first parameter <0> is default CS0 pin for flash 
 ++ * and second parameter is GPIO Number for sdcard. 
 ++ */ 
 ++ cs-gpios = <0>, <&gpio 7 GPIO_ACTIVE_HIGH>; 
 +  
 +  flash@0 { 
 +  #address-cells = <1>; 
 +@@ -80,6 +90,30 @@ 
 +  }; 
 +  }; 
 +  }; 
 +
 ++ sdcard@0 { 
 ++ compatible = "mmc-spi-slot"; 
 ++ reg = <1>; 
 ++ /* 
 ++ * If you need to use GPIO18 as Card Detect and 
 ++ * IRQ trigger (as standard implementation) - just 
 ++ * uncomment line below (but don't forget delete 
 ++ * the equivalent gpio-key). We don't use this 
 ++ * property because it doesn't detect removing of 
 ++ * SD Card. 
 ++ */ 
 ++ //gpios = <&gpio 18 GPIO_ACTIVE_LOW>; 
 ++ /* 
 ++ * By default, Card Detect use "active low" state. 
 ++ * Using the "cd-inverted" property means, that the 
 ++ * CD line is active high, i.e. it is high, when a 
 ++ * card is inserted. 
 ++ * (uncomment line below to enable this option) 
 ++ */ 
 ++ //cd-inverted; 
 ++ spi-max-frequency = <25000000>; 
 ++ voltage-ranges = <3200 3400>; 
 ++ }; 
 + }; 
 +  
 + &pcie { 
 + 
 +</code></hidden> 
 +// We could use GPIO to IRQ event as card detection (implemented in ''mmc_spi'' module) or GPIO to IRQ event as new hotplug SPI-device (implemented in standart SPI bus driver) - but in all this cases, it was found that it not support hotplug detection with **removing** the SD-card or SPI-device via the IRQ trigger. IRQ trigger needed if your gpio controller could be in sleep/idle state (and those CD gpio switch could be ignored by the system) - in that cause use standard implementation(not buttons).\\
    Or FIXME   //    Or FIXME   //
  
 The solution was found without the use of IRQ trigger: The solution was found without the use of IRQ trigger:
 **After build and compiling** the firmware, we just added additional button with the name **''mmc''**.\\ **After build and compiling** the firmware, we just added additional button with the name **''mmc''**.\\
-Next, you need to [[docs:guide-user:hardware:hardware.button#using.atheros.00-button.uci|create a configuration]] for the button **''mmc''**:+Next, you need to [[docs:guide-user:hardware:hardware.button#using.atheros.00-button.uci|create a configuration(/etc/hotplug.d/button/00-button)]] for the button **''mmc''**:
 <code bash> <code bash>
 uci add system button uci add system button
-uci set system.@button[-1].button=mmc+uci set system.@button[-1].button=BTN_0
 uci set system.@button[-1].action=pressed uci set system.@button[-1].action=pressed
 uci set system.@button[-1].handler='echo "spi0.1" > /sys/bus/spi/drivers/mmc_spi/unbind' uci set system.@button[-1].handler='echo "spi0.1" > /sys/bus/spi/drivers/mmc_spi/unbind'
 uci add system button uci add system button
-uci set system.@button[-1].button=mmc+uci set system.@button[-1].button=BTN_0
 uci set system.@button[-1].action=released uci set system.@button[-1].action=released
 uci set system.@button[-1].handler='echo "spi0.1" > /sys/bus/spi/drivers/mmc_spi/bind' uci set system.@button[-1].handler='echo "spi0.1" > /sys/bus/spi/drivers/mmc_spi/bind'
  • Last modified: 2021/10/15 09:06
  • by bobafetthotmail