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| toh:meraki:mx65w [2024/10/29 06:19] – [Data entry] Initial edit. evs | toh:meraki:mx65w [2024/10/29 10:16] – Add photos of front and back of board when opened. evs | ||
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| Line 37: | Line 37: | ||
| /*****/ | /*****/ | ||
| - | {{media:example:genericrouter1.png?200|Generic Router}} | + | {{: |
| + | {{:media:meraki:mx65w_backside.jpg?400|}} | ||
| <WRAP BOX> | <WRAP BOX> | ||
| Line 1324: | Line 1326: | ||
| </ | </ | ||
| - | ==== OpenWrt bootlog ==== | + | ==== OpenWrt |
| <WRAP bootlog> | <WRAP bootlog> | ||
| - | < | + | < |
| + | |||
| + | DEV ID = 0xcf1e | ||
| + | PCIE CFG DEV ID = 0x8025 | ||
| + | OTP offset(0x8): | ||
| + | OTP offset(0x9): | ||
| + | OTP offset(0xa): | ||
| + | OTP offset(0xb): | ||
| + | OTP offset(0xc): | ||
| + | OTP offset(0xd): | ||
| + | OTP offset(0xe): | ||
| + | OTP offset(0xf): | ||
| + | NSP25 32bit DDR | ||
| + | SKU ID = 0x0 | ||
| + | DDR type: DDR3 | ||
| + | MEMC 0 DDR speed = 800MHz | ||
| + | ddr_init2: Calling soc_ddr40_set_shmoo_dram_config | ||
| + | ddr_init2: Calling soc_ddr40_phy_calibrate | ||
| + | C01. Check Power Up Reset_Bar | ||
| + | C02. Config and Release PLL from reset | ||
| + | C03. Poll PLL Lock | ||
| + | C04. Calibrate ZQ (ddr40_phy_calib_zq) | ||
| + | C05. DDR PHY VTT On (Virtual VTT setup) DISABLE all Virtual VTT | ||
| + | C06. DDR40_PHY_DDR3_MISC | ||
| + | C07. VDL Calibration | ||
| + | C07.1 | ||
| + | C07.2 | ||
| + | C07.4 | ||
| + | C07.4.1 | ||
| + | C07.4.4 | ||
| + | VDL calibration result: 0x30000003 (cal_steps = 0) | ||
| + | C07.4.5 | ||
| + | C07.4.6 | ||
| + | C07.5 | ||
| + | C08. DDR40_PHY_DDR3_MISC : Start DDR40_PHY_RDLY_ODT.... | ||
| + | C09. Start ddr40_phy_autoidle_on (MEM_SYS_PARAM_PHY_AUTO_IDLE) .... | ||
| + | C10. Wait for Phy Ready | ||
| + | Programming controller register | ||
| + | ddr_init2: Calling soc_ddr40_shmoo_ctl | ||
| + | Validate Shmoo parameters stored in flash ..... OK | ||
| + | Press Ctrl-C to run Shmoo ..... skipped | ||
| + | Restoring Shmoo parameters from flash ..... done | ||
| + | Running simple memory test ..... OK | ||
| + | DDR Tune Completed | ||
| + | DRAM: 2 GiB | ||
| + | WARNING: Caches not enabled | ||
| + | NAND: | ||
| + | 256 KiB blocks, 4 KiB pages, 27B OOB, 8-bit | ||
| + | NAND: | ||
| + | *** Warning - bad CRC, using default environment | ||
| + | |||
| + | In: serial | ||
| + | Out: | ||
| + | Err: | ||
| + | arm_clk=1200MHz, | ||
| + | Enabling icache and dcache | ||
| + | Enabling l2cache | ||
| + | Registering eth | ||
| + | Broadcom BCM IPROC Ethernet driver 0.1 | ||
| + | Using GMAC2 (0x18024000) | ||
| + | ERROR: could not get env ethaddr | ||
| + | et0: ethHw_chipAttach: | ||
| + | bcm_robo_attach: | ||
| + | robo_serdes_reset_core page(0x16) id2(0x3ff) | ||
| + | robo_serdes_init page(0x16) id0(0x4281) id1(0x4fc0) id2(0x3ff) | ||
| + | robo_serdes_init access page4 via page5 lane1 | ||
| + | robo_serdes_init page(0x16) id0(0x4281) id1(0x4fc0) id2(0x3ff) | ||
| + | robo_serdes_init set back to lane0 | ||
| + | Hit any key to stop autoboot: | ||
| + | UBI: attaching mtd1 to ubi0 | ||
| + | UBI: physical eraseblock size: | ||
| + | UBI: logical eraseblock size: 253952 bytes | ||
| + | UBI: smallest flash I/O unit: 4096 | ||
| + | UBI: VID header offset: | ||
| + | UBI: data offset: | ||
| + | UBI: attached mtd1 to ubi0 | ||
| + | UBI: MTD device name: " | ||
| + | UBI: MTD device size: 1015 MiB | ||
| + | UBI: number of good PEBs: 4060 | ||
| + | UBI: number of bad PEBs: 0 | ||
| + | UBI: max. allowed volumes: | ||
| + | UBI: wear-leveling threshold: | ||
| + | UBI: number of internal volumes: 1 | ||
| + | UBI: number of user volumes: | ||
| + | UBI: available PEBs: 40 | ||
| + | UBI: total number of reserved PEBs: 4020 | ||
| + | UBI: number of PEBs reserved for bad PEB handling: 40 | ||
| + | UBI: max/mean erase counter: 434/414 | ||
| + | Read 0 bytes from volume kernel to 90000000 | ||
| + | No size specified -> Using max size (3301376) | ||
| + | ## Booting kernel from FIT Image at 90000000 ... | ||
| + | Using ' | ||
| + | | ||
| + | | ||
| + | | ||
| + | | ||
| + | Data Start: | ||
| + | Data Size: 3159860 Bytes = 3 MiB | ||
| + | | ||
| + | | ||
| + | Load Address: 0x60008000 | ||
| + | Entry Point: | ||
| + | Hash algo: crc32 | ||
| + | Hash value: | ||
| + | Hash algo: sha1 | ||
| + | Hash value: | ||
| + | | ||
| + | ## Flattened Device Tree from FIT Image at 90000000 | ||
| + | Using ' | ||
| + | | ||
| + | | ||
| + | | ||
| + | | ||
| + | Data Start: | ||
| + | Data Size: 16423 Bytes = 16 KiB | ||
| + | | ||
| + | Hash algo: crc32 | ||
| + | Hash value: | ||
| + | Hash algo: sha1 | ||
| + | Hash value: | ||
| + | | ||
| + | | ||
| + | | ||
| + | boot_prep_linux commandline: | ||
| + | | ||
| + | |||
| + | Starting kernel ... | ||
| + | |||
| + | [ 0.000000] Booting Linux on physical CPU 0x0 | ||
| + | [ 0.000000] Linux version 6.6.58 (debian-12-buildopenwrt) (arm-openwrt-linux-muslgnueabi-gcc (OpenWrt GCC 13.3.0 r27964-a0eafc3c77) 13.3.0, GNU ld (GNU Binutils) 2.42) #0 SMP Mon O4 | ||
| + | [ 0.000000] CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=10c5387d | ||
| + | [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache | ||
| + | [ 0.000000] OF: fdt: Machine model: Cisco Meraki MX65 | ||
| + | [ 0.000000] printk: bootconsole [earlycon0] enabled | ||
| + | [ 0.000000] Memory policy: Data cache writealloc | ||
| + | [ 0.000000] Hit pending asynchronous external abort (FSR=0x00001c06) during first unmask, this is most likely caused by a firmware/ | ||
| + | [ 0.000000] Zone ranges: | ||
| + | [ 0.000000] | ||
| + | [ 0.000000] | ||
| + | [ 0.000000] Movable zone start for each node | ||
| + | [ 0.000000] Early memory node ranges | ||
| + | [ 0.000000] | ||
| + | [ 0.000000] Initmem setup node 0 [mem 0x0000000060000000-0x00000000dffeffff] | ||
| + | [ 0.000000] percpu: Embedded 12 pages/cpu s17556 r8192 d23404 u49152 | ||
| + | [ 0.000000] Kernel command line: console=ttyS0, | ||
| + | [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear) | ||
| + | [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear) | ||
| + | [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 522544 | ||
| + | [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off | ||
| + | [ 0.000000] Memory: 2066532K/ | ||
| + | [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, | ||
| + | [ 0.000000] rcu: Hierarchical RCU implementation. | ||
| + | [ 0.000000] | ||
| </ | </ | ||