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toh:meraki:mr18:jtag [2020/04/13 20:10] – [Serial connection] markbirsstoh:meraki:mr18:jtag [2021/09/06 23:21] – [Uploading a kernel] dddamion
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 Note that TX and RX are symmetrical; that is TX (transmit) connects to RX (receive) on the other device and vice-versa. Note that TX and RX are symmetrical; that is TX (transmit) connects to RX (receive) on the other device and vice-versa.
  
-We can now view the console of the MR18. Run the following command on the Raspberry Pi:+We can now view the console of the MR18. Run the following command on the Raspberry Pi.
  
 <code> <code>
 $ sudo apt install picocom $ sudo apt install picocom
-$ sudo picocom --baud 115200 /dev/ttyAMA0   +$ sudo picocom --baud 115200 /dev/ttyS0     # swap for /dev/ttyAMA0 for older Raspberry Pi
-</code> +
- +
-If you are using a newer Raspberry Pi eg a Zero W the serial port changes to /dev/ttyS0 +
-<code> +
-$ sudo apt install picocom +
-$ sudo picocom --baud 115200 /dev/ttyS0  +
 </code> </code>
  
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 | 26           | JTAG 1 | nTRST      | | 26           | JTAG 1 | nTRST      |
  
-The actual mapping is derived from the description in OpenOCD'interfaces/raspberrypi-native.cfg file (see the commands below). We're going to make a slight modification to the file to prepare it for use:+The actual mapping is derived from the description in OpenOCD'interface/raspberrypi-native.cfg file (see the commands below). We're going to make a slight modification to the file to prepare it for use:
  
 <code> <code>
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 <code> <code>
 bcm2835gpio_trst_num 7 bcm2835gpio_trst_num 7
 +</code>
 +
 +Note that the raspberrypi-native.cfg is written for the Raspberry Pi models 1 and zero. Modify the peripheral address and speed coefficients to match your Raspberry Pi model as follow:
 +
 +RPI 1A/A+/B/B+ with 700 MHz base clock
 +<code>
 +bcm2835gpio_peripheral_base 0x20000000
 +bcm2835gpio_speed_coeffs 113714 28
 +</code>
 +
 +RPI 2B with 900 MHz base clock
 +<code>
 +bcm2835gpio_peripheral_base 0x3E000000
 +bcm2835gpio_speed_coeffs 146203 36
 +</code>
 +
 +RPI 3B with 1200 MHz base clock
 +<code>
 +bcm2835gpio_peripheral_base 0x3E000000
 +bcm2835gpio_speed_coeffs 194938 48
 +</code>
 +
 +RPI 3B+ with 1400 MHz base clock (despite the higher clock seems to be the same as RPi 3B)
 +<code>
 +bcm2835gpio_peripheral_base 0x3E000000
 +bcm2835gpio_speed_coeffs 194938 48
 +</code>
 +
 +RPI 4 with 1500 MHz base clock
 +<code>
 +bcm2835gpio_peripheral_base 0xFE000000
 +bcm2835gpio_speed_coeffs 236181 60
 </code> </code>
  
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 Our plan to upload this code into the RAM of the device, and then point the CPU at it to execute, much like a bootloader would. Our plan to upload this code into the RAM of the device, and then point the CPU at it to execute, much like a bootloader would.
  
-Firstly, we need to catch the boot process early. This is important, as we need to boot our own kernel before any hardware peripherals in the device have begun to initialise.+Firstly, we need to catch the boot process early. This is important, as we need to boot our own kernel before any hardware peripherals in the device have begun to initialize, but late enough that the processor has been set up correctly by the existing Meraki bootloader. 
 + 
 +On some devices this time window is very small.  Too early or too late will result in openocd failing to communicate properly with the processor.\\ 
 +Reports show the place to interrupt the boot process is during ''part1'' of the Meraki bootloader ''Copying image to memory ... ...'' as shown below: 
 + 
 +[[https://forum.openwrt.org/t/meraki-mr18-installation-using-jtag-and-openocd/77900/15|{{https://forum.openwrt.org/uploads/default/optimized/3X/e/4/e482bb3d5ef79abfa94e003eb19e224f0aef064a_2_690x394.png}}]] 
 +Note: It appears to be impossible to get the correct timing if using POE.
  
 Provide power to the MR18 and at that exact moment, run OpenOCD: Provide power to the MR18 and at that exact moment, run OpenOCD:
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 We're looking to interrupt the device very early in its boot sequence. You should be able to 'catch' it during the second stage bootloader, and certainly before of the Cisco's Linux code has run. We're looking to interrupt the device very early in its boot sequence. You should be able to 'catch' it during the second stage bootloader, and certainly before of the Cisco's Linux code has run.
  
-Now execute the following commands, one by one, by hand on the OpenOCD command line which is started by connecting in to the running openocd process:+Now execute the following commands, one by one, by hand on the OpenOCD command line which is started by connecting into the running OpenOCD process:
  
 <code> <code>
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 <code> <code>
-> load_image   openwrt-ar71xx-nand-mr18-initramfs-kernel.bin 0x8005FC00+> load_image openwrt-ar71xx-nand-mr18-initramfs-kernel.bin 0x8005FC00 
 +</code> 
 +It should return something along the lines of:  
 +''downloaded 6353004 bytes in 43.844112s (141.504 KiB/s)'' 
 +<code>
 > verify_image openwrt-ar71xx-nand-mr18-initramfs-kernel.bin 0x8005FC00 > verify_image openwrt-ar71xx-nand-mr18-initramfs-kernel.bin 0x8005FC00
 </code> </code>
 +Again you should be able to see something like this:
 +''verified 6353004 bytes in 1.027853s (6035.985 KiB/s)''
  
 Now reset some registers and execute the kernel: Now reset some registers and execute the kernel:
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 === Troubleshooting === === Troubleshooting ===
  
-I found the process above can be someone unreliable, not working 100% of the time. The result is that the serial console either shows nothing, or perhaps some garbled characters. Mainly this can be resolved by doing the final steps again soon after:+I found the process above can be somewhat unreliable, not working 100% of the time. The result is that the serial console either shows nothing, or perhaps some garbled characters. Mainly this can be resolved by doing the final steps again soon after:
  
 <code> <code>
  • Last modified: 2023/10/15 16:53
  • by mh