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| toh:huawei:hg622 [2015/12/02 22:51] – [GPIOs] danitool | toh:huawei:hg622 [2023/05/21 16:58] – fix links danitool | ||
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| + | ====== Huawei EchoLife HG622 ====== | ||
| + | {{section> | ||
| + | {{section> | ||
| + | |||
| + | The HG622 is an ADSL wifi router mainly distributed by [[wp> | ||
| + | |||
| + | {{: | ||
| + | |||
| + | |||
| + | ===== Supported Versions ===== | ||
| + | ---- datatable ---- | ||
| + | cols : Brand, Model, Supported Since Rel, Supported Current Rel, Forum search_search-forums, | ||
| + | headers : Brand, Model, Supported Since, Current Release, Forum Search, Technical Data | ||
| + | align : c, | ||
| + | filter | ||
| + | ---- | ||
| + | |||
| + | ---- datatable ---- | ||
| + | cols : Unsupported Functions_unsupporteds | ||
| + | filter | ||
| + | ---- | ||
| + | |||
| + | |||
| + | ===== Hardware Highlights ===== | ||
| + | ---- datatable ---- | ||
| + | cols : Model, Versions, CPU, CPU MHz, Flash MB_mbflashs, | ||
| + | header | ||
| + | align : c, | ||
| + | filter | ||
| + | ---- | ||
| + | |||
| + | |||
| + | ===== Installation ===== | ||
| + | ---- datatable ---- | ||
| + | cols : Model, Versions, Supported Current Rel, Firmware OpenWrt Install URL_url, Firmware OpenWrt Upgrade URL_url, Firmware OEM Stock URL_url | ||
| + | headers : Model, Version, Current Release, Firmware OpenWrt Install, Firmware OpenWrt Upgrade, Firmware OEM Stock | ||
| + | align : c,c,c | ||
| + | filter | ||
| + | ---- | ||
| + | |||
| + | <WRAP center round important 60%> | ||
| + | **Warning**: | ||
| + | |||
| + | **BUG fixed** in this commit -> [[https:// | ||
| + | |||
| + | **17.01.4 < <color red> | ||
| + | </ | ||
| + | |||
| + | |||
| + | ==== Old firmwares ==== | ||
| + | These firmwares were fully tested, and they' | ||
| + | |||
| + | ^ Version ^ Release date ^ firmware link ^ Notes ^ kernel ^ Tested ^ | ||
| + | | **LEDE Reboot 17.01.4 r3560** | 2017 Oct | http:// | ||
| + | |||
| + | -> [[docs: | ||
| + | |||
| + | |||
| + | ==== OEM installation using the TFTP method ==== | ||
| + | |||
| + | For installing the OpenWrt firmware you will need to use the CFE serial console: | ||
| + | * Connect a [[docs: | ||
| + | * Start a TFTP server in your PC. Copy the // | ||
| + | * Set the IP at your PC to 192.168.1.35 (or any compatible), | ||
| + | * Press the reset button (**very important**), | ||
| + | * Execute the command: '' | ||
| + | This is a session of flashing via TFTP: | ||
| + | |||
| + | < | ||
| + | Loading 192.168.1.35: | ||
| + | Finished loading 2686980 bytes | ||
| + | |||
| + | Flashing root file system and kernel at 0xb8020000: ............................................ | ||
| + | |||
| + | . | ||
| + | *** Image flash done *** ! | ||
| + | Resetting board...\0xff | ||
| + | </ | ||
| + | |||
| + | You may have to try several times, because the time window the TFTP client has to connect to the TFTP server is very short. | ||
| + | |||
| + | |||
| + | ==== Flash Layout ==== | ||
| + | Please check out the article [[docs: | ||
| + | |||
| + | ^ partition | ||
| + | | mtd0 | **CFE** | ||
| + | | mtd1 | **kernel** | ||
| + | | mtd2 | **rootfs** | ||
| + | | mtd3 | **rootfs_data** | ||
| + | | mtd4 | **cal_data** | ||
| + | | mtd5 | **nvram** | ||
| + | | mtd6 | **linux** | ||
| + | |||
| + | ===== Hardware ===== | ||
| + | |||
| + | ==== Info ==== | ||
| + | ^ [[wp> | ||
| + | ^ Vendor | ||
| + | ^ [[docs: | ||
| + | ^ Board ID | 96368MVWG_hg622 | ||
| + | ^ [[docs: | ||
| + | ^ [[docs: | ||
| + | ^ Flash-Chip | ||
| + | ^ Flash size | 16 MiB | | ||
| + | ^ RAM | 32 MiB / DDR-400 | | ||
| + | ^ Wireless | ||
| + | ^ Antenna | ||
| + | ^ Ethernet | ||
| + | ^ USB | 1 x USB2.0 | | ||
| + | ^ ADSL Modem | Yes, NOT SUPPORTED | | ||
| + | ^ Power adapter | ? | | ||
| + | ^ [[docs: | ||
| + | ^ [[docs: | ||
| + | |||
| + | ==== PCB pictures ==== | ||
| + | |||
| + | {{media: | ||
| + | |||
| + | |||
| + | ==== Serial ==== | ||
| + | -> [[docs: | ||
| + | |||
| + | How to connect to the Serial Port of this specific device: | ||
| + | |||
| + | ^ J4 ^ | ||
| + | | TX | | ||
| + | | GND | | ||
| + | | VCC | | ||
| + | | nc | | ||
| + | | RX | | ||
| + | |||
| + | Serial works at 3.3V 115200N1, see pin assignments above | ||
| + | |< | ||
| + | Data bits - 8 | ||
| + | Stop bits - 1 | ||
| + | Parity | ||
| + | Flow control | ||
| + | |||
| + | |||
| + | ==== JTAG ==== | ||
| + | -> [[docs: | ||
| + | |||
| + | How to connect to the JTAG Port of this specific device: | ||
| + | |||
| + | {{media: | ||
| + | |||
| + | <a2s> | ||
| + | # | ||
| + | TX | #-# | .-. | TDI | ||
| + | | #-# | ' | ||
| + | | ||
| + | GND | .-. | .-. | TMS | ||
| + | | ' | ||
| + | | ||
| + | VCC | .-. | .-. | TDO | ||
| + | | ' | ||
| + | | ||
| + | NC | .-. | .-. | TRST | ||
| + | | ' | ||
| + | | ||
| + | RX | .-. | .-. | TCK | ||
| + | | ' | ||
| + | # | ||
| + | | ||
| + | </ | ||
| + | |||
| + | |||
| + | === URJTAG === | ||
| + | |||
| + | Using the urJtag with an FT2232H you can read the flash chip. | ||
| + | |||
| + | urjtag command file used: | ||
| + | |||
| + | < | ||
| + | endian big | ||
| + | detect | ||
| + | |||
| + | register BR 1 | ||
| + | register DIR 32 | ||
| + | register EJIMPCODE 32 | ||
| + | register EJADDRESS 32 | ||
| + | register EJDATA 32 | ||
| + | register EJCONTROL 32 | ||
| + | register EJALL 96 | ||
| + | |||
| + | instruction length 5 | ||
| + | instruction BYPASS 11111 BR | ||
| + | instruction IDCODE 00001 DIR | ||
| + | instruction EJTAG_IMPCODE 00011 EJIMPCODE | ||
| + | instruction EJTAG_ADDRESS 01000 EJADDRESS | ||
| + | instruction EJTAG_DATA 01001 EJDATA | ||
| + | instruction EJTAG_CONTROL 01010 EJCONTROL | ||
| + | instruction EJTAG_ALL 01011 EJALL | ||
| + | |||
| + | instruction IDCODE | ||
| + | shift ir | ||
| + | shift dr | ||
| + | dr | ||
| + | |||
| + | initbus ejtag | ||
| + | |||
| + | detectflash 0x38000000 | ||
| + | |||
| + | readmem 0x38000000 0x020000 hg622-CFE.bin</ | ||
| + | |||
| + | You can use a different JTAG cable, only the first line will be different | ||
| + | |||
| + | ^ JTAG adapter ^ command ^ | ||
| + | | Altera USB Blaster adapter | < | ||
| + | | [[docs: | ||
| + | | [[docs: | ||
| + | |||
| + | |||
| + | === ZJTAG === | ||
| + | |||
| + | and using zjtag(version 1.5) | ||
| + | * to detect flash chip:< | ||
| + | * to backup all flash: < | ||
| + | |||
| + | ==== GPIOs ==== | ||
| + | |||
| + | === LEDs === | ||
| + | Read: [[docs: | ||
| + | ^ GPIO ^ symbol | ||
| + | | 2 | adsl | Low | | ||
| + | | 5 | inet | Low | | ||
| + | | 11 | usb | Low | | ||
| + | | 22 | power | Low | | ||
| + | | 6 (PINMUX_EPHY0_ACT_LED) | ||
| + | | 7 (PINMUX_EPHY1_ACT_LED) | ||
| + | | 8 (PINMUX_EPHY2_ACT_LED) | ||
| + | | 9 (PINMUX_EPHY3_ACT_LED) | ||
| + | |||
| + | |||
| + | === Buttons === | ||
| + | -> [[docs: | ||
| + | ^ GPIO ^ Event ^ Active | ||
| + | | 34 | Reset | Low | | ||
| + | |||
| + | |||
| + | ===== Backup and restore Wifi calibration data ===== | ||
| + | In theory each wifi chip (it doesn' | ||
| + | |||
| + | * Without the cal_data, wifi will not work | ||
| + | * The WLAN calibration data is specific for your device, i.e. cal_data from another device will most likely not work | ||
| + | * If you wipe it accidentially it will be difficult to restore | ||
| + | * It cannot be restored by flashing back a vendor firmware | ||
| + | |||
| + | -> It's a good idea to backup this partition **before** flashing OpenWrt. | ||
| + | |||
| + | |||
| + | ==== Backup cal_data partition ==== | ||
| + | A serial to TTL converter is needed to access the router' | ||
| + | |||
| + | What we need is to save the information that contains the partition cal_data, but the command " | ||
| + | < | ||
| + | But there are only valid data from 0 to 200, so we would use this one: | ||
| + | < | ||
| + | With the execution of this command we will obtain a console dump. | ||
| + | The content of the cal_data partition is something like this: | ||
| + | < | ||
| + | b8fa0010: 00 00 62 30 14 18 00 00 01 00 6a ff 0c 00 ff ff ..b0......j..... | ||
| + | b8fa0020: ff ff ff ff b0 92 ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa0030: ff ff ff ff 22 08 24 00 ff ff 2d 01 ff ff d9 fa ...." | ||
| + | b8fa0040: cc 88 ff ff 0d ff 00 00 03 00 00 00 00 00 ff ff ................ | ||
| + | b8fa0050: ff ff 11 11 10 10 0f 0f 0e 0e 0d 0d 0c 0c 0c 0c ................ | ||
| + | b8fa0060: 09 09 08 08 07 07 07 07 08 08 08 08 08 08 ff ff ................ | ||
| + | b8fa0070: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa0080: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa0090: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa00a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa00b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa00c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa00d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff 55 55 ..............UU | ||
| + | b8fa00e0: 88 88 77 77 66 66 66 66 66 66 66 66 66 66 66 66 ..wwffffffffffff | ||
| + | b8fa00f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa0100: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa0110: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa0120: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa0130: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa0140: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa0150: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa0160: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa0170: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa0180: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa0190: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa01a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa01b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa01c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa01d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa01e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ | ||
| + | b8fa01f0: ff ff ff ff ff ff ff ff ff ff ff ff ff 06 86 93 ................ | ||
| + | </ | ||
| + | |||
| + | We select the text in the console, copy it and paste it in a text editor, then open a hex editor and copy and paste only the hexadecimal part of each of the lines, until we have in the hex editor the same as in the dump. It just takes a little patience. Do it so because when you paste the text of the console in the hex editor, you also copy the memory pointers and the ascii part, so the final result is not valid. Now we just need to save the file, for example cal_data_hg622.bin. There is an easy way below. | ||
| + | |||
| + | Now we install OpenWrt, and once installed, we copy the file with the calibration data to the router. To do so we use WinSCP, we will copy the file cal_data_hg622.bin to the folder "/ | ||
| + | The problem is that the partitions are protected and can not be modified, to do so we will have to install the **kmod-mtd-rw** module, which allows us to modify the partitions if we execute the command '' | ||
| + | <WRAP center round download 60%> | ||
| + | If you lost your calibration data, here is the cal_data partition for this model: | ||
| + | {{: | ||
| + | </ | ||
| + | ==== Restore cal_data partition ==== | ||
| + | If you have already lost the calibration data, download {{: | ||
| + | |||
| + | First of all, transfer the cal_data_hg622.bin file into your router with WinSCP to "/ | ||
| + | |||
| + | The router has to have [[# | ||
| + | < | ||
| + | opkg install kmod-mtd-rw</ | ||
| + | With this we install the necessary module to unprotect the partitions, then execute | ||
| + | < | ||
| + | We can now modify the data of the partition cal_data. | ||
| + | |||
| + | **Optional**: | ||
| + | < | ||
| + | Then we check the partition mtd(x) that contains the calibration data by executing: | ||
| + | < | ||
| + | dev: size | ||
| + | mtd0: 00020000 00020000 " | ||
| + | mtd1: 00f80000 00020000 " | ||
| + | mtd2: 001a56a8 00020000 " | ||
| + | mtd3: 00dda858 00020000 " | ||
| + | mtd4: 00bc0000 00020000 " | ||
| + | mtd5: 00020000 00020000 " | ||
| + | mtd6: 00020000 00020000 " | ||
| + | And finally | ||
| + | < | ||
| + | * **Restart** OpenWrt and check if wifi works. | ||
| + | |||
| + | * Other considerations: | ||
| + | The MAC is in the first line, in this example it is "ac e8 7b 30 ef b4", but it is not the same as in the sticker, the last two characters are different "ac e8 7b 30 ef ac". Anyway if we start the router before making the modifications connected by serial port, we can find the line "Main bssid = ac: e8: 7b: 30: ef: b4", which as we see informs us of the MAC that appears in the calibration data. Now we just have to edit the file with hex editor and put the MAC of our router, and then follow the whole procedure. | ||
| + | |||
| + | If you accidentially erased your cal_data partition and you didn't make your own backup, you can use the above data to fill the erased partition (note the MAC address is specific for each calibration data). Or try this: | ||
| + | * Generate a bin file with the cal_data. You don't need to do this step if you already have your own backup. Make it at your PC with a **linux** distro:< | ||
| + | * Also, if you don't have a **linux** distro, copy the next content in a hex editor:< | ||
| + | |||
| + | * Now transfer the **cal_data_hg622.bin** file into your router and flash the **cal_data** partition< | ||
| + | * **Restart** OpenWrt and check if wifi works. | ||
| + | |||
| + | ==== Basic internet configuration ==== | ||
| + | You can set a basic internet configuration with uci commands. Assuming your main router (gateway) has the IP 192.168.1.1 (the most common). Follow these steps. | ||
| + | |||
| + | - Connect only the ethernet cable from the HG622 to your computer, and telnet it or ssh. | ||
| + | - Execute these commands < | ||
| + | uci set network.lan.netmask=255.255.255.0 | ||
| + | uci set network.lan.gateway=192.168.1.1 | ||
| + | uci set network.lan.dns=' | ||
| + | uci commit network</ | ||
| + | - You may also need to disable the dhcp server < | ||
| + | - Reboot the HG622 and connect the ethernet cable to the main router (gateway). | ||
| + | - Now the HG622 IP is 192.168.1.254, | ||
| + | - Ping any internet address, or install a package < | ||
| + | opkg install luci</ | ||
| + | |||
| + | |||
| + | ===== Bootloader mods ===== | ||
| + | |||
| + | ^ bootloader ^ download link ^ description ^ | ||
| + | | CFE | [[https:// | ||
| + | |||
| + | ==== CFE upgrade ==== | ||
| + | If you want to have a web server for easy flashing you can upgrade the bootloader with a new modded one. | ||
| + | |||
| + | <WRAP center round download 60%> | ||
| + | [[https:// | ||
| + | |||
| + | </ | ||
| + | |||
| + | Use the same procedure, as described above. This is a session of upgrading the bootloader | ||
| + | <WRAP bootlog> | ||
| + | < | ||
| + | Build Date: Sun Jul 24 16:58:20 CST 2011 (wangxinfeng@build.huawei.com) | ||
| + | Copyright (C) 2000-2008 Broadcom Corporation. | ||
| + | |||
| + | Parallel flash device: name AM29LV320MT, | ||
| + | CPU type 0x2A031: 400MHz, Bus: 160MHz, Ref: 64MHz | ||
| + | CPU running TP0 | ||
| + | Total memory: 33554432 bytes (32MB) | ||
| + | Boot Address 0xb8000000 | ||
| + | |||
| + | |||
| + | Board IP address | ||
| + | Host IP address | ||
| + | Gateway IP address | ||
| + | Run from flash/host (f/h) : f | ||
| + | Default host run file name : vmlinux | ||
| + | Default host flash file name : bcm963xx_fs_kernel | ||
| + | Boot delay (0-9 seconds) | ||
| + | Boot image (0=latest, 1=previous) : 0 | ||
| + | Board Id (0-5) : 96368MVWG_hg622 | ||
| + | Number of MAC Addresses (1-32) | ||
| + | Base MAC Address | ||
| + | PSI Size (1-64) KBytes | ||
| + | Main Thread Number [0|1] : 0 | ||
| + | |||
| + | *** Press any key to stop auto run (3 seconds) *** | ||
| + | Auto run second count down: 1 | ||
| + | web info: Waiting for connection on socket 0. | ||
| + | CFE> | ||
| + | CFE> f 192.168.1.100: | ||
| + | Loading 192.168.1.100: | ||
| + | Finished loading 87360 bytes | ||
| + | |||
| + | Flashing CFE: .. | ||
| + | |||
| + | readNvramData() CRC ERROR !!!!!! | ||
| + | |||
| + | writeNvramData | ||
| + | |||
| + | Flashing root file system and kernel at 0xb8020000: .. | ||
| + | |||
| + | |||
| + | Clear Flags ok! | ||
| + | . | ||
| + | *** Image flash done *** ! | ||
| + | |||
| + | CFE timeout, | ||
| + | |||
| + | Resetting board... | ||
| + | |||
| + | CFE version 2.0.3 for BCM63XX (32bit, | ||
| + | Build Date: Tue Dec 15 18:07:41 CET 2015 (dani@tool) | ||
| + | Copyright (C) 2000-2009 Broadcom Corporation. | ||
| + | |||
| + | Parallel flash device: name AM29LV320MT, | ||
| + | Total Flash size: 16384K with 128 sectors | ||
| + | Chip ID: BCM6368B2, MIPS: 400MHz | ||
| + | Main Thread: TP0 | ||
| + | Total Memory: 33554432 bytes (32MB) | ||
| + | Boot Address: 0xb8000000 | ||
| + | |||
| + | *** Upgrading NVRAM (version 5 to version 6) *** | ||
| + | |||
| + | Board IP address | ||
| + | Host IP address | ||
| + | Gateway IP address | ||
| + | Run from flash/host (f/h) : f | ||
| + | Default host run file name : vmlinux | ||
| + | Default host flash file name : bcm963xx_fs_kernel | ||
| + | Boot delay (0-9 seconds) | ||
| + | Board Id (0-15) | ||
| + | Number of MAC Addresses (1-32) | ||
| + | Base MAC Address | ||
| + | PSI Size (1-64) KBytes | ||
| + | Enable Backup PSI [0|1] : 0 | ||
| + | System Log Size (0-256) KBytes | ||
| + | Main Thread Number [0|1] : 0 | ||
| + | Voice Board Configuration (0-19) | ||
| + | |||
| + | *** Press any key to stop auto run (3 seconds) *** | ||
| + | Auto run second count down: 0 | ||
| + | Booting from only image (0xb8020000) ... | ||
| + | Code Address: 0x00000000, Entry Address: 0x00000000 | ||
| + | Failed to decompress image. | ||
| + | web info: Waiting for connection on socket 0. | ||
| + | web info: Waiting for connection on socket 1. | ||
| + | web info: Waiting for connection on socket 2. | ||
| + | web info: Waiting for connection on socket 0. | ||
| + | web info: Waiting for connection on socket 1. | ||
| + | web info: Waiting for connection on socket 3. | ||
| + | web warning: Unexpected TCP disconnect. | ||
| + | web warning: Unexpected TCP disconnect. | ||
| + | web warning: Unexpected TCP disconnect. | ||
| + | web info: Waiting for connection on socket 0. | ||
| + | web info: Upload 4587524 bytes, Broadcom image format. | ||
| + | CFE> | ||
| + | </ | ||
| + | </ | ||
| + | |||
| + | After CFE upgrade you will have a web server at '' | ||
| + | |||
| + | ===== OpenWrt bootlog ===== | ||
| + | |||
| + | <WRAP bootlog> | ||
| + | < | ||
| + | [ 0.000000] Detected Broadcom 0x6368 CPU revision b2 | ||
| + | [ 0.000000] CPU frequency is 400 MHz | ||
| + | [ 0.000000] 32MB of RAM installed | ||
| + | [ 0.000000] registering 38 GPIOs | ||
| + | [ 0.000000] board_bcm963xx: | ||
| + | [ 0.000000] board_bcm963xx: | ||
| + | [ 0.000000] bootconsole [early0] enabled | ||
| + | [ 0.000000] CPU revision is: 0002a031 (Broadcom BMIPS4350) | ||
| + | [ 0.000000] board_bcm963xx: | ||
| + | [ 0.000000] Determined physical RAM map: | ||
| + | [ 0.000000] | ||
| + | [ 0.000000] Initrd not found or empty - disabling initrd | ||
| + | [ 0.000000] Zone ranges: | ||
| + | [ 0.000000] | ||
| + | [ 0.000000] Movable zone start for each node | ||
| + | [ 0.000000] Early memory node ranges | ||
| + | [ 0.000000] | ||
| + | [ 0.000000] On node 0 totalpages: 8192 | ||
| + | [ 0.000000] free_area_init_node: | ||
| + | [ 0.000000] | ||
| + | [ 0.000000] | ||
| + | [ 0.000000] | ||
| + | [ 0.000000] Primary instruction cache 64kB, VIPT, 4-way, linesize 16 bytes. | ||
| + | [ 0.000000] Primary data cache 32kB, 2-way, VIPT, cache aliases, linesize 16 bytes | ||
| + | [ 0.000000] PERCPU: Embedded 7 pages/cpu @81043000 s6144 r8192 d14336 u32768 | ||
| + | [ 0.000000] pcpu-alloc: s6144 r8192 d14336 u32768 alloc=8*4096 | ||
| + | [ 0.000000] pcpu-alloc: [0] 0 [0] 1 | ||
| + | [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 8128 | ||
| + | [ 0.000000] Kernel command line: root=/ | ||
| + | [ 0.000000] PID hash table entries: 128 (order: -3, 512 bytes) | ||
| + | [ 0.000000] Dentry cache hash table entries: 4096 (order: 2, 16384 bytes) | ||
| + | [ 0.000000] Inode-cache hash table entries: 2048 (order: 1, 8192 bytes) | ||
| + | [ 0.000000] __ex_table already sorted, skipping sort | ||
| + | [ 0.000000] Memory: 28756k/ | ||
| + | [ 0.000000] Hierarchical RCU implementation. | ||
| + | [ 0.000000] NR_IRQS:128 | ||
| + | [ 0.028000] Calibrating delay loop... 397.82 BogoMIPS (lpj=795648) | ||
| + | [ 0.032000] pid_max: default: 32768 minimum: 301 | ||
| + | [ 0.036000] Mount-cache hash table entries: 512 | ||
| + | [ 0.044000] SMP: Booting CPU1... | ||
| + | [ 0.048000] CPU revision is: 0002a031 (Broadcom BMIPS4350) | ||
| + | [ 0.048000] Primary instruction cache 64kB, VIPT, 4-way, linesize 16 bytes. | ||
| + | [ 0.048000] Primary data cache 32kB, 2-way, VIPT, cache aliases, linesize 16 bytes | ||
| + | [ 0.076000] SMP: CPU1 is running | ||
| + | [ 0.076000] Brought up 2 CPUs | ||
| + | [ 0.108000] NET: Registered protocol family 16 | ||
| + | [ 0.116000] registering PCI controller with io_map_base unset | ||
| + | [ 0.132000] bio: create slab < | ||
| + | [ 0.136000] PCI host bridge to bus 0000:00 | ||
| + | [ 0.140000] pci_bus 0000:00: root bus resource [mem 0x30000000-0x37ffffff] | ||
| + | [ 0.144000] pci_bus 0000:00: root bus resource [io 0x8000000-0x800ffff] | ||
| + | [ 0.148000] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff] | ||
| + | [ 0.152000] pci 0000: | ||
| + | [ 0.152000] pci 0000: | ||
| + | [ 0.164000] pci 0000: | ||
| + | [ 0.164000] pci_bus 0000:00: busn_res: [bus 00-ff] end is updated to 00 | ||
| + | [ 0.164000] pci 0000: | ||
| + | [ 0.168000] Switching to clocksource MIPS | ||
| + | [ 0.180000] NET: Registered protocol family 2 | ||
| + | [ 0.184000] TCP established hash table entries: 512 (order: 0, 4096 bytes) | ||
| + | [ 0.192000] TCP bind hash table entries: 512 (order: 0, 4096 bytes) | ||
| + | [ 0.200000] TCP: Hash tables configured (established 512 bind 512) | ||
| + | [ 0.208000] TCP: reno registered | ||
| + | [ 0.208000] UDP hash table entries: 256 (order: 1, 8192 bytes) | ||
| + | [ 0.216000] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes) | ||
| + | [ 0.224000] NET: Registered protocol family 1 | ||
| + | [ 0.228000] PCI: CLS 0 bytes, default 16 | ||
| + | [ 0.228000] audit: initializing netlink socket (disabled) | ||
| + | [ 0.236000] type=2000 audit(0.232: | ||
| + | [ 0.240000] squashfs: version 4.0 (2009/ | ||
| + | [ 0.248000] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc. | ||
| + | [ 0.256000] msgmni has been set to 56 | ||
| + | [ 0.264000] io scheduler noop registered | ||
| + | [ 0.268000] io scheduler deadline registered (default) | ||
| + | [ 0.272000] bcm63xx_uart.0: | ||
| + | [ 0.280000] console [ttyS0] enabled, bootconsole disabled | ||
| + | [ 0.292000] bcm63xx-rng bcm63xx-rng: | ||
| + | [ 0.300000] physmap platform flash device: 08000000 at 18000000 | ||
| + | [ 0.308000] physmap-flash.0: | ||
| + | [ 0.320000] physmap-flash.0: | ||
| + | [ 0.320000] Amd/Fujitsu Extended Query Table at 0x0040 | ||
| + | [ 0.324000] | ||
| + | [ 0.328000] number of CFI chips: 1 | ||
| + | [ 0.332000] bcm63xxpart: | ||
| + | [ 0.340000] bcm63xxpart: | ||
| + | [ 0.348000] bcm63xxpart: | ||
| + | [ 0.356000] bcm63xxpart: | ||
| + | [ 0.364000] bcm63xxpart: | ||
| + | [ 0.372000] bcm63xxpart: | ||
| + | [ 0.376000] bcm63xxpart: | ||
| + | [ 0.384000] bcm63xxpart: | ||
| + | [ 0.392000] 6 bcm63xxpart partitions found on MTD device physmap-flash.0 | ||
| + | [ 0.400000] Creating 6 MTD partitions on " | ||
| + | [ 0.404000] 0x000000000000-0x000000020000 : " | ||
| + | [ 0.412000] 0x000000020100-0x000000140000 : " | ||
| + | [ 0.416000] mtd: partition " | ||
| + | [ 0.432000] 0x000000140000-0x000000fa0000 : " | ||
| + | [ 0.440000] mtd: partition " | ||
| + | [ 0.444000] mtd: partition " | ||
| + | [ 0.452000] 0x000000320000-0x000000fa0000 : " | ||
| + | [ 0.460000] 0x000000fa0000-0x000000fc0000 : " | ||
| + | [ 0.468000] 0x000000fe0000-0x000001000000 : " | ||
| + | [ 0.476000] 0x000000020000-0x000000fa0000 : " | ||
| + | [ 0.484000] bcm63xx-spi bcm63xx-spi: | ||
| + | [ 0.532000] b53_common: found switch: BCM63xx, rev 0 | ||
| + | [ 0.536000] bcm63xx-wdt bcm63xx-wdt: | ||
| + | [ 0.548000] TCP: cubic registered | ||
| + | [ 0.552000] NET: Registered protocol family 17 | ||
| + | [ 0.556000] 8021q: 802.1Q VLAN Support v1.8 | ||
| + | [ 0.568000] VFS: Mounted root (squashfs filesystem) readonly on device 31:2. | ||
| + | [ 0.576000] Freeing unused kernel memory: 200k freed | ||
| + | [ 2.508000] bcm63xx_enetsw bcm63xx_enetsw.0: | ||
| + | [ 2.740000] Button Hotplug driver version 0.4.1 | ||
| + | [ 2.764000] input: gpio-keys-polled as / | ||
| + | [ 6.252000] jffs2: notice: (365) jffs2_build_xattr_subsystem: | ||
| + | [ 7.428000] compat-drivers backport release: compat-drivers-2013-03-28-5 | ||
| + | [ 7.432000] Backport based on wireless-testing.git master-2013-04-16 | ||
| + | [ 7.440000] compat.git: wireless-testing.git | ||
| + | [ 7.488000] cfg80211: Calling CRDA to update world regulatory domain | ||
| + | [ 7.492000] cfg80211: World regulatory domain updated: | ||
| + | [ 7.500000] cfg80211: | ||
| + | [ 7.508000] cfg80211: | ||
| + | [ 7.516000] cfg80211: | ||
| + | [ 7.524000] cfg80211: | ||
| + | [ 7.532000] cfg80211: | ||
| + | [ 7.540000] cfg80211: | ||
| + | [ 7.856000] NET: Registered protocol family 10 | ||
| + | [ 8.176000] SCSI subsystem initialized | ||
| + | [ 8.336000] usbcore: registered new interface driver usbfs | ||
| + | [ 8.344000] usbcore: registered new interface driver hub | ||
| + | [ 8.348000] usbcore: registered new device driver usb | ||
| + | [ 8.848000] PCI: Enabling device 0000: | ||
| + | [ 8.852000] rt2800pci 0000: | ||
| + | [ 8.856000] phy0 -> rt2x00lib_request_eeprom_file: | ||
| + | [ 8.868000] phy0 -> rt2x00_set_rt: | ||
| + | [ 8.876000] phy0 -> rt2x00_set_rf: | ||
| + | [ 8.884000] ieee80211 phy0: Selected rate control algorithm ' | ||
| + | [ 9.452000] PPP generic driver version 2.4.2 | ||
| + | [ 9.732000] ip_tables: (C) 2000-2006 Netfilter Core Team | ||
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| + | </ | ||
| + | |||
| + | ===== Tags ===== | ||
| + | [[meta: | ||
| + | {{tag> | ||