EnGenius ESR9753

This device is NOT RECOMMENDED for future use with OpenWrt due to low flash/ram.
DO NOT BUY DEVICES WITH 4MB FLASH / 32MB RAM if you intend to flash an up-to-date and secure OpenWrt version (18.06 or later) onto it! See 4/32 warning for details.

1) This device does not have sufficient resources (flash and/or RAM) to provide secure and reliable operation.
This means that even setting a password or changing simple network settings might not be possible any more, rendering the device effectively useless. See OpenWrt on 4/32 devices what you can do now.

2) OpenWrt support for this device will end after 2019.
19.07 will be the last official build for 4/32 devices. After 19.07, no further OpenWrt images will be built for 4/32 devices. See OpenWrt on 4/32 devices what you can do now.

The ESR9753 (one antenna) and the ESR9752 (two antennas) are very similar devices and there are many branded version of this device. Even other devices (ESR6600) look very similar. It is based on the RT3052 chipset, it has 4MB of flash and typically 32MB of RAM, as some models have 16MB. It is at least known as the Sitecom WL-611.

At least 18.06.1 works on the ESR-9752.

I installed the firmware using a serial cable and a TFTP server. The TX, RX and GND pins are clearly marked on my device.

In the bootloader I used option 2 to download from the TFTP server and write the file to flash.

Procedure found on https://infodepot.fandom.com/wiki/Rosewill_RNX-EasyN4 and Tested by me.

Acquiring the Flash Screen. Once connected to the serial console on the router with Putty running, I disconnected the router power supply, and then reconnected it. Immediately upon reconnecting the power to the router, I starting pressing the “2” key repeatedly. (Sometimes, this step needed to be repeated in order to get the console to communicate the “2” to the router at the right time.) The “2” option is the one on the Senao ESR-9752 router board which allows for firmware (“system code”) to be sent to the Flash chip via TFTP. If the “2” option is sent in time to the serial port, then the following screen comes up on the console:

2: System Load Linux Kernel then write to Flash via TFTP.
Warning!! Erase Linux in Flash then burn new one. Are you sure?(Y/N)

As you might expect, I then hit “Y” and then Enter.

Configuring and Starting TFTP. Prior to proceeding with the console, I configured and started the TFTP server. First, I plugged an Ethernet cable into one of the router's LAN ports, and the other end into the network adapter on my computer. Next, I set the network adapter to an IP address of 192.168.99.8. (I could have used any number in the 192.168.99.xx subnet, other than .9. The reason will be clear in a moment.) I set the subnet mask to 255.255.255.0, and left the gateway and DNS addresses blank. After that, I configured and started the TFTP server. I used the tftpd64 server, which is both free and very simple in layout. Before starting, I turned off the WiFi radio on my computer. (I also suspended antivirus and firewall, although I am not certain that that was necessary.) Upon starting the TFTP server, I confirmed that it was “bound” to the network adapter's IP address (192.168.99.8). I set the “root” for the server as “C:\,” and placed a copy of the console firmware (firmware.bin) in the C:\ root directory. Then I started the TFTP server by hitting “Start” on the General screen of the program.

Here Comes the Flash. Going back to the console, the following appeared on the screen:

Please Input new ones /or Ctrl-C to discard
       Input device IP (192.168.99.9) ==:

The prompt is asking for the IP address of the router. And that (as the prompt itself indicates) is “192.168.99.9”. So hit Enter to accept that IP.

The following then appeared on the screen:

       Input server IP (192.168.99.8 ) ==:

The prompt here is asking for the IP address of the TFTP server. I had already bound the TFTP server to my computer network adapter's IP address (explained above), and that became the IP address of the server. So hit Enter to accept that IP.

Next, the following appeared on the console screen:

       Input Linux Kernel filename (uImageESR-9752-ati) ==:

This is an easy one. The firmware (at least in this case) is “firmware.bin.” As it had already been placed in the defined root directory for the TFTP server, all the prompt is asking for here is the name of the firmware. So, I typed “firmware.bin” after the : prompt, and then hit Enter.

Voila! Success! After hitting the final Enter in the console window, things started to happen. The flash process took only about three minutes, but to ensure that I did not end the flash session too soon.

I used the sysupgrade version, but initramfs works too. http://downloads.openwrt.org/releases/18.06.1/targets/ramips/rt305x/openwrt-18.06.1-ramips-rt305x-esr-9753-squashfs-sysupgrade.bin

Once OpenWrt boots you can upload the sysupgrade through the web interface, if you used initramfs.

Engenius ESR 9753 Flash Layout
Layer0 Parallel NOR device 4096KiB
Layer1 mtd0 u-boot 192KiB mtd1 art 64KiB mtd3 firmware 3776KiB
Layer2 mtd4 kernel 1026KiB mtd5 rootfs 2749KiB
mountpoint /
filesystem overlayfs
Layer3 mtd6 rootfs_data 576KiB
Size in KiB 192KiB 64Kib 1026KiB 2749KiB 576KiB
Name u-boot art kernel rootfs_data
mountpoint none none none /rom /overlay
filesystem none none none SquashFS JFFS2

There is no easy installation. Perhaps installing dd-wrt allows to upgrade to OpenWrt but I have not tried this.

The normal upgrading procedure works

generic.sysupgrade

generic.debrick
Same as installation. TFTP method by serial.

The most important thing is to get a linux script called “header.x86”, because EnGenius encrypts the two files that make up the firmware. It is necessary to decrypt the two files and make a small modification in the decrypted files to be able to use the TFTP method described in the ' Installation ' procedure (Above).
You can find header.x86 insyde this file in folder “Tools” https://www.engeniustech.com/resources/Firmware/EAP9550_GPL_Source.rar
Or… header.x86.rar

We download the official firmware, which contains the KNL.dlf and APPS.dlf files, we copy them into the “tools” folder that contains the “header.x86” script and execute the following commands from a linux terminal.
./header.x86 -s KNL.dlf -d uImage_KNL.bin -a
./header.x86 -s APPS.dlf -d uImage_APPS.bin -a
Now edit uImage_KNL.bin and uImage_APPS.bin with a hex editor, like HxD or similar, and trim the first 192 bytes in both files. Then join the two files into one with the hex editor copying uImage_APPS.bin at the end of the uImage_KNL.bin file and saving it as uImage_FW.bin. Now use the TFTP procedure described in installation.
After restarting, a special web interface appears, update the firmware from there. This time use the encrypted “.dlf” files provided by the manufacturer. First the KNL, and then the APPS.
If you are curious, EnGenius updates the firmware in two steps so that it does not fail, since the router is low on memory. First copy KNL to the kernel partition and then copy APPS to the rootfs partition, finally copy KNL + APPS to the firmware partition.

Brief procedure:
1) Download firmware for your router, decrypt it, and trim it
2) Give your PC an IP address of 192.168.99.8
3) Solder the pins in PCB and use Putty (USB to serial cable interface)
4) Use any TFTP server and connect PC Ethernet to LAN port on router
5) Power up your router and press 2 in Putty Terminal, ONLY one stroke, and repeat it untill you get it
6) Follow prompts in Putty terminal
7) File to flash is ' uImage_FW.bin ' which should be in the TFTP server Root Directory. Windows Firewall must be OFF
8] After flash is complete set your PC back to DHCP to obtain IP Address automatically
9) Using a web browser connect to 192.168.0.1
11) You should see a Bluebox with LOGIN, just press enter or admin/admin
12) Browse for your KNL file and upgrade it and if all goes well, browse for your APPS file and upgrade it too
13) Do a ' Hard Reset ' on your router, holding the reset button down until the Power LED starts to flash
14) Your PC should get a new IP address in the range of 192.168.0.xx
15) Use a web browser to connect to 192.168.0.1
16) admin/admin to login
17) Don't forget to turn Windows Firewall ON

Basic configuration After flashing, proceed with this.
Set up your Internet connection, configure wireless, configure USB port, etc.

hardware.button on howto use and configure the hardware button(s). Here, we merely name the buttons, so we can use them in the above Howto.

The EnGenius ESR9753 has the following buttons:

BUTTON Event
Reset reset
WPS wps
General
Brand EnGenius
Model ESR-9753
Versions
Device Type WiFi Router
Availability Discontinued
Comments - general Image build disabled in master with commit d7d46da938e3
OpenWrt Support
Supported Since Commit https://git.lede-project.org/?p=source.git;a=commit;h=557cf076b4a8a5305f3dce3c8ad56c6f5584e04f
Supported Since Release
Supported Current Release 17.01.7
Unsupported
Hardware
Bootloader U-Boot
Target ramips
System-On-Chip
CPU MHz 384
Flash MB 4
RAM MB 32
Network
Ethernet 100M ports 5
Ethernet Gbit ports -
Switch ¿
Modem -
VLAN Yes
Comments - network ports
Wireless
WLAN 2.4GHz b/g/n
WLAN 5.0GHz -
WLAN Hardware
Detachable Antennas -
Comments - WLAN
Interfaces
USB ports -
SATA ports -
Serial Yes
JTAG Yes
Comments - USB & SATA ports
Misc
LED count ¿
Button count ¿
Power supply
Links
Forum Topic URL
WikiDevi URL https://wikidevi.wi-cat.ru/EnGenius_ESR-9753
OEM device homepage URL http://www.engeniusnetworks.com/product/product.php?c=14&s=35&p=42
Firmware OEM Stock URL
Firmware OpenWrt Install URL http://downloads.openwrt.org/releases/17.01.7/targets/ramips/rt305x/lede-17.01.7-ramips-rt305x-esr-9753-initramfs-kernel.bin
Firmware OpenWrt Upgrade URL http://downloads.openwrt.org/releases/17.01.7/targets/ramips/rt305x/lede-17.01.7-ramips-rt305x-esr-9753-squashfs-sysupgrade.bin
Edit the underlying data View/Edit data

port.serial general information about the serial port, serial port cable, etc.

Serial connection parameters 57600, 8N1

[ 0.000000] Linux version 3.18.20 (buildbot@builder1) (gcc version 4.8.3 (OpenWrt/Linaro GCC 4.8-2014.04 r46450) ) #1 Fri Sep 4 19:34:21 CEST 2015 [ 0.000000] SoC Type: Ralink RT3052 id:1 rev:2 [ 0.000000] bootconsole [early0] enabled [ 0.000000] CPU0 revision is: 0001964c (MIPS 24KEc) [ 0.000000] MIPS: machine is Senao / EnGenius ESR-9753 [ 0.000000] Determined physical RAM map: [ 0.000000] memory: 02000000 @ 00000000 (usable) [ 0.000000] Initrd not found or empty - disabling initrd [ 0.000000] Zone ranges: [ 0.000000] Normal [mem 0x00000000-0x01ffffff] [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x00000000-0x01ffffff] [ 0.000000] Initmem setup node 0 [mem 0x00000000-0x01ffffff] [ 0.000000] On node 0 totalpages: 8192 [ 0.000000] free_area_init_node: node 0, pgdat 802d22b0, node_mem_map 81000000 [ 0.000000] Normal zone: 64 pages used for memmap [ 0.000000] Normal zone: 0 pages reserved [ 0.000000] Normal zone: 8192 pages, LIFO batch:0 [ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. [ 0.000000] Primary data cache 16kB, 4-way, VIPT, no aliases, linesize 32 bytes [ 0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768 [ 0.000000] pcpu-alloc: [0] 0 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 8128 [ 0.000000] Kernel command line: console=ttyS0,57600 rootfstype=squashfs,jffs2 [ 0.000000] PID hash table entries: 128 (order: -3, 512 bytes) [ 0.000000] Dentry cache hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Inode-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.000000] Writing ErrCtl register=0000142f [ 0.000000] Readback ErrCtl register=0000142f [ 0.000000] Memory: 29080K/32768K available (2543K kernel code, 120K rwdata, 312K rodata, 152K init, 186K bss, 3688K reserved) [ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 [ 0.000000] NR_IRQS:256 [ 0.000000] CPU Clock: 384MHz [ 0.000000] clocksource_of_init: no matching clocksources found [ 0.070000] Calibrating delay loop... 255.59 BogoMIPS (lpj=1277952) [ 0.070000] pid_max: default: 32768 minimum: 301 [ 0.080000] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes) [ 0.090000] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes) [ 0.100000] pinctrl core: initialized pinctrl subsystem [ 0.110000] NET: Registered protocol family 16 [ 0.120000] rt2880-pinmux pinctrl: try to register 52 pins ... [ 0.120000] pinctrl core: registered pin 0 (io0) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 1 (io1) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 2 (io2) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 3 (io3) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 4 (io4) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 5 (io5) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 6 (io6) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 7 (io7) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 8 (io8) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 9 (io9) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 10 (io10) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 11 (io11) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 12 (io12) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 13 (io13) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 14 (io14) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 15 (io15) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 16 (io16) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 17 (io17) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 18 (io18) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 19 (io19) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 20 (io20) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 21 (io21) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 22 (io22) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 23 (io23) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 24 (io24) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 25 (io25) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 26 (io26) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 27 (io27) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 28 (io28) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 29 (io29) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 30 (io30) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 31 (io31) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 32 (io32) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 33 (io33) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 34 (io34) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 35 (io35) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 36 (io36) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 37 (io37) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 38 (io38) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 39 (io39) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 40 (io40) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 41 (io41) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 42 (io42) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 43 (io43) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 44 (io44) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 45 (io45) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 46 (io46) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 47 (io47) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 48 (io48) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 49 (io49) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 50 (io50) on rt2880-pinmux [ 0.120000] pinctrl core: registered pin 51 (io51) on rt2880-pinmux [ 0.120000] pinctrl core: add 7 pinmux maps [ 0.120000] rt2880-pinmux pinctrl: found group selector 7 for sdram [ 0.120000] rt2880-pinmux pinctrl: found group selector 1 for spi [ 0.120000] rt2880-pinmux pinctrl: found group selector 0 for i2c [ 0.120000] rt2880-pinmux pinctrl: found group selector 4 for jtag [ 0.120000] rt2880-pinmux pinctrl: found group selector 6 for rgmii [ 0.120000] rt2880-pinmux pinctrl: found group selector 5 for mdio [ 0.120000] rt2880-pinmux pinctrl: found group selector 2 for uartf [ 0.120000] rt2880-pinmux pinctrl: request pin 24 (io24) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 25 (io25) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 26 (io26) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 27 (io27) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 28 (io28) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 29 (io29) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 30 (io30) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 31 (io31) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 32 (io32) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 33 (io33) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 34 (io34) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 35 (io35) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 36 (io36) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 37 (io37) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 38 (io38) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 39 (io39) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 3 (io3) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 4 (io4) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 5 (io5) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 6 (io6) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 1 (io1) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 2 (io2) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 17 (io17) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 18 (io18) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 19 (io19) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 20 (io20) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 21 (io21) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 40 (io40) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 41 (io41) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 42 (io42) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 43 (io43) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 44 (io44) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 45 (io45) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 46 (io46) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 47 (io47) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 48 (io48) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 49 (io49) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 50 (io50) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 51 (io51) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 22 (io22) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 23 (io23) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 7 (io7) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 8 (io8) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 9 (io9) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 10 (io10) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 11 (io11) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 12 (io12) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 13 (io13) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: request pin 14 (io14) for pinctrl [ 0.120000] rt2880-pinmux pinctrl: failed to lookup the sleep state [ 0.130000] rt2880_gpio 10000600.gpio: registering 24 gpios [ 0.140000] rt2880_gpio 10000600.gpio: registering 24 irq handlers [ 0.150000] Switched to clocksource MIPS [ 0.160000] NET: Registered protocol family 2 [ 0.170000] TCP established hash table entries: 1024 (order: 0, 4096 bytes) [ 0.180000] TCP bind hash table entries: 1024 (order: 0, 4096 bytes) [ 0.190000] TCP: Hash tables configured (established 1024 bind 1024) [ 0.210000] TCP: reno registered [ 0.210000] UDP hash table entries: 256 (order: 0, 4096 bytes) [ 0.220000] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes) [ 0.240000] NET: Registered protocol family 1 [ 0.250000] rt-timer 10000100.timer: maximum frequency is 7812Hz [ 0.260000] alarmtimer alarmtimer: no of_node; not parsing pinctrl DT [ 0.260000] futex hash table entries: 256 (order: -1, 3072 bytes) [ 0.300000] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.310000] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc. [ 0.370000] msgmni has been set to 56 [ 0.380000] io scheduler noop registered [ 0.380000] io scheduler deadline registered (default) [ 0.390000] Serial: 8250/16550 driver, 16 ports, IRQ sharing enabled [ 0.410000] serial8250 serial8250: no of_node; not parsing pinctrl DT [ 0.410000] pinctrl core: add 1 pinmux maps [ 0.410000] rt2880-pinmux pinctrl: found group selector 3 for uartlite [ 0.410000] rt2880-pinmux pinctrl: request pin 15 (io15) for 10000c00.uartlite [ 0.410000] rt2880-pinmux pinctrl: request pin 16 (io16) for 10000c00.uartlite [ 0.410000] console [ttyS0] disabled [ 0.420000] 10000c00.uartlite: ttyS0 at MMIO 0x10000c00 (irq = 20, base_baud = 8000000) is a 16550A [ 0.440000] console [ttyS0] enabled [ 0.450000] bootconsole [early0] disabled [ 0.470000] 1f000000.cfi: Found 1 x16 devices at 0x0 in 16-bit bank. Manufacturer ID 0x0000c2 Chip ID 0x0022a7 [ 0.490000] 1f000000.cfi: Found an alias at 0x400000 for the chip at 0x0 [ 0.490000] Amd/Fujitsu Extended Query Table at 0x0040 [ 0.500000] Amd/Fujitsu Extended Query version 1.1. [ 0.510000] 1f000000.cfi: Swapping erase regions for top-boot CFI table. [ 0.530000] number of CFI chips: 1 [ 0.550000] 4 ofpart partitions found on MTD device 1f000000.cfi [ 0.560000] Creating 4 MTD partitions on "1f000000.cfi": [ 0.570000] 0x000000000000-0x000000030000 : "u-boot" [ 0.580000] 0x000000030000-0x000000040000 : "u-boot-env" [ 0.590000] 0x000000040000-0x000000050000 : "factory" [ 0.610000] 0x000000050000-0x000000400000 : "firmware" [ 0.620000] 2 uimage-fw partitions found on MTD device firmware [ 0.630000] 0x000000050000-0x0000001508bf : "kernel" [ 0.640000] 0x0000001508bf-0x000000400000 : "rootfs" [ 0.650000] mtd: device 5 (rootfs) set to be root filesystem [ 0.670000] 1 squashfs-split partitions found on MTD device rootfs [ 0.680000] 0x000000370000-0x000000400000 : "rootfs_data" [ 0.700000] ralink_soc_eth 10100000.ethernet eth0: ralink at 0xb0100000, irq 5 [ 0.710000] rt2880_wdt 10000120.watchdog: Initialized [ 0.720000] TCP: cubic registered [ 0.730000] NET: Registered protocol family 17 [ 0.740000] bridge: automatic filtering via arp/ip/ip6tables has been deprecated. Update your scripts to load br_netfilter if you need this. [ 0.770000] Bridge firewalling registered [ 0.770000] 8021q: 802.1Q VLAN Support v1.8 [ 0.810000] VFS: Mounted root (squashfs filesystem) readonly on device 31:5. [ 0.820000] Freeing unused kernel memory: 152K (802ea000 - 80310000) [ 0.930000] rt305x-esw 10110000.esw: link changed 0x04 [ 2.010000] init: Console is alive [ 2.020000] init: - watchdog - [ 3.390000] usbcore: registered new interface driver usbfs [ 3.400000] usbcore: registered new interface driver hub [ 3.410000] usbcore: registered new device driver usb [ 3.430000] rt2880-pinmux pinctrl: request pin 10 (io10) for pio:10 [ 3.430000] rt2880-pinmux pinctrl: request pin 0 (io0) for pio:0 [ 3.430000] rt2880-pinmux pinctrl: request pin 8 (io8) for pio:8 [ 3.430000] rt2880-pinmux pinctrl: request pin 14 (io14) for pio:14 [ 4.030000] init: - preinit - [ 4.990000] 8021q: adding VLAN 0 to HW filter on device eth0 [ 5.150000] random: procd urandom read with 7 bits of entropy available [ 8.580000] jffs2: notice: (291) jffs2_build_xattr_subsystem: complete building xattr subsystem, 0 of xdatum (0 unchecked, 0 orphan) and 0 of xref (0 dead, 0 orphan) found. [ 8.610000] mount_root: switching to jffs2 overlay [ 8.660000] procd: - early - [ 8.670000] procd: - watchdog - [ 9.580000] procd: - ubus - [ 10.590000] procd: - init - [ 11.790000] NET: Registered protocol family 10 [ 11.810000] ip6_tables: (C) 2000-2006 Netfilter Core Team [ 11.850000] Loading modules backported from Linux version master-2015-03-09-0-g141f155 [ 11.860000] Backport generated by backports.git backports-20150129-0-gdd4a670 [ 11.880000] ip_tables: (C) 2000-2006 Netfilter Core Team [ 11.910000] nf_conntrack version 0.5.0 (456 buckets, 1824 max) [ 11.980000] xt_time: kernel timezone is -0000 [ 12.030000] cfg80211: Calling CRDA to update world regulatory domain [ 12.060000] cfg80211: World regulatory domain updated: [ 12.070000] cfg80211: DFS Master region: unset [ 12.080000] cfg80211: (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp), (dfs_cac_time) [ 12.090000] cfg80211: (2402000 KHz - 2472000 KHz @ 40000 KHz), (N/A, 2000 mBm), (N/A) [ 12.110000] cfg80211: (2457000 KHz - 2482000 KHz @ 40000 KHz), (N/A, 2000 mBm), (N/A) [ 12.130000] cfg80211: (2474000 KHz - 2494000 KHz @ 20000 KHz), (N/A, 2000 mBm), (N/A) [ 12.140000] cfg80211: (5170000 KHz - 5250000 KHz @ 80000 KHz), (N/A, 2000 mBm), (N/A) [ 12.160000] cfg80211: (5250000 KHz - 5330000 KHz @ 80000 KHz, 160000 KHz AUTO), (N/A, 2000 mBm), (0 s) [ 12.180000] cfg80211: (5490000 KHz - 5730000 KHz @ 160000 KHz), (N/A, 2000 mBm), (0 s) [ 12.190000] cfg80211: (5735000 KHz - 5835000 KHz @ 80000 KHz), (N/A, 2000 mBm), (N/A) [ 12.210000] cfg80211: (57240000 KHz - 63720000 KHz @ 2160000 KHz), (N/A, 0 mBm), (N/A) [ 12.320000] PPP generic driver version 2.4.2 [ 12.340000] NET: Registered protocol family 24 [ 12.390000] ieee80211 phy0: rt2x00_set_rt: Info - RT chipset 2872, rev 0200 detected [ 12.400000] ieee80211 phy0: rt2x00_set_rf: Info - RF chipset 0008 detected [ 12.420000] ieee80211 phy0: Selected rate control algorithm 'minstrel_ht' [ 22.450000] 8021q: adding VLAN 0 to HW filter on device eth0 [ 22.490000] device eth0.1 entered promiscuous mode [ 22.500000] device eth0 entered promiscuous mode


This website uses cookies. By using the website, you agree with storing cookies on your computer. Also you acknowledge that you have read and understand our Privacy Policy. If you do not agree leave the website.More information about cookies
  • Last modified: 2021/01/31 22:53
  • by willy