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toh:edimax:edimax_gemini_rg21s

Edimax Gemini RG21S

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The Edimax Gemini RG21 is an AC2600 router with a maximum WiFi speed up to 800Mbps (2.4GHz) and 1733Mbps (5GHz) and 4 Gbit LAN and 1 Gbit WAN port. It features MU-MIMO support with 4 external detachable antennas and 4 internal antennas.

Edimax Gemini RG21S

Supported Versions

Hardware Highlights

Installation

Install OpenWrt (generic explanation)

You can simply install OpenWrt via the router's original web interface. For this download the factory image of OpenWrt. If you have not yet set up the router, complete this setup (the router's web-interface can be reached under http://192.168.1.1 by default. Now go to the router's firmware update page and update the factory image via the OEM web-interface. The router reboots into OpenWrt automatically. Directly connect your workstation with the router via an Ethernet cable, configure your workstation to e.g. 192.168.1.2 and you can ssh into the router at http://192.168.1.1. Note that the snaptshot images do not come with the LuCI web-interface installed.

If you have added a serial connector to the router, you can also install the sysupgrade image via the U-Boot bootloader's built-in TFTP server. During boot press “2” and follow the instructions. You must connect to the router via the Ethernet port marked 2.

Flash Layout

Edimax Gemini RG21S Flash Layout
Layer0 raw NOR flash memory chip (MX25L128 spi0.0: MX25L128) 16384 KiB
Layer1 mtd0 u-boot 192 KiB mtd1 u-boot-env 64 KiB mtd2 factory 64 KiB mtd3 firmware 16064 KiB
Layer2 mtd4 kernel 1856 KiB mtd5 rootfs 14208 KiB
mountpoint /
filesystem OverlayFS
Layer3 mtd6 rootfs_data 8960 KiB
Size in KiB 192 KiB 64 KiB 64 KiB 1856 KiB 7104 KiB 8960 KiB
Name u-boot u-boot-env factory kernel rootfs_data
mountpoint none none none none /rom /overlay
filesystem none none none none SquashFS JFFS2

OEM easy installation

FIXME The instructions below are for Broadcom devices and only serve as an example.
Remove / modify them if they do not apply to this particular device!

This section deals with

  • How you install OpenWrt from a device freshly opened
  • The steps required such as reset to factory defaults if the device has already been configured

Note: Reset router to factory defaults if it has been previously configured.

  • Browse to http://192.168.1.1/Upgrade.asp
  • Upload .bin file to router
  • Wait for it to reboot
  • Telnet to 192.168.1.1 and set a root password, or browse to http://192.168.1.1 if LuCI is installed.

OEM installation using the TFTP method

generic.flashing.tftp

The following shows how to use the serial console to upload a firmware image:

U-Boot 1.1.3 (Jan  4 2016 - 17:08:01)

Board: Ralink APSoC DRAM:  256 MB
relocate_code Pointer at: 8ffb8000

Config XHCI 40M PLL 
******************************
Software System Reset Occurred
******************************
flash manufacture id: c2, device id 20 18
find flash: MX25L12805D
============================================ 
Ralink UBoot Version: 4.0.1.0
ELX UBoot Version: 1.0.0
-------------------------------------------- 
ASIC 7621_MP (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection 
DRAM_TYPE: DDR3 
DRAM bus: 16 bit
Xtal Mode=3 OCP Ratio=1/4
Flash component: SPI Flash
Date:Jan  4 2016  Time:17:08:01
============================================ 
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:256, ways:4, linesz:32 ,total:32768 

 ##### The CPU freq = 880 MHZ #### 
 estimate memory size =256 Mbytes
#Reset_MT7530

Please choose the operation: 
   1: Load system code to SDRAM via TFTP. 
   2: Load system code then write to Flash via TFTP. 
   3: Boot system code via Flash (default).
   4: Entr boot command line interface.
   9: Load Boot Loader code then write to Flash via TFTP. 

You choosed 2

 0 

   
2: System Load Linux Kernel then write to Flash via TFTP. 
 Warning!! Erase Linux in Flash then burn new one. Are you sure?(Y/N)
 Please Input new ones /or Ctrl-C to discard
        Input device IP (192.168.99.9) ==:192.168.99.9
        Input server IP (192.168.99.8) ==:192.168.99.8
        Input Linux Kernel filename (openwrt-ramips-mt7621-edimax_rg21s-squashfs-sysupgrade.bin) ==:openwrt-ramips-mt7621-edimax_rg21s-squashfs-sysupgrade.bin
        

During boot U-Boot stops for about 2 seconds to allow you to upload firmware or configure the environment. Press “2” at this point to upload a sysupgrade image. The router must be connected with the port marked “2” to the Ethernet as this is the only port activated by U-Boot. To flash the image, simply follow the instructions.

Upgrading OpenWrt

generic.sysupgrade

LuCI Web Upgrade Process

  • Browse to http://192.168.1.1/cgi-bin/luci/mini/system/upgrade/ LuCI Upgrade URL
  • Upload image file for sysupgrade to LuCI
  • Wait for reboot

Terminal Upgrade Process

If you don't have a GUI (LuCI) available, you can alternatively upgrade via the command line. There are two command line methods for upgrading:

  • sysupgrade
  • mtd

Note: It is important that you put the firmware image into the ramdisk (/tmp) before you start flashing.

sysupgrade

  • Login as root via SSH on 192.168.1.1, then enter the following commands:
cd /tmp
wget https://downloads.openwrt.org/snapshots/targets/ramips/mt7621/openwrt-ramips-mt7621-edimax_rg21s-squashfs-sysupgrade.bin
sysupgrade openwrt-ramips-mt7621-edimax_rg21s-squashfs-sysupgrade.bin

mtd

If sysupgrade does not support this router, use mtd.

  • Login as root via SSH on 192.168.1.1, then enter the following commands:
cd /tmp
wget https://downloads.openwrt.org/snapshots/targets/ramips/mt7621/openwrt-ramips-mt7621-edimax_rg21s-squashfs-sysupgrade.bin
mtd write /tmp/openwrt-ramips-mt7621-edimax_rg21s-squashfs-sysupgrade.bin firmware && reboot

Debricking

Failsafe mode

Basic configuration

Basic configuration After flashing, proceed with this.
Set up your Internet connection, configure wireless, configure USB port, etc.

Specific Configuration

Network interfaces

The default network configuration is:

Interface Name Description Default configuration
br-lan LAN & WiFi 192.168.1.1/24
vlan1 (eth0.1) LAN ports (1 to 4) None
vlan2 (eth0.2) WAN port DHCP
wlan0 WiFi (2.4GHz) Disabled
wlan1 WiFi (5GHz) Disabled

Switch Ports (for VLANs)

Numbers 1-4 are Ports 1-4 as labeled on the unit, number 0 is the Internet (WAN) on the unit, 6 is the internal connection to the router itself. vlan0 = eth0.0, vlan1 = eth0.1 and so on.

Port Switch port
Internet (WAN) 0
LAN 1 1
LAN 2 2
LAN 3 3
LAN 4 4

Buttons

hardware.button on howto use and configure the hardware button(s). Here, we merely name the buttons, so we can use them in the above Howto.

The Edimax Gemini RG21S has the following buttons:

BUTTON Event
Reset reset
WPS -

Hardware

Info

General
Brand Edimax
Model Gemini RG21S
Versions
Device Type WiFi Router
Availability Available 2019
Comments - general
OpenWrt Support
Supported Since Commit https://git.openwrt.org/?p=openwrt/openwrt.git;a=commit;h=f285e8634c57d28aa970b80c5c59e85485f35c7d
Supported Since Release
Supported Current Release snapshot
Unsupported
Hardware
Instruction set
Sub Instruction Set
Bootloader U-Boot
Target ramips
System-On-Chip
CPU MHz 880
Flash MB 16
RAM MB 256
Network
Ethernet 100M ports -
Ethernet Gbit ports 5
Switch Mediatek MT7530W SoC Integrated
Modem -
VLAN Yes
Comments - network ports
Wireless
WLAN 2.4GHz b/g/n
WLAN 5.0GHz a/n/ac
WLAN Hardware MediaTek MT7615N
Detachable Antennas 4
Comments - WLAN
Interfaces
USB ports -
SATA ports -
Serial Yes
JTAG No
Comments - USB & SATA ports
Misc
LED count 1
Button count 2
Power supply 12 VDC, 1.5 A
Links
Forum Topic URL
WikiDevi URL https://wikidevi.com/wiki/Edimax_Gemini_RG21S
OEM device homepage URL https://www.edimax.com/edimax/merchandise/merchandise_detail/data/edimax/global/wireless_routers_ac2600/rg21s/
Firmware OEM Stock URL https://www.edimax.com/edimax/download/download/data/edimax/global/download/for_home/wireless_routers/wireless_routers_ac2600/rg21s
Firmware OpenWrt Install URL
Firmware OpenWrt Upgrade URL
Edit the underlying data View/Edit data

Photos

Front:
Insert photo of front of the casing

Back:
Insert photo of back of the casing

Backside label:
Insert photo of backside label

Opening the case

Note: This will void your warranty!

To remove the cover and open the device please follow the following steps:

  • Unscrew the 4 external antennas
  • The device is shipped with 4 rubber feet which can be glued onto the device in case you do not want to wall-mount it. If you have attached the rubber feet already you will need to remove them in order to gain access to 4 screws.
  • Unscrew 4 screws located where the rubber feet can be attached.
  • Open the case with a prying tool. Start at the front where the red “mouth” of the router is and carefully pry the top lid off the unit.
  • To remove the PCB or turn it over you will need to remove the antenna connectors, which are secured with glue to the plugs on the board. For this scratch the glue off the connectors/plugs (leave the PCB alone as it might be damaged) with a thick needle or similar tool.
  • Disconnect the antenna connectors and you can lift the board out of the plastic bottom half of the router.

Main PCB:
Insert photo of PCB

Serial

port.serial general information about the serial port, serial port cable, etc.

How to connect to the Serial Port of this specific device:
Insert photo of PCB with markings for serial port

The serial port is marked J1 on the PCB. The sequence of pads is Vcc - RX - GND - TX, where Vcc is the square pad.

Serial connection parameters
for Edimax Gemini RG21S
57600, 8N1

JTAG

There does not appear to be a JTAG port on the device.

Bootlogs

OEM bootlog

=================================================================== MT7621 stage1 code Mar 12 2015 14:43:30 (ASIC) CPU=50000000 HZ BUS=12500000 HZ ================================================================== Change MPLL source from XTAL to CR... do MEMPLL setting.. MEMPLL Config : 0x11100000 3PLL mode + External loopback === XTAL-40Mhz === DDR-1200Mhz === PLL3 FB_DL: 0x4, 1/0 = 524/500 11000000 PLL4 FB_DL: 0x11, 1/0 = 684/340 45000000 PLL2 FB_DL: 0x18, 1/0 = 585/439 61000000 do DDR setting..[00320000] Apply DDR3 Setting...(use customer AC) 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120 -------------------------------------------------------------------------------- 0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000E:| 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 000F:| 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0010:| 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0011:| 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DRAMC_DQSCTL1[0e0]=14000000 DRAMC_DQSGCTL[124]=80000000 rank 0 coarse = 16 rank 0 fine = 40 B:| 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 opt_dle value:11 DRAMC_DDR2CTL[07c]=C287223D DRAMC_PADCTL4[0e4]=000022B3 DRAMC_DQIDLY1[210]=0908050A DRAMC_DQIDLY2[214]=05070708 DRAMC_DQIDLY3[218]=0D070706 DRAMC_DQIDLY4[21c]=0A070B09 DRAMC_R0DELDLY[018]=00001F1F ================================================================== RX DQS perbit delay software calibration ================================================================== 1.0-15 bit dq delay value ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 10 3 6 7 5 6 6 5 3 7 10 | 5 10 7 10 6 9 -------------------------------------- ================================================================== 2.dqs window x=pass dqs delay value (min~max)center y=0-7bit DQ of every group input delay:DQS0 =31 DQS1 = 31 ================================================================== bit DQS0 bit DQS1 0 (2~61)31 8 (1~55)28 1 (1~57)29 9 (1~62)31 2 (1~57)29 10 (1~58)29 3 (1~58)29 11 (1~56)28 4 (1~56)28 12 (1~58)29 5 (1~59)30 13 (1~59)30 6 (2~58)30 14 (1~59)30 7 (1~62)31 15 (2~59)30 ================================================================== 3.dq delay value last ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 10 5 8 9 8 7 7 5 6 7 10 | 7 13 9 11 7 10 ================================================================== ================================================================== TX perbyte calibration ================================================================== DQS loop = 15, cmp_err_1 = ffff0000 dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1 dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2 DQ loop=15, cmp_err_1 = ffff0082 dqs_perbyte_dly.last_dqdly_pass[1]=15, finish count=1 DQ loop=14, cmp_err_1 = ffff0000 dqs_perbyte_dly.last_dqdly_pass[0]=14, finish count=2 byte:0, (DQS,DQ)=(8,8) byte:1, (DQS,DQ)=(8,8) DRAMC_DQODLY1[200]=88888888 DRAMC_DQODLY2[204]=88888888 20,data:88 [EMI] DRAMC calibration passed =================================================================== MT7621 stage1 code done CPU=50000000 HZ BUS=12500000 HZ =================================================================== U-Boot 1.1.3 (Jan 4 2016 - 17:08:01) Board: Ralink APSoC DRAM: 256 MB relocate_code Pointer at: 8ffb8000 Config XHCI 40M PLL flash manufacture id: c2, device id 20 18 find flash: MX25L12805D ============================================ Ralink UBoot Version: 4.0.1.0 ELX UBoot Version: 1.0.0 -------------------------------------------- ASIC 7621_MP (MAC to MT7530 Mode) DRAM_CONF_FROM: Auto-Detection DRAM_TYPE: DDR3 DRAM bus: 16 bit Xtal Mode=3 OCP Ratio=1/4 Flash component: SPI Flash Date:Jan 4 2016 Time:17:08:01 ============================================ icache: sets:256, ways:4, linesz:32 ,total:32768 dcache: sets:256, ways:4, linesz:32 ,total:32768 ##### The CPU freq = 880 MHZ #### estimate memory size =256 Mbytes #Reset_MT7530 Please choose the operation: 1: Load system code to SDRAM via TFTP. 2: Load system code then write to Flash via TFTP. 3: Boot system code via Flash (default). 4: Entr boot command line interface. 9: Load Boot Loader code then write to Flash via TFTP. 0 3: System Boot system code via Flash. ## Booting image at bfc50000 ... Image Name: Linux Kernel Image Image Type: MIPS Linux Kernel Image (lzma compressed) Data Size: 1870446 Bytes = 1.8 MB Load Address: 80001000 Entry Point: 8030be50 Verifying Checksum ... OK Uncompressing Kernel Image ... OK No initrd ## Transferring control to Linux (at address 8030be50) ... ## Giving linux memsize in MB, 256 Starting kernel ... Linux version 3.2.9 (root@robert) (gcc version 4.6.4 (Buildroot 2013.05) ) #3 SMP Thu Mar 2 13:43:48 CST 2017 GCMP present bootconsole [early0] enabled CPU revision is: 0001992f (MIPS 1004Kc) Mediatek MT7621 ver:1 eco:3 running at 880.00 MHz Software DMA cache coherency Determined physical RAM map: memory: 10000000 @ 00000000 (usable) Initrd not found or empty - disabling initrd Zone PFN ranges: Normal 0x00000000 -> 0x00010000 Movable zone start PFN for each node early_node_map[1] active PFN ranges 0: 0x00000000 -> 0x00010000 Detected 3 available secondary CPU(s) PERCPU: Embedded 7 pages/cpu @81203000 s4800 r8192 d15680 u32768 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 65024 Kernel command line: console=ttyS0,57600 root=/dev/ram0 rootfstype=squashfs,jffs2 PID hash table entries: 1024 (order: 0, 4096 bytes) Dentry cache hash table entries: 32768 (order: 5, 131072 bytes) Inode-cache hash table entries: 16384 (order: 4, 65536 bytes) Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes MIPS secondary cache 256kB, 8-way, linesize 32 bytes. Writing ErrCtl register=00050438 Readback ErrCtl register=00050438 Memory: 253976k/262144k available (3160k kernel code, 8168k reserved, 706k data, 1800k init, 0k highmem) SLUB: Genslabs=9, HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 Hierarchical RCU implementation. NR_IRQS:128 gic: revision 3.0 CPU0: status register was 11000000 CPU0: status register now 11001800 CPU0: status register frc 1100dc00 console [ttyS0] enabled, bootconsole disabled console [ttyS0] enabled, bootconsole disabled Calibrating delay loop... 577.53 BogoMIPS (lpj=1155072) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 512 CPU revision is: 0001992f (MIPS 1004Kc) Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes MIPS secondary cache 256kB, 8-way, linesize 32 bytes. CPU revision is: 0001992f (MIPS 1004Kc) Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes MIPS secondary cache 256kB, 8-way, linesize 32 bytes. CPU revision is: 0001992f (MIPS 1004Kc) Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes MIPS secondary cache 256kB, 8-way, linesize 32 bytes. CPU revision is: 0001992f (MIPS 1004Kc) Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes MIPS secondary cache 256kB, 8-way, linesize 32 bytes. Brought up 4 CPUs Synchronize counters across 4 CPUs: done. NET: Registered protocol family 16 MIPS: machine is Ralink MT7621 before gpio setting:407ac after gpio setting:405ac release PCIe RST: RALINK_RSTCTRL = 3000000 PCIE PHY initialize ***** Xtal 40MHz ***** start MT7621 PCIe register access RALINK_RSTCTRL = 3000000 RALINK_CLKCFG1 = 77ffeff8 *************** MT7621 PCIe RC mode ************* pcie_link status = 0x3 RALINK_RSTCTRL= 3000000 *** Configure Device number setting of Virtual PCI-PCI bridge *** RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2 PCIE0 enabled PCIE1 enabled interrupt enable status: 300000 Port 1 N_FTS = 1b105000 Port 0 N_FTS = 1b105000 config reg done init_rt2880pci done bio: create slab <bio-0> at 0 SCSI subsystem initialized pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000) pci 0000:00:01.0: BAR 0: can't assign mem (size 0x80000000) pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff] pci 0000:00:01.0: BAR 8: assigned [mem 0x60100000-0x601fffff] pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff] pci 0000:00:00.0: BAR 1: set to [mem 0x60200000-0x6020ffff] (PCI address [0x60200000-0x6020ffff]) pci 0000:00:01.0: BAR 1: assigned [mem 0x60210000-0x6021ffff] pci 0000:00:01.0: BAR 1: set to [mem 0x60210000-0x6021ffff] (PCI address [0x60210000-0x6021ffff]) pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit] pci 0000:01:00.0: BAR 0: set to [mem 0x60000000-0x600fffff 64bit] (PCI address [0x60000000-0x600fffff]) pci 0000:00:00.0: PCI bridge to [bus 01-01] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff] pci 0000:02:00.0: BAR 0: assigned [mem 0x60100000-0x601fffff 64bit] pci 0000:02:00.0: BAR 0: set to [mem 0x60100000-0x601fffff 64bit] (PCI address [0x60100000-0x601fffff]) pci 0000:00:01.0: PCI bridge to [bus 02-02] pci 0000:00:01.0: bridge window [mem 0x60100000-0x601fffff] PCI: Enabling device 0000:00:00.0 (0004 -> 0006) PCI: Enabling device 0000:00:01.0 (0004 -> 0006) BAR0 at slot 0 = 0 bus=0x0, slot = 0x0 res[0]->start = 0 res[0]->end = 0 res[1]->start = 60200000 res[1]->end = 6020ffff res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 BAR0 at slot 1 = 0 bus=0x0, slot = 0x1 es[0]->start = 0 res[0]->end = 0 res[1]->start = 60210000 res[1]->end = 6021ffff res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 bus=0x1, slot = 0x0, irq=0x4 res[0]->start = 60000000 res[0]->end = 600fffff res[1]->start = 0 res[1]->end = 0 res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 bus=0x2, slot = 0x1, irq=0x18 res[0]->start = 60100000 res[0]->end = 601fffff res[1]->start = 0 res[1]->end = 0 res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 Switching to clocksource MIPS NET: Registered protocol family 2 IP route cache hash table entries: 2048 (order: 1, 8192 bytes) TCP established hash table entries: 8192 (order: 4, 65536 bytes) TCP bind hash table entries: 8192 (order: 4, 65536 bytes) TCP: Hash tables configured (established 8192 bind 8192) TCP reno registered UDP hash table entries: 128 (order: 0, 4096 bytes) UDP-Lite hash table entries: 128 (order: 0, 4096 bytes) NET: Registered protocol family 1 4 CPUs re-calibrate udelay(lpj = 1167360) Load Ralink Timer0 Module Load Ralink Timer1 Module Load Ralink Timer2 Module squashfs: version 4.0 (2009/01/31) Phillip Lougher JFFS2 version 2.2 (NAND) (SUMMARY) (ZLIB) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc. msgmni has been set to 496 io scheduler noop registered io scheduler deadline registered io scheduler cfq registered (default) Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled serial8250: ttyS0 at MMIO 0x1e000c00 (irq = 26) is a 16550A serial8250: ttyS1 at MMIO 0x1e000e00 (irq = 28) is a 16550A loop: module loaded flash manufacture id: c2, device id 20 18 MX25L12805D(c2 2018c220) (16384 Kbytes) mtd .name = raspi, .size = 0x01000000 (16M) .erasesize = 0x00010000 (64K) .numeraseregions = 0 Creating 10 MTD partitions on "raspi": 0x000000000000-0x000001000000 : "ALL" 0x000000000000-0x000000030000 : "Bootloader" 0x000000030000-0x000000040000 : "Config" 0x000000040000-0x000000050000 : "Factory" 0x000000050000-0x0000009f0000 : "Kernel" 0x000000220000-0x0000009f0000 : "user" 0x0000009f0000-0x000000bf0000 : "TM_1" 0x000000bf0000-0x000000df0000 : "TM_2" 0x000000df0000-0x000000f80000 : "manufacture" 0x000000f80000-0x000001000000 : "storage" rdm_major = 253 IMQ driver loaded successfully. (numdevs = 2, numqueues = 1) Hooking IMQ after NAT on PREROUTING. Hooking IMQ before NAT on POSTROUTING. tun: Universal TUN/TAP device driver, 1.6 tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com> GMAC1_MAC_ADRH -- : 0x0000000c GMAC1_MAC_ADRL -- : 0x432880fa Ralink APSoC Ethernet Driver Initilization. v3.1 512 rx/tx descriptors allocated, mtu = 1500! GMAC1_MAC_ADRH -- : 0x0000000c GMAC1_MAC_ADRL -- : 0x432880fe PROC INIT OK! PPP generic driver version 2.4.2 PPP BSD Compression module registered PPP Deflate Compression module registered PPP MPPE Compression module registered NET: Registered protocol family 24 Registered button device:reset, gpio:16,code:408,index:10 Registered button device:wps, gpio:18,code:529,index:12 GACT probability on Mirror/redirect action on Simple TC action Loaded netem: version 1.3 u32 classifier Performance counters on input device check on Actions configured Netfilter messages via NETLINK v0.30. nf_conntrack version 0.5.0 (1024 buckets, 8192 max) xt_time: kernel timezone is -0000 ip_tables: (C) 2000-2006 Netfilter Core Team TCP westwood registered NET: Registered protocol family 10 ip6_tables: (C) 2000-2006 Netfilter Core Team IPv6 over IPv4 tunneling driver NET: Registered protocol family 17 NET: Registered protocol family 2 L2TP core driver, V2.0 PPPoL2TP kernel driver, V2.0 8021q: 802.1Q VLAN Support v1.8 Freeing unused kernel memory: 1800k freed System Init version: 1.1 date: 1 Setting up file systems ... Setting up /mnt/tmpfs directory with tmpfs/16384KB Setting up FLASH storage partition ... JFFS2 notice: (339) jffs2_build_xattr_subsystem: complete building xattr subsystem, 0 of xdatum (0 unchecked, 0 orphan) and 0 of xref (0 dead, 0 orphan) found. Setting up /apps directory ...apps is in FLASH ... Setting up loopback device ... FINISHED Start Normal Operation Mode ... ************************************************************************ * ---ELX--- * ************************************************************************ KernelApp version: 0.0.13 build date: 2017/03/02 build time: 13:38:40 cmd> ln: /sbin/./start_all: File exists Share memory created: keyid 6888 shm_id 0 size 343(KB) Warning: dbox_destroy_share_memory p_dbox_cfg is NULL! __create_share_mem keyid 6888 shm_id 0 FFFFFFFF:FFFFFFFF:FFFFFFFF:FFFFFFFF:FFFFFFFF:FFFFFFFF Raeth v3.1 (Tasklet) phy_free_head is 0xed86000!!! phy_free_tail_phy is 0xed87ff0!!! txd_pool=aede8000 phy_txd_pool=0EDE8000 ei_local->skb_free start address is 0x8f05545c. free_txd: 0ede8010, ei_local->cpu_ptr: 0EDE8000 POOL HEAD_PTR | DMA_PTR | CPU_PTR ----------------+---------+-------- 0xaede8000 0x0EDE8000 0x0EDE8000 phy_qrx_ring = 0x0ed80000, qrx_ring = 0xaed80000 phy_rx_ring0 = 0x0edea000, rx_ring0 = 0xaedea000 GMAC1_MAC_ADRH -- : 0x0000000c GMAC1_MAC_ADRL -- : 0x432880fe GDMA2_MAC_ADRH -- : 0x000000aa GDMA2_MAC_ADRL -- : 0xbbccdd20 eth3: ===> VirtualIF_open CDMA_CSG_CFG = 81000000 GDMA1_FWD_CFG = 20710000 GDMA2_FWD_CFG = 20710000 ra2880stop()...Done eth3: ===> VirtualIF_close Free TX/RX Ring Memory! FFFFFFFF:FFFFFFFF:FFFFFFFF:FFFFFFFF:FFFFFFFF:FFFFFFFF Raeth v3.1 (Tasklet) phy_free_head is 0xee12000!!! phy_free_tail_phy is 0xee13ff0!!! txd_pool=aee14000 phy_txd_pool=0EE14000 ei_local->skb_free start address is 0x8f05545c. free_txd: 0ee14010, ei_local->cpu_ptr: 0EE14000 POOL HEAD_PTR | DMA_PTR | CPU_PTR ----------------+---------+-------- 0xaee14000 0x0EE14000 0x0EE14000 phy_qrx_ring = 0x0ecc9000, qrx_ring = 0xaecc9000 phy_rx_ring0 = 0x0ee16000, rx_ring0 = 0xaee16000 GMAC1_MAC_ADRH -- : 0x000074da GMAC1_MAC_ADRL -- : 0x38b94483 eth3: ===> VirtualIF_open CDMA_CSG_CFG = 81000000 GDMA1_FWD_CFG = 20710000 GDMA2_FWD_CFG = 20710000 GDMA2_MAC_ADRH -- : 0x000074da GDMA2_MAC_ADRL -- : 0x38b94485 eth3: ===> VirtualIF_open ADDRCONF(NETDEV_UP): br0: link is not ready device eth2 entered promiscuous mode br0: port 1(eth2) entering forwarding state br0: port 1(eth2) entering forwarding state ******************** Initialize Radio_(24G) setting ... rd[0]==1 OK Configuring Ralink WiFi device ...Wlan is in AP Mode CMD[insmod /lib/rlt_wifi.ko] ChipOpsMCUHook create [wsc_24g] proc! ChipOpsMCUHook create [wsc_5g] proc! [24G] CE EDCCA enable! CMD[ifconfig ra0 0.0.0.0 up] efuse_probe: efuse = 10000212 MT7615BBPInit():BBP Initialization..... Band 0: valid=1, isDBDC=0, Band=2, CBW=1, CentCh/PrimCh=1/1, prim_ch_idx=0, txStream=2 Band 1: valid=0, isDBDC=0, Band=0, CBW=0, CentCh/PrimCh=0/0, prim_ch_idx=0, txStream=0 RTMPSetLEDStatus: before AndesLedEnhanceOP , status=1, LED_CMD=2! AndesLedEnhanceOP: Success! CMD[iwpriv ra0 set RadioOn=0] RTMPSetLEDStatus: before AndesLedEnhanceOP , status=0, LED_CMD=0! AndesLedEnhanceOP: Success! CMD[brctl addif br0 ra0] device ra0 entered promiscuous mode br0: port 2(ra0) entering forwarding state br0: port 2(ra0) entering forwarding state CMD[mkdir -p /etc/wsc_xml] CMD[ln -s /apps/etc/xml/* /etc/wsc_xml] CMD[route add -net 239.0.0.0 netmask 255.0.0.0 br0] CMD[wscd -i ra0 -m 1 -w /etc/wsc_xml -a 192.168.2.1&] CMD[iwpriv ra0 set IgmpSnEnable=0] CMD[iwpriv ra0 set RadioOn=1] RTMPSetLEDStatus: before AndesLedEnhanceOP , status=1, LED_CMD=2! AndesLedEnhanceOP: Success! CMD[iwpriv ra0 set WscConfMode=7] CMD[iwpriv ra0 set WscSetupLock=1] CMD[iwpriv ra0 set WscMaxPinAttack=5] CMD[iwpriv ra0 set HtMIMOPS=3] ******************** Initialize Radio_(5G) setting ... rd[1]==4 OK Configuring 5G radio setting ... Configuring Ralink WiFi device ...Wlan is in AP Mode [5G] CE EDCCA enable! CMD[ifconfig rai0 0.0.0.0 up] efuse_probe: efuse = 10000212 br0: port 1(eth2) entering forwarding state MT7615BBPInit():BBP Initialization..... Band 0: valid=1, isDBDC=0, Band=2, CBW=1, CentCh/PrimCh=1/1, prim_ch_idx=0, txStream=2 Band 1: valid=0, isDBDC=0, Band=0, CBW=0, CentCh/PrimCh=0/0, prim_ch_idx=0, txStream=0 RTMPSetLEDStatus: before AndesLedEnhanceOP , status=1, LED_CMD=2! AndesLedEnhanceOP: Success! CMD[iwpriv rai0 set RadioOn=0] RTMPSetLEDStatus: before AndesLedEnhanceOP , status=0, LED_CMD=0! AndesLedEnhanceOP: Success! CMD[brctl addif br0 rai0] device rai0 entered promiscuous mode br0: port 3(rai0) entering forwarding state br0: port 3(rai0) entering forwarding state CMD[mkdir -p /etc/wsc_xml] CMD[ln -s /apps/etc/xml/* /etc/wsc_xml] ln: /etc/wsc_xml/WFAWLANConfigSCPD.xml: File exists CMD[route add -net 239.0.0.0 netmask 255.0.0.0 br0] route: SIOCADDRT: File exists CMD[wscd -i rai0 -m 1 -w /etc/wsc_xml -a 192.168.2.1&] CMD[iwpriv rai0 set IgmpSnEnable=0] CMD[iwpriv rai0 set RadioOn=1] RTMPSetLEDStatus: before AndesLedEnhanceOP , status=1, LED_CMD=2! AndesLedEnhanceOP: Success! CMD[iwpriv rai0 set WscConfMode=7] CMD[iwpriv rai0 set WscSetupLock=1] CMD[iwpriv rai0 set WscMaxPinAttack=5] CMD[iwpriv rai0 set HtMIMOPS=3] dsc: module license 'unspecified' taints kernel. Disabling lock debugging due to kernel taint sh: can't create /proc/rtk_switch: nonexistent direth3: ===> VirtualIF_close ectory GDMA2_MAC_ADRH -- : 0x000074da GDMA2_MAC_ADRL -- : 0x38b94485 eth3: ===> VirtualIF_open cp: can't stat '/etc/resolv.conf': No such file or directory cat: can't open '/tmp/resolv.conf': No such file or directory Start wps_led driver Set Static Routing ... CMD[sh /var/sd/route.sh] ------------ Static ROUTE Open OK ------------ ############ Opening UPNP ############ __create_share_mem keyid 6888 shm_id 0 __create_share_mem keyid 6888 shm_id 0 br0: port 2(ra0) entering forwarding state Err: read_to_buf failed to open file /proc/442/status! Err: read_to_buf failed to open file /proc/526/status! Err: read_to_buf failed to open file /proc/527/status! br0: port 3(rai0) entering forwarding state eth3: ===> VirtualIF_close eth3: ===> VirtualIF_open sh: can't create /proc/rtk_switch: nonexistent direth3: ===> VirtualIF_close ectory eth3: ===> VirtualIF_open cp: can't stat '/etc/resolv.conf': No such file or directory cat: can't open '/tmp/resolv.conf': No such file or directory


OpenWrt bootlog

[ 0.000000] Linux version 4.14.145 (birger@AMDDesktop) (gcc version 7.4.0 (OpenWrt GCC 7.4.0 r10561-ff7909f69e)) #0 SMP Fri Sep 20 13:51:49 2019 [ 0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3 [ 0.000000] bootconsole [early0] enabled [ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc) [ 0.000000] MIPS: machine is Edimax RG21S [ 0.000000] Determined physical RAM map: [ 0.000000] memory: 10000000 @ 00000000 (usable) [ 0.000000] Initrd not found or empty - disabling initrd [ 0.000000] VPE topology {2,2} total 4 [ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. [ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes [ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. [ 0.000000] Zone ranges: [ 0.000000] Normal [mem 0x0000000000000000-0x000000000fffffff] [ 0.000000] HighMem empty [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000000000000-0x000000000fffffff] [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x000000000fffffff] [ 0.000000] random: get_random_bytes called from start_kernel+0x9c/0x4d8 with crng_init=0 [ 0.000000] percpu: Embedded 14 pages/cpu s26064 r8192 d23088 u57344 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 64960 [ 0.000000] Kernel command line: console=ttyS0,57600 rootfstype=squashfs,jffs2 [ 0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes) [ 0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes) [ 0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes) [ 0.000000] Writing ErrCtl register=00054630 [ 0.000000] Readback ErrCtl register=00054630 [ 0.000000] Memory: 251696K/262144K available (4786K kernel code, 249K rwdata, 1036K rodata, 1276K init, 254K bss, 10448K reserved, 0K cma-reserved, 0K highmem) [ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 [ 0.000000] Hierarchical RCU implementation. [ 0.000000] NR_IRQS: 256 [ 0.000000] CPU Clock: 880MHz [ 0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns [ 0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4343773742 ns [ 0.000010] sched_clock: 32 bits at 440MHz, resolution 2ns, wraps every 4880645118ns [ 0.015503] Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688) [ 0.087833] pid_max: default: 32768 minimum: 301 [ 0.097202] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes) [ 0.110225] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes) [ 0.126409] Hierarchical SRCU implementation. [ 0.135982] smp: Bringing up secondary CPUs ... [ 0.147790] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. [ 0.147800] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes [ 0.147812] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. [ 0.147952] CPU1 revision is: 0001992f (MIPS 1004Kc) [ 0.205279] Synchronize counters for CPU 1: done. [ 0.272198] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. [ 0.272207] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes [ 0.272216] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. [ 0.272293] CPU2 revision is: 0001992f (MIPS 1004Kc) [ 0.326285] Synchronize counters for CPU 2: done. [ 0.388721] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. [ 0.388729] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes [ 0.388737] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. [ 0.388815] CPU3 revision is: 0001992f (MIPS 1004Kc) [ 0.445859] Synchronize counters for CPU 3: done. [ 0.505475] smp: Brought up 1 node, 4 CPUs [ 0.517731] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.537231] futex hash table entries: 1024 (order: 3, 32768 bytes) [ 0.549785] pinctrl core: initialized pinctrl subsystem [ 0.561539] NET: Registered protocol family 16 [ 0.581428] pull PCIe RST: RALINK_RSTCTRL = 0 [ 0.890528] release PCIe RST: RALINK_RSTCTRL = 7000000 [ 0.900596] ***** Xtal 40MHz ***** [ 0.907326] release PCIe RST: RALINK_RSTCTRL = 7000000 [ 0.917537] Port 0 N_FTS = 1b105000 [ 0.924431] Port 1 N_FTS = 1b105000 [ 0.931361] Port 2 N_FTS = 1b102800 [ 2.090327] PCIE2 no card, disable it(RST&CLK) [ 2.099018] -> 21007f2 [ 2.103841] PCIE0 enabled [ 2.109040] PCIE1 enabled [ 2.114219] PCI host bridge /pcie@1e140000 ranges: [ 2.123756] MEM 0x0000000060000000..0x000000006fffffff [ 2.134103] IO 0x000000001e160000..0x000000001e16ffff [ 2.144473] PCI coherence region base: 0xbfbf8000, mask/settings: 0x60000000 [ 2.168149] mt7621_gpio 1e000600.gpio: registering 32 gpios [ 2.179430] mt7621_gpio 1e000600.gpio: registering 32 gpios [ 2.190720] mt7621_gpio 1e000600.gpio: registering 32 gpios [ 2.203351] i2c-mt7621 1e000900.i2c: clock 100KHz, re-start not support [ 2.216998] PCI host bridge to bus 0000:00 [ 2.225012] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff] [ 2.238685] pci_bus 0000:00: root bus resource [io 0xffffffff] [ 2.250424] pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0] [ 2.263897] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff] [ 2.281879] pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000] [ 2.294954] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000] [ 2.308739] pci 0000:00:01.0: BAR 0: no space for [mem size 0x80000000] [ 2.321859] pci 0000:00:01.0: BAR 0: failed to assign [mem size 0x80000000] [ 2.335686] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff] [ 2.349172] pci 0000:00:01.0: BAR 8: assigned [mem 0x60100000-0x601fffff] [ 2.362643] pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff] [ 2.376126] pci 0000:00:01.0: BAR 1: assigned [mem 0x60210000-0x6021ffff] [ 2.389617] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit] [ 2.404124] pci 0000:00:00.0: PCI bridge to [bus 01] [ 2.413943] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff] [ 2.427458] pci 0000:02:00.0: BAR 0: assigned [mem 0x60100000-0x601fffff 64bit] [ 2.441975] pci 0000:00:01.0: PCI bridge to [bus 02] [ 2.451785] pci 0000:00:01.0: bridge window [mem 0x60100000-0x601fffff] [ 2.466740] clocksource: Switched to clocksource GIC [ 2.478194] NET: Registered protocol family 2 [ 2.487488] TCP established hash table entries: 2048 (order: 1, 8192 bytes) [ 2.501244] TCP bind hash table entries: 2048 (order: 2, 16384 bytes) [ 2.514032] TCP: Hash tables configured (established 2048 bind 2048) [ 2.526804] UDP hash table entries: 256 (order: 1, 8192 bytes) [ 2.538306] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes) [ 2.550990] NET: Registered protocol family 1 [ 2.796689] 4 CPUs re-calibrate udelay(lpj = 2924544) [ 2.808229] Crashlog allocated RAM at address 0x3f00000 [ 2.818756] workingset: timestamp_bits=14 max_order=16 bucket_order=2 [ 2.834870] random: fast init done [ 2.846142] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 2.857633] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc. [ 2.880517] io scheduler noop registered [ 2.888289] io scheduler deadline registered (default) [ 2.899292] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled [ 2.913167] console [ttyS0] disabled [ 2.920323] 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 19, base_baud = 3125000) is a 16550A [ 2.938223] console [ttyS0] enabled [ 2.938223] console [ttyS0] enabled [ 2.952008] bootconsole [early0] disabled [ 2.952008] bootconsole [early0] disabled [ 2.969846] MediaTek Nand driver init, version v2.1 Fix AHB virt2phys error [ 2.984331] spi-mt7621 1e000b00.spi: sys_freq: 220000000 [ 2.995920] m25p80 spi0.0: mx25l12805d (16384 Kbytes) [ 3.006086] 4 fixed-partitions partitions found on MTD device spi0.0 [ 3.018755] Creating 4 MTD partitions on "spi0.0": [ 3.028310] 0x000000000000-0x000000030000 : "u-boot" [ 3.039433] 0x000000030000-0x000000040000 : "u-boot-env" [ 3.051220] 0x000000040000-0x000000050000 : "factory" [ 3.062450] 0x000000050000-0x000001000000 : "firmware" [ 3.074141] 2 uimage-fw partitions found on MTD device firmware [ 3.085964] Creating 2 MTD partitions on "firmware": [ 3.095856] 0x000000000000-0x0000001e9b98 : "kernel" [ 3.106983] 0x0000001e9b98-0x000000fb0000 : "rootfs" [ 3.118004] mtd: device 5 (rootfs) set to be root filesystem [ 3.129440] 1 squashfs-split partitions found on MTD device rootfs [ 3.141772] 0x000000540000-0x000000fb0000 : "rootfs_data" [ 3.154432] libphy: Fixed MDIO Bus: probed [ 3.228534] mtk_soc_eth 1e100000.ethernet: generated random MAC address da:7f:5c:4e:d7:d3 [ 3.245007] libphy: mdio: probed [ 4.653464] mtk_soc_eth 1e100000.ethernet: loaded mt7530 driver [ 4.665946] mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 21 [ 4.684795] NET: Registered protocol family 10 [ 4.695330] Segment Routing with IPv6 [ 4.702812] NET: Registered protocol family 17 [ 4.711747] 8021q: 802.1Q VLAN Support v1.8 [ 4.722594] hctosys: unable to open rtc device (rtc0) [ 4.739046] VFS: Mounted root (squashfs filesystem) readonly on device 31:5. [ 4.757580] Freeing unused kernel memory: 1276K [ 4.766602] This architecture does not have kernel memory protection. [ 5.570659] init: Console is alive [ 5.577732] init: - watchdog - [ 6.244007] mtk_soc_eth 1e100000.ethernet eth0: port 4 link up [ 6.412471] kmodloader: loading kernel modules from /etc/modules-boot.d/* [ 6.530791] kmodloader: done loading kernel modules from /etc/modules-boot.d/* [ 6.557062] init: - preinit - [ 7.687287] mtk_soc_eth 1e100000.ethernet: PPE started Press the [f] key and hit [enter] to enter failsafe mode Press the [1], [2], [3] or [4] key and hit [enter] to [ 7.767102] random: procd: uninitialized urandom read (4 bytes read) select the debug level [ 10.972587] jffs2: notice: (444) jffs2_build_xattr_subsystem: complete building xattr subsystem, 5 of xdatum (2 unchecked, 3 orphan) and 13 of xref (3 dead, 0 orphan) found. [ 11.005562] mount_root: switching to jffs2 overlay [ 11.034576] overlayfs: upper fs does not support tmpfile. [ 11.052571] urandom-seed: Seeding with /etc/urandom.seed [ 11.150971] mtk_soc_eth 1e100000.ethernet: 0x100 = 0x6060000c, 0x10c = 0x80818 [ 11.173619] procd: - early - [ 11.179497] procd: - watchdog - [ 11.826888] procd: - watchdog - [ 11.833527] procd: - ubus - [ 11.955490] random: ubusd: uninitialized urandom read (4 bytes read) [ 11.970400] random: ubusd: uninitialized urandom read (4 bytes read) [ 11.983531] random: ubusd: uninitialized urandom read (4 bytes read) [ 11.997243] procd: - init - Please press Enter to activate this console. [ 12.565086] kmodloader: loading kernel modules from /etc/modules.d/* [ 12.621381] ip6_tables: (C) 2000-2006 Netfilter Core Team [ 12.627946] urngd: v1.0.0 started. [ 12.639292] Loading modules backported from Linux version v5.3-rc4-0-gd45331b00ddb [ 12.654412] Backport generated by backports.git v5.3-rc4-1-0-g4ec72687 [ 12.669346] ip_tables: (C) 2000-2006 Netfilter Core Team [ 12.686264] nf_conntrack version 0.5.0 (4096 buckets, 16384 max) [ 12.739142] xt_time: kernel timezone is -0000 [ 12.788152] random: crng init done [ 12.794961] random: 6 urandom warning(s) missed due to ratelimiting [ 12.812774] bus=0x1, slot = 0x0, irq=0x0 [ 12.828976] PPP generic driver version 2.4.2 [ 12.837426] mt7615e 0000:01:00.0: HW/SW Version: 0x8a108a10, Build Time: 20180518100604a [ 12.837426] [ 12.839294] NET: Registered protocol family 24 [ 12.868000] kmodloader: done loading kernel modules from /etc/modules.d/* [ 13.359497] mt7615e 0000:01:00.0: N9 Firmware Version: _reserved_, Build Time: 20190103180756 [ 13.425846] mt7615e 0000:01:00.0: CR4 Firmware Version: _reserved_, Build Time: 20181207140436 [ 19.576111] mtk_soc_eth 1e100000.ethernet: PPE started [ 19.592921] device eth0 entered promiscuous mode [ 19.603290] br-lan: port 1(eth0.1) entered blocking state [ 19.614188] br-lan: port 1(eth0.1) entered disabled state [ 19.625940] device eth0.1 entered promiscuous mode [ 19.639784] br-lan: port 1(eth0.1) entered blocking state [ 19.650660] br-lan: port 1(eth0.1) entered forwarding state [ 19.662288] IPv6: ADDRCONF(NETDEV_UP): br-lan: link is not ready [ 20.607553] IPv6: ADDRCONF(NETDEV_CHANGE): br-lan: link becomes ready [ 21.102660] bus=0x2, slot = 0x1, irq=0x0 [ 21.127233] mt7615e 0000:02:00.0: HW/SW Version: 0x8a108a10, Build Time: 20180518100604a [ 21.127233] [ 21.161617] mt7615e 0000:02:00.0: N9 Firmware Version: _reserved_, Build Time: 20190103180756 [ 21.188143] mt7615e 0000:02:00.0: CR4 Firmware Version: _reserved_, Build Time: 20181207140436


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toh/edimax/edimax_gemini_rg21s.txt · Last modified: 2019/10/26 07:34 by tmomas