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toh:comfast:cf-ew72_v2 [2023/09/27 06:21] – [OEM bootlog] filimonictoh:comfast:cf-ew72_v2 [2023/10/02 08:16] – [Supported Versions] filimonic
Line 5: Line 5:
  
  
 +//Dual-gigabit dual-band PoE-powered outdoor device with IP66<color #ed1c24>°</color> protection with up to 1200Mbps<color #ed1c24>°°</color> wireless bandwidth.//
 +
 +//Can be used as router, wireless repeater or wireless access point.//
 +
 +
 +<wrap lo><sub>//°: Even though it claims IP66 protection, it doesn't appear to be. Rain can leak into if positioned bottom-up, and raindrops may be blowed into with wind.//</sub></wrap>
 +
 +<wrap lo><sub>//°°: 1200Mbps is sum of total bandwidth 300 Mbps at 2.4 GHz + 867 Mbps at 5 GHz//</sub></wrap>
 ===== Supported Versions ===== ===== Supported Versions =====
 +
 +<WRAP center round alert 60%>
 +{{ :media:comfast:cf-ew72-v2_label.jpg?direct&200|}}
 +**COMFAST CF-EW72 without version is completely different device.**
 +
 +Please, look for **__Model__** at the label on your device. If it says **__CF-EW72 V2__**, you should proceed with this page.
 +If there is no **__V2__** you should proceed to [[toh:comfast:cf-ew72|COMFAST CF-EW72]]
 +</WRAP>
  
 ---- datatable ---- ---- datatable ----
Line 18: Line 34:
  
  
-===== Experimental Versions ===== 
- 
-/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *  
-   The official Table of Hardware only lists current, stable versions of OpenWrt.  * 
-   Use this space to describe any on-going efforts to create a newer version       * 
-   of the firmware for this device. Provide links to firmware images,              * 
-   active threads on the forum, or other sources of information.                   * 
- * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */ 
- 
-//None at this time.// 
  
 ===== Hardware Highlights ===== ===== Hardware Highlights =====
 ---- datatable ---- ---- datatable ----
-cols    : Model, Versions, CPU, CPU MHz, CPU Cores_numcores, Flash MB_mbflashs, RAM MB_mbram, WLAN Hardware, WLAN 2.4GHz, WLAN 5.0GHz, Ethernet 100M ports_, Ethernet Gbit ports_, Modem, USB ports_ +cols    : Model, Versions, CPU, CPU MHz, CPU Cores_numcores, Flash MB_mbflashs, RAM MB_mbram, WLAN Hardware, WLAN 2.4GHz, WLAN 5.0GHz, Ethernet 1Gbit ports_, Power Supply_ 
-header  : Model, Version,SoC,CPU MHz,CPU Cores,Flash MB,RAM MB,WLAN Hardware,WLAN2.4,WLAN5.0,100M ports,Gbit ports,Modem,USB+header  : Model, Version,SoC,CPU MHz,CPU Cores,Flash MB,RAM MB,WLAN Hardware,WLAN2.4,WLAN5.0,1Gbit ports,Power
 align   : c,c,c,c,c,c,c,c,c,c,c,c,c align   : c,c,c,c,c,c,c,c,c,c,c,c,c
 filter  : Brand=COMFAST filter  : Brand=COMFAST
Line 52: Line 58:
 ---- ----
 */ */
- 
  
 /* snapshot */ /* snapshot */
Line 94: Line 99:
 ==== OEM easy installation ==== ==== OEM easy installation ====
  
-<WRAP BOX> +  - → Unpack OEM firmware archive to get __.bin__ file
-FIXME //The instructions below are for Broadcom devices and only serve as an example.//\\ +  - → Flash it the same way you flash OpenWRT.
-**//Remove / modify them if they do not apply to this particular device!//** +
- +
-This section deals with +
-  * How you install OpenWrt from a device freshly opened +
-  * The steps required such as reset to factory defaults if the device has already been configured +
- +
-**Note:** Reset router to factory defaults if it has been previously configured. +
-  * Browse to ''<nowiki>http://192.168.1.1/Upgrade.asp</nowiki>'' +
-  * Upload .bin file to router +
-  * Wait for it to reboot +
-  * Telnet to 192.168.1.1 and set a root password, or browse to ''<nowiki>http://192.168.1.1</nowiki>'' if LuCI is installed. +
-</WRAP>+
  
 ==== OEM installation using the TFTP method ==== ==== OEM installation using the TFTP method ====
Line 178: Line 171:
  
 ==== Buttons ==== ==== Buttons ====
--> [[docs:guide-user:hardware:hardware.button]] on howto use and configure the hardware button(s). +The only button is **⚫reset** button.
-Here, we merely name the buttons, so we can use them in the above Howto.+
  
-<WRAP BOX> +==== LEDs ==== 
-FIXME Please fill in real values for this device, then remove the EXAMPLEs +Device has 8 blue leds onboard, but some of them are not visible as shell does not have holes for them. 
- +The only both visible and customizable led is Wi-Fi led.
-The COMFAST CF-EW72 has the following buttons: +
- +
-^ BUTTON                       ^ Event   ^ +
-| EXAMPLE Reset                |  reset  | +
-| EXAMPLE Secure Easy Setup    |   ses   | +
-| EXAMPLE No buttons at all  |    -    | +
- +
-</WRAP>+
  
 +^ Led #  ^ Indicator role   ^ GPIO  ^ Name in LuCI           ^ Note                                                    ^
 +|  1     | 🔵POWER          |   N\A | N\A                    | Always on when device is powered. Can not be controlled programmatically.                                   |
 +|  2     | 🔷Not visible    |  13   | **blue:hidden_led_2**  | This led has no hole in shell. Controllable with GPIO.                                                      |
 +|  3     | 🔵WAN            |   N\A | N\A                    | Indicates WAN activity. Can not be controlled programmatically.                                             |
 +|  4     | 🔷Not visible    |  16   | **blue:hidden_led_4**  | This led has no hole in shell. Controllable with GPIO.                                                      |
 +|  5     | 🔵LAN            |   N\A | N\A                    | Indicates LAN activity. Can not be controlled programmatically.                                             |
 +|  6     | ⬛Not visible    |   N\A | N\A                    | This led has no hole in shell. __Can not__ be controlled programmatically.                                  |
 +|  7     | 🔵WLAN            15   | **blue:wlan**          | Indicates Wi-Fi activity. Can be controlled programmatically. By default, not bound to any wireless adapter |
 +|  8     | ⬛Not visible    |   N\A | N\A                    | This led has no hole in shell. __Can not__ be controlled programmatically.                                  |
 ===== Hardware ===== ===== Hardware =====
 ==== Info ==== ==== Info ====
-<WRAP BOX> 
-FIXME 
-  - This table is automatically generated, **once the correct filters for Brand and Model are set.** 
-  - If you see "Nothing." instead of a table, please **edit this section and adjust the filters with the proper Brand and Model.** Just try, it's easy. 
-  - If you still don't see a table here, or a table filled with '¿': [[toh:start|Is there already a Techdata page available]] for COMFAST CF-EW72 V2? If not: [[meta:create_new_dataentry_page|Create one]]. 
-  - If you see a table with the desired device data, everything is OK and you can delete this text and the ''<nowiki><WRAP></nowiki>'' that encloses it. 
-  - If it still doesn't work: Don't panic, calm down, take a deep breath and [[:contact|contact a wiki admin]] (tmomas) for help. 
-</WRAP> 
  
 ---- datatemplatelist dttpllist ---- ---- datatemplatelist dttpllist ----
Line 211: Line 196:
 filter  : Versions=V2 filter  : Versions=V2
 ---- ----
 +
 +
 +==== Power ====
 +
 +Device is powered only through __PoE 802.3af__ ("active PoE") and bundled with 220v __PoE injector__. 
 +
 +:!: There is no information if device can be powered with "Passive PoE".
 +
 +:!: There is **no PoE Passthrough**: please note that device does not provide power to daisy-chained device.
 +
 +===== MT7621AT or MT7621DAT =====
 +
 +For end user, there is no difference.
 +
 +COMFAST CF-EW72 V2 is known to be produced in two variants (**not versions**):
 +  * COMFAST CF-EW72 V2 with MT7621AT and separate DDR RAM chip onboard.
 +  * COMFAST CF-EW72 V2 with MT7621DAT with integrated RAM and no DDR RAM soldered chip onboard.
 +PCBs for both variants seem to be same. Firmware works for both.
 +
 +COMFAST CF-EW72 V2 known to be sold both in unpainted cardboard box and colorful glossy cardboard box.
 +I guess, but not guarantee that colorful box is for new variant equipped with MT7621DAT SoC and no RAM chip.
 +Seems that devices also have different factory labels.
 +
 +/*** if info available: uncomment and fill in
 +==== Flash Layout ====
 +<WRAP BOX>
 +FIXME //[[:docs:techref:flash.layout#discovery_how_to_find_out|Find out flash layout]], then add the flash layout table here (copy, paste, modify the [[docs:techref:flash.layout#partitioning_of_squashfs-images|example]]).//
 +
 +Please check out the article [[docs:techref:flash.layout|Flash layout]]. It contains examples and explanations that describe how to document the flash layout.
 +</WRAP>
 +***/
 +
  
 ==== Photos ==== ==== Photos ====
Line 218: Line 235:
 /* Thanks, your wiki administration - Oct. 2015 */ /* Thanks, your wiki administration - Oct. 2015 */
  
-//Front://\\ +**Photo of casing**
-**Insert photo of front of the casing**+
  
-//Back://\\ +^ Front ^ Back ^ Opened Lid ^ 
-**Insert photo of back of the casing**+| {{:media:comfast:cf-ew72-v2_casing_front.jpg?direct&200}} | {{:media:comfast:cf-ew72-v2_casing_back.jpg?direct&200}} | {{:media:comfast:cf-ew72-v2_casing_no_lid.jpg?direct&200}} |
  
-//Backside label://\\ +**Photo of backside label** 
-**Insert photo of backside label**+^ Variant for MT7621AT                                      ^ Variant for MT7621<color #ed1c24>D</color>AT              ^ 
 +| {{ :media:comfast:cf-ew72-v2_label_v2.1.jpg?200&direct}}  | {{ :media:comfast:cf-ew72-v2_label_v2.2.jpg?200&direct}}  |
  
 +**Photo of PCB**
 +
 +Click to enlarge
 +
 +^ Side A ^ Side B ^
 +| {{:media:comfast:cf-ew72-v2_pcb-front.jpg?direct&200}} | {{:media:comfast:cf-ew72-v2_pcb-back.jpg?direct&135}} |
 +
 +**Photo of bundled PoE Injector**
 +
 +Click to enlarge
 +^ PoE Injector\\ Front ^ PoE Injector\\ Back ^ PoE Injector\\ Label ^
 +| {{:media:comfast:cf-ew72-v2_poe-injector_front.jpg?direct&200}} | {{:media:comfast:cf-ew72-v2_poe-injector_back.jpg?direct&200}} | {{:media:comfast:cf-ew72-v2_poe-injector_label.jpg?direct&200}} |
 ==== Opening the case ==== ==== Opening the case ====
  
-**Note:** This will void your warranty! 
  
-<WRAP BOX> +=== Tools needed === 
-FIXME //Describe what needs to be done to open the device, e.g. remove rubber feet, adhesive labels, screws, ...// + 
-  * To remove the cover and open the device, do a/b/c +  * Hot air gun (to gently remove factory sticker)  
-</WRAP>+  * Needle nose pilers 
 +  * PH0 screwdriver 
 +  * Сontainer for small items (zip bag) 
 + 
 +=== Opening the case in steps ===
  
-//Main PCB://\\ +^ Step ^ Text ^ Image ^ 
-**Insert photo of PCB**+| 1 | Open the case and disconnect cables. | Click image\\ to enlarge | 
 +| 2 | Use hot air to heat the factory label and peel it off.\\ If you wish, glue it to the back of the case, closer to the antennas. | {{:media:comfast:cf-ew72-v2_disassembly_10_remove_sticker.jpg?direct&100}} | 
 +| 3 | Remove 2 screws hidden under the factory label. | {{:media:comfast:cf-ew72-v2_disassembly_20_remove_screws.jpg?direct&100}} | 
 +| 4 | Unscrew antennas.\\ Remove big rubber rings.\\ Unscrew the nuts from the Wi-Fi antenna connectors using thin-nosed pliers.\\ Do not remove washer and o-ring hidden under washer yet. | {{:media:comfast:cf-ew72-v2_disassembly_30_remove_antennas_and_nuts.jpg?direct&100}} | 
 +| 5 | Grasp the sides of the device and gently push the antenna connectors into the device.\\ Be careful with the center pin of the connector.\\ After the antenna connectors are completely inside the device, pull on the plastic insert with RJ45 connectors. | {{:media:comfast:cf-ew72-v2_disassembly_40_push_pcb_out.jpg?direct&100}} | 
 +| 6 | Remove 2 washers and 4 o-rings in total.\\ There are 2 washers and 2 small o-rings on the outside of the case.\\ :!: There are two more small o-rings on Wi-Fi antenna connectors from the inside of the case.\\ They may be on antenna connectors or stick to casing from inside. Remove them.\\ | | 
 +| 7 | Put into a zip bag:\\ ☑️ 1 factory label (if removed)\\ ☑️ 2 screws\\ ☑️ 2 big rubber rings\\ ☑️ 2 nuts\\ ☑️ 2 washers\\ ☑️ 4 small o-rings | | 
 +| 8 | Put a zip bag inside an empty casing and close with a casing lid. | | 
 +| 9 | Screw antennas to Wi-Fi connectors on PCB. | |
  
 ==== Serial ==== ==== Serial ====
 +{{ :media:comfast:cf-ew72-v2_pcb-serial.jpg?200|}}
 -> [[docs:techref:hardware:port.serial]] general information about the serial port, serial port cable, etc. -> [[docs:techref:hardware:port.serial]] general information about the serial port, serial port cable, etc.
  
 How to connect to the Serial Port of this specific device:\\ How to connect to the Serial Port of this specific device:\\
-**Insert photo of PCB with markings for serial port** 
  
-<WRAP BOX> +  * [[#Opening the case|Remove the case]].\\ 
-FIXME //Replace EXAMPLE by real values.// +  * Device has factory-soldered 4 x 2.54mm pin header (VCC, GND, TX, RX).\\ 
-</WRAP>+  * GND pin is recommended to be connected. \\ 
 +  * :!: It is recommended NOT connect VCC pin as device powers from PoE.\\ 
 +  * :!: It is recommended to connect serial adapter through active (with separate power) USB hub. Avoid connecting to usb port connected to computer motherboard. CF-EW72 V2 has 48V on PCB, and if 48V will somehow hit your USB, it may damage your PC, including CPU. 
 +  * In some situations device may not start when RX pin is connected - so, connect it right after you see output from device. 
 +  * Connected RX also may cause random 5GHz Wi-Fi chip problems.
  
-^ Serial connection parameters\\ for COMFAST CF-EW72 V2 | EXAMPLE 115200, 8N1, 3.3V |+^ Serial connection parameters\\ for COMFAST CF-EW72 V2 | 115200, 8N1, 3.3V |
  
-==== JTAG ==== 
--> [[docs:techref:hardware:port.jtag]] general information about the JTAG port, JTAG cable, etc. 
  
-How to connect to the JTAG Port of this specific device:\\ 
-**Insert photo of PCB with markings for JTAG port** 
  
 ===== Bootloader mods ===== ===== Bootloader mods =====
Line 911: Line 951:
 ==== OpenWrt bootlog ==== ==== OpenWrt bootlog ====
 <WRAP bootlog> <WRAP bootlog>
-<nowiki>COPY HERE THE BOOTLOG ONCE OPENWRT IS INSTALLED AND RUNNING</nowiki>+<nowiki> 
 +Trying to boot from NOR 
 + 
 + 
 +U-Boot 2018.09-gbef8015-dirty (Dec 09 2020 - 06:28:07 -0500) 
 + 
 +CPU:   MediaTek MT7621AT ver 1, eco 3 
 +Clocks: CPU: 880MHz, DDR: 1200MHz, Bus: 220MHz, XTAL: 40MHz 
 +Model: MediaTek MT7621 reference board 
 +DRAM:  128 MiB 
 +Loading Environment from SPI Flash... SF: Detected w25q128bv with page size 256 Bytes, erase size 64 KiB, total 16 MiB 
 +*** Warning - bad CRC, using default environment 
 + 
 +In:    uartlite0@1e000c00 
 +Out:   uartlite0@1e000c00 
 +Err:   uartlite0@1e000c00 
 +Net: 
 +Warning: eth@1e100000 (eth0) using random MAC address - 5e:69:c8:f8:cf:5b 
 +eth0: eth@1e100000 
 +Hit any key to stop autoboot: 
 +Using eth@1e100000 device 
 +TFTP from server 192.168.1.10; our IP address is 192.168.1.1 
 +Filename 'firmware_auto.bin'
 +Load address: 0x80010000 
 +Loading: * 
 +ARP Retry count exceeded; starting again 
 + 
 +*** TFTP client failure: -110 *** 
 +*** Operation Aborted! *** 
 + 
 +  *** U-Boot Boot Menu *** 
 + 
 +     1. Startup system (Default) 
 +     2. Upgrade firmware 
 +     3. Upgrade bootloader 
 +     4. Upgrade bootloader (advanced mode) 
 +     5. Load image 
 +     0. U-Boot console 
 + 
 + 
 +  Press UP/DOWN to move, ENTER to select 
 +## Booting kernel from Legacy Image at bfc50000 ... 
 +   Image Name:   MIPS OpenWrt Linux-5.15.127 
 +   Image Type:   MIPS Linux Kernel Image (uncompressed) 
 +   Data Size:    2846981 Bytes = 2.7 MiB 
 +   Load Address: 80001000 
 +   Entry Point:  80001000 
 +   Verifying Checksum ... OK 
 +   Loading Kernel Image ... OK 
 + 
 + 
 +OpenWrt kernel loader for MIPS based SoC 
 +Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> 
 +Decompressing kernel... done! 
 +Starting kernel at 80001000... 
 + 
 +[    0.000000] Linux version 5.15.127 (adfilimonov@debian) (mipsel-openwrt-linux-musl-gcc (OpenWrt GCC 12.3.0 r23784-c2bc4c4950) 12.3.0, GNU ld (GNU Binutils) 2.40.0) #0 SMP Mon Aug 21 18:41:02 2023 
 +[    0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3 
 +[    0.000000] printk: bootconsole [early0] enabled 
 +[    0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc) 
 +[    0.000000] MIPS: machine is COMFAST CF-EW72 V2 
 +[    0.000000] Initrd not found or empty - disabling initrd 
 +[    0.000000] VPE topology {2,2} total 4 
 +[    0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. 
 +[    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes 
 +[    0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. 
 +[    0.000000] Zone ranges: 
 +[    0.000000]   Normal   [mem 0x0000000000000000-0x0000000007ffffff] 
 +[    0.000000] Movable zone start for each node 
 +[    0.000000] Early memory node ranges 
 +[    0.000000]   node   0: [mem 0x0000000000000000-0x0000000007ffffff] 
 +[    0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff] 
 +[    0.000000] percpu: Embedded 11 pages/cpu s14512 r8192 d22352 u45056 
 +[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 32480 
 +[    0.000000] Kernel command line: console=ttyS0,115200 rootfstype=squashfs,jffs2 
 +[    0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes, linear) 
 +[    0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes, linear) 
 +[    0.000000] Writing ErrCtl register=00052a60 
 +[    0.000000] Readback ErrCtl register=00052a60 
 +[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off 
 +[    0.000000] Memory: 119052K/131072K available (6982K kernel code, 626K rwdata, 1432K rodata, 1252K init, 217K bss, 12020K reserved, 0K cma-reserved) 
 +[    0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 
 +[    0.000000] rcu: Hierarchical RCU implementation. 
 +[    0.000000]  Tracing variant of Tasks RCU enabled. 
 +[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies. 
 +[    0.000000] NR_IRQS: 256 
 +[    0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns 
 +[    0.000004] sched_clock: 64 bits at 880MHz, resolution 1ns, wraps every 4398046511103ns 
 +[    0.008027] Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688) 
 +[    0.066211] pid_max: default: 32768 minimum: 301 
 +[    0.071599] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) 
 +[    0.078811] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) 
 +[    0.090362] rcu: Hierarchical SRCU implementation. 
 +[    0.095850] smp: Bringing up secondary CPUs ... 
 +[    0.101297] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. 
 +[    0.101323] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes 
 +[    0.101338] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. 
 +[    0.101382] CPU1 revision is: 0001992f (MIPS 1004Kc) 
 +[    0.160622] Synchronize counters for CPU 1: done. 
 +[    0.193121] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. 
 +[    0.193141] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes 
 +[    0.193153] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. 
 +[    0.193178] CPU2 revision is: 0001992f (MIPS 1004Kc) 
 +[    0.252093] Synchronize counters for CPU 2: done. 
 +[    0.282765] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. 
 +[    0.282787] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes 
 +[    0.282798] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. 
 +[    0.282828] CPU3 revision is: 0001992f (MIPS 1004Kc) 
 +[    0.337279] Synchronize counters for CPU 3: done. 
 +[    0.367140] smp: Brought up 1 node, 4 CPUs 
 +[    0.375938] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns 
 +[    0.385736] futex hash table entries: 1024 (order: 3, 32768 bytes, linear) 
 +[    0.392816] pinctrl core: initialized pinctrl subsystem 
 +[    0.399476] NET: Registered PF_NETLINK/PF_ROUTE protocol family 
 +[    0.408685] rt2880-pinmux pinctrl: there is not valid maps for state default 
 +[    0.436463] clocksource: Switched to clocksource GIC 
 +[    0.442776] NET: Registered PF_INET protocol family 
 +[    0.447791] IP idents hash table entries: 2048 (order: 2, 16384 bytes, linear) 
 +[    0.455659] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes, linear) 
 +[    0.463957] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear) 
 +[    0.471639] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear) 
 +[    0.479256] TCP bind hash table entries: 1024 (order: 1, 8192 bytes, linear) 
 +[    0.486220] TCP: Hash tables configured (established 1024 bind 1024) 
 +[    0.492691] UDP hash table entries: 256 (order: 1, 8192 bytes, linear) 
 +[    0.499183] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear) 
 +[    0.506398] NET: Registered PF_UNIX/PF_LOCAL protocol family 
 +[    0.512080] PCI: CLS 0 bytes, default 32 
 +[    0.518022] workingset: timestamp_bits=14 max_order=15 bucket_order=1 
 +[    0.530026] squashfs: version 4.0 (2009/01/31) Phillip Lougher 
 +[    0.535788] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc. 
 +[    0.549918] mt7621_gpio 1e000600.gpio: registering 32 gpios 
 +[    0.555855] mt7621_gpio 1e000600.gpio: registering 32 gpios 
 +[    0.561826] mt7621_gpio 1e000600.gpio: registering 32 gpios 
 +[    0.567945] mt7621-pci 1e140000.pcie: host bridge /pcie@1e140000 ranges: 
 +[    0.574611] mt7621-pci 1e140000.pcie:   No bus range found for /pcie@1e140000, using [bus 00-ff] 
 +[    0.583379] mt7621-pci 1e140000.pcie:      MEM 0x0060000000..0x006fffffff -> 0x0060000000 
 +[    0.591487] mt7621-pci 1e140000.pcie:       IO 0x001e160000..0x001e16ffff -> 0x0000000000 
 +[    0.956479] mt7621-pci 1e140000.pcie: PCIE0 enabled 
 +[    0.961295] mt7621-pci 1e140000.pcie: PCIE1 enabled 
 +[    0.966154] PCI coherence region base: 0x60000000, mask/settings: 0xf0000002 
 +[    0.973396] mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00 
 +[    0.979685] pci_bus 0000:00: root bus resource [bus 00-ff] 
 +[    0.985091] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff] 
 +[    0.991946] pci_bus 0000:00: root bus resource [io  0x0000-0xffff] 
 +[    0.998170] pci 0000:00:00.0: [0e8d:0801] type 01 class 0x060400 
 +[    1.004098] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x7fffffff] 
 +[    1.010339] pci 0000:00:00.0: reg 0x14: [mem 0x60500000-0x6050ffff] 
 +[    1.016622] pci 0000:00:00.0: supports D1 
 +[    1.020538] pci 0000:00:00.0: PME# supported from D0 D1 D3hot 
 +[    1.027019] pci 0000:00:01.0: [0e8d:0801] type 01 class 0x0d8000 
 +[    1.033001] pci 0000:00:01.0: reg 0x10: [mem 0x00000000-0x01ffffff] 
 +[    1.039254] pci 0000:00:01.0: reg 0x14: [mem 0x00000000-0x0000ffff] 
 +[    1.045488] pci 0000:00:01.0: supports D1 
 +[    1.049424] pci 0000:00:01.0: PME# supported from D0 D1 D3hot 
 +[    1.056875] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring 
 +[    1.065058] pci 0000:01:00.0: [14c3:7603] type 00 class 0x028000 
 +[    1.071045] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000fffff] 
 +[    1.077434] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold 
 +[    1.084703] pci 0000:00:00.0: PCI bridge to [bus 01-ff] 
 +[    1.089899] pci 0000:00:00.0:   bridge window [io  0x0000-0x0fff] 
 +[    1.095898] pci 0000:00:00.0:   bridge window [mem 0x60000000-0x600fffff] 
 +[    1.102661] pci 0000:00:00.0:   bridge window [mem 0x60100000-0x601fffff pref] 
 +[    1.109836] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 
 +[    1.116650] pci 0000:02:00.0: [14c3:7663] type 00 class 0x000280 
 +[    1.122599] pci 0000:02:00.0: reg 0x10: [mem 0x00000000-0x000fffff 64bit pref] 
 +[    1.129782] pci 0000:02:00.0: reg 0x18: [mem 0x00000000-0x00003fff 64bit pref] 
 +[    1.136952] pci 0000:02:00.0: reg 0x20: [mem 0x00000000-0x00000fff 64bit pref] 
 +[    1.144192] pci 0000:02:00.0: supports D1 D2 
 +[    1.148388] pci 0000:02:00.0: PME# supported from D0 D1 D2 D3hot D3cold 
 +[    1.154966] pci 0000:02:00.0: 2.000 Gb/s available PCIe bandwidth, limited by 2.5 GT/s PCIe x1 link at 0000:00:01.0 (capable of 4.000 Gb/s with 5.0 GT/s PCIe x1 link) 
 +[    1.170993] pci 0000:00:01.0: PCI bridge to [bus 02-ff] 
 +[    1.176147] pci 0000:00:01.0:   bridge window [io  0x0000-0x0fff] 
 +[    1.182259] pci 0000:00:01.0:   bridge window [mem 0x00000000-0x000fffff] 
 +[    1.188981] pci 0000:00:01.0:   bridge window [mem 0x00000000-0x000fffff pref] 
 +[    1.196125] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 02 
 +[    1.202781] pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000] 
 +[    1.209325] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000] 
 +[    1.216213] pci 0000:00:01.0: BAR 0: assigned [mem 0x60000000-0x61ffffff] 
 +[    1.222985] pci 0000:00:00.0: BAR 8: assigned [mem 0x62000000-0x620fffff] 
 +[    1.229721] pci 0000:00:00.0: BAR 9: assigned [mem 0x62100000-0x621fffff pref] 
 +[    1.236891] pci 0000:00:01.0: BAR 8: assigned [mem 0x62200000-0x622fffff] 
 +[    1.243600] pci 0000:00:01.0: BAR 9: assigned [mem 0x62300000-0x624fffff pref] 
 +[    1.250801] pci 0000:00:00.0: BAR 1: assigned [mem 0x62500000-0x6250ffff] 
 +[    1.257556] pci 0000:00:01.0: BAR 1: assigned [mem 0x62510000-0x6251ffff] 
 +[    1.264250] pci 0000:00:00.0: BAR 7: assigned [io  0x0000-0x0fff] 
 +[    1.270327] pci 0000:00:01.0: BAR 7: assigned [io  0x1000-0x1fff] 
 +[    1.276352] pci 0000:01:00.0: BAR 0: assigned [mem 0x62000000-0x620fffff] 
 +[    1.283118] pci 0000:00:00.0: PCI bridge to [bus 01] 
 +[    1.288046] pci 0000:00:00.0:   bridge window [io  0x0000-0x0fff] 
 +[    1.294057] pci 0000:00:00.0:   bridge window [mem 0x62000000-0x620fffff] 
 +[    1.300825] pci 0000:00:00.0:   bridge window [mem 0x62100000-0x621fffff pref] 
 +[    1.308006] pci 0000:02:00.0: BAR 0: assigned [mem 0x62300000-0x623fffff 64bit pref] 
 +[    1.315669] pci 0000:02:00.0: BAR 2: assigned [mem 0x62400000-0x62403fff 64bit pref] 
 +[    1.323403] pci 0000:02:00.0: BAR 4: assigned [mem 0x62404000-0x62404fff 64bit pref] 
 +[    1.331085] pci 0000:00:01.0: PCI bridge to [bus 02] 
 +[    1.335969] pci 0000:00:01.0:   bridge window [io  0x1000-0x1fff] 
 +[    1.342046] pci 0000:00:01.0:   bridge window [mem 0x62200000-0x622fffff] 
 +[    1.348784] pci 0000:00:01.0:   bridge window [mem 0x62300000-0x624fffff pref] 
 +[    1.356967] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled 
 +[    1.364645] printk: console [ttyS0] disabled 
 +[    1.369081] 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 19, base_baud = 3125000) is a 16550A 
 +[    1.378136] printk: console [ttyS0] enabled 
 +[    1.378136] printk: console [ttyS0] enabled 
 +[    1.386384] printk: bootconsole [early0] disabled 
 +[    1.386384] printk: bootconsole [early0] disabled 
 +[    1.398957] spi-mt7621 1e000b00.spi: sys_freq: 220000000 
 +[    1.405527] spi-nor spi0.0: w25q128 (16384 Kbytes) 
 +[    1.410492] 4 fixed-partitions partitions found on MTD device spi0.0 
 +[    1.416890] OF: Bad cell count for /palmbus@1e000000/spi@b00/flash@0/partitions 
 +[    1.424212] OF: Bad cell count for /palmbus@1e000000/spi@b00/flash@0/partitions 
 +[    1.431820] Creating 4 MTD partitions on "spi0.0": 
 +[    1.436642] 0x000000000000-0x000000030000 : "Bootloader" 
 +[    1.443024] 0x000000030000-0x000000040000 : "Config" 
 +[    1.448981] 0x000000040000-0x000000050000 : "factory" 
 +[    1.455226] OF: Bad cell count for /palmbus@1e000000/spi@b00/flash@0/partitions 
 +[    1.462890] 0x000000050000-0x000001000000 : "firmware" 
 +[    1.469328] 2 uimage-fw partitions found on MTD device firmware 
 +[    1.475264] Creating 2 MTD partitions on "firmware": 
 +[    1.480252] 0x000000000000-0x0000002b7145 : "kernel" 
 +[    1.485202] mtd: partition "kernel" doesn't end on an erase/write block -- force read-only 
 +[    1.494471] 0x0000002b7145-0x000000fb0000 : "rootfs" 
 +[    1.499484] mtd: partition "rootfs" doesn't start on an erase/write block boundary -- force read-only 
 +[    1.509602] mtd: setting mtd5 (rootfs) as root device 
 +[    1.514803] 1 squashfs-split partitions found on MTD device rootfs 
 +[    1.521004] 0x0000006a0000-0x000000fb0000 : "rootfs_data" 
 +[    1.659408] mt7530-mdio mdio-bus:1f: MT7530 adapts as multi-chip module 
 +[    1.671559] mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 21 
 +[    1.681382] i2c_dev: i2c /dev entries driver 
 +[    1.688673] NET: Registered PF_INET6 protocol family 
 +[    1.695785] Segment Routing with IPv6 
 +[    1.699574] In-situ OAM (IOAM) with IPv6 
 +[    1.703577] NET: Registered PF_PACKET protocol family 
 +[    1.709044] 8021q: 802.1Q VLAN Support v1.8 
 +[    1.719275] mt7530-mdio mdio-bus:1f: MT7530 adapts as multi-chip module 
 +[    1.742638] mt7530-mdio mdio-bus:1f: configuring for fixed/rgmii link mode 
 +[    1.750306] mt7530-mdio mdio-bus:1f: Link is Up - 1Gbps/Full - flow control rx/tx 
 +[    1.751272] mt7530-mdio mdio-bus:1f wan (uninitialized): PHY [mt7530-0:00] driver [MediaTek MT7530 PHY] (irq=23) 
 +[    1.771017] mt7530-mdio mdio-bus:1f lan (uninitialized): PHY [mt7530-0:01] driver [MediaTek MT7530 PHY] (irq=24) 
 +[    1.784152] DSA: tree 0 setup 
 +[    1.800024] VFS: Mounted root (squashfs filesystem) readonly on device 31:5. 
 +[    1.811201] Freeing unused kernel image (initmem) memory: 1252K 
 +[    1.817181] This architecture does not have kernel memory protection. 
 +[    1.823612] Run /sbin/init as init process 
 +[    2.565639] init: Console is alive 
 +[    2.569604] init: - watchdog - 
 +[    3.677325] kmodloader: loading kernel modules from /etc/modules-boot.d/
 +[    3.758602] kmodloader: done loading kernel modules from /etc/modules-boot.d/
 +[    3.775721] init: - preinit - 
 +[    5.033997] random: jshn: uninitialized urandom read (4 bytes read) 
 +[    5.179357] random: jshn: uninitialized urandom read (4 bytes read) 
 +[    5.214182] random: jshn: uninitialized urandom read (4 bytes read) 
 +[    5.469807] mtk_soc_eth 1e100000.ethernet eth0: configuring for fixed/rgmii link mode 
 +[    5.482265] mtk_soc_eth 1e100000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx 
 +[    5.486897] mt7530-mdio mdio-bus:1f lan: configuring for phy/gmii link mode 
 +[    5.498212] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready 
 +Press the [f] key and hit [enter] to enter failsafe mode 
 +Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level 
 +[    7.789642] jffs2: notice: (361) jffs2_build_xattr_subsystem: complete building xattr subsystem, 6 of xdatum (0 unchecked, 1 orphan) and 7 of xref (1 dead, 0 orphan) found. 
 +[    7.808028] mount_root: switching to jffs2 overlay 
 +[    7.823899] overlayfs: upper fs does not support tmpfile. 
 +[    7.840697] urandom-seed: Seeding with /etc/urandom.seed 
 +[    7.989248] procd: - early - 
 +[    7.992370] procd: - watchdog - 
 +[    8.610509] procd: - watchdog - 
 +[    8.614290] procd: - ubus - 
 +[    8.708724] random: ubusd: uninitialized urandom read (4 bytes read) 
 +[    8.717476] random: ubusd: uninitialized urandom read (4 bytes read) 
 +[    8.732688] random: ubusd: uninitialized urandom read (4 bytes read) 
 +[    8.745138] procd: - init - 
 +Please press Enter to activate this console. 
 +[    9.456661] kmodloader: loading kernel modules from /etc/modules.d/
 +[    9.719842] Loading modules backported from Linux version v6.1.24-0-g0102425ac76b 
 +[    9.727396] Backport generated by backports.git v5.15.92-1-44-gd6ea70fafd36 
 +[    9.975144] pci 0000:00:00.0: enabling device (0006 -> 0007) 
 +[    9.980908] mt7603e 0000:01:00.0: enabling device (0000 -> 0002) 
 +[    9.987252] mt7603e 0000:01:00.0: ASIC revision: 76030010 
 +[   10.641110] urngd: v1.0.2 started. 
 +[   11.018562] mt7603e 0000:01:00.0: Firmware Version: ap_pcie 
 +[   11.024163] mt7603e 0000:01:00.0: Build Time: 20160107100755 
 +[   11.051407] mt7603e 0000:01:00.0: firmware init done 
 +[   11.249945] pci 0000:00:01.0: enabling device (0000 -> 0003) 
 +[   11.255644] mt7615e 0000:02:00.0: enabling device (0000 -> 0002) 
 +[   11.365287] PPP generic driver version 2.4.2 
 +[   11.373473] NET: Registered PF_PPPOX protocol family 
 +[   11.392478] kmodloader: done loading kernel modules from /etc/modules.d/
 +[   11.419024] random: crng init done 
 +[   11.422454] random: 30 urandom warning(s) missed due to ratelimiting 
 +[   13.341230] mt7615e 0000:02:00.0: mediatek/mt7663pr2h.bin not found, switching to mediatek/mt7663pr2h_rebb.bin 
 +[   20.603809] mtk_soc_eth 1e100000.ethernet eth0: Link is Down 
 +[   20.625845] mtk_soc_eth 1e100000.ethernet eth0: configuring for fixed/rgmii link mode 
 +[   20.634355] mtk_soc_eth 1e100000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx 
 +[   20.638016] mt7530-mdio mdio-bus:1f lan: configuring for phy/gmii link mode 
 +[   20.650644] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready 
 +[   20.659397] br-lan: port 1(lan) entered blocking state 
 +[   20.664600] br-lan: port 1(lan) entered disabled state 
 +[   20.672223] device lan entered promiscuous mode 
 +[   20.676897] device eth0 entered promiscuous mode 
 +[   20.719441] mt7530-mdio mdio-bus:1f wan: configuring for phy/gmii link mode 
 +[   21.929202] br-lan: port 2(phy1-ap0) entered blocking state 
 +[   21.934870] br-lan: port 2(phy1-ap0) entered disabled state 
 +[   21.941150] device phy1-ap0 entered promiscuous mode 
 +[   23.257470] mt7530-mdio mdio-bus:1f lan: Link is Up - 1Gbps/Full - flow control rx/tx 
 +</nowiki>
 </WRAP>\\ </WRAP>\\
  
  • Last modified: 2024/05/20 18:28
  • by dnd