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| toh:aztech:hw550-3g [2015/11/26 07:12] – No BOGO MIPS changes = No overclock alphasparc | toh:aztech:hw550-3g [2018/06/16 10:46] – Datatables added, cleanup tmomas | ||
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| + | ====== Aztech HW550-3G ====== | ||
| + | ===== Supported Versions ===== | ||
| + | ---- datatable ---- | ||
| + | cols : Brand, Model, Versions, Supported Current Rel, OEM device homepage URL_url, OWrt Forum Topic URL_url, Device Techdata_pageid | ||
| + | headers : Brand, Model, Version, Current Release, OEM Info, Forum Topic, Technical Data | ||
| + | align : c, | ||
| + | filter | ||
| + | ---- | ||
| + | |||
| + | |||
| + | ===== Hardware Highlights ===== | ||
| + | ---- datatable ---- | ||
| + | cols : Model, Versions, CPU, CPU MHz, Flash MB_mbflashs, | ||
| + | header | ||
| + | align : c, | ||
| + | filter | ||
| + | ---- | ||
| + | |||
| + | |||
| + | ===== Installation ===== | ||
| + | ---- datatable ---- | ||
| + | cols : Model, Versions, Supported Current Rel, Firmware OpenWrt Install URL_url, Firmware OpenWrt Upgrade URL_url, Firmware OEM Stock URL_url | ||
| + | headers : Model, Version, Current Release, Firmware OpenWrt Install, Firmware OpenWrt Upgrade, Firmware OEM Stock | ||
| + | align : c,c,c | ||
| + | filter | ||
| + | ---- | ||
| + | |||
| + | -> [[docs: | ||
| + | |||
| + | FIXME Please add the installation procedure here. | ||
| + | |||
| + | |||
| + | ==== Flash Layout ==== | ||
| + | -> | ||
| + | |||
| + | ^ dev: ^ size ^ erasesize | ||
| + | | mtd0: | 00030000 | ||
| + | | mtd1: | 00010000 | ||
| + | | mtd2: | 00010000 | ||
| + | | mtd3: | 000e0000 | ||
| + | | mtd4: | 006d0000 | ||
| + | | mtd5: | 00100000 | ||
| + | | mtd6: | 007b0000 | ||
| + | |||
| + | ==== Flashing via U-Boot ==== | ||
| + | |||
| + | **NOTE:** Serial connection and configured TFTP server needed! | ||
| + | |||
| + | * After compiling firmware successfully, | ||
| + | * Then rename firmware to something shorter, for example '' | ||
| + | * | ||
| + | * When you power on device, and see U-Boot log, immediately push " | ||
| + | You will see this message: | ||
| + | < | ||
| + | | ||
| + | * Push " | ||
| + | < | ||
| + | | ||
| + | Input device IP (10.10.10.123) ==: | ||
| + | Input server IP (10.10.10.3) ==: | ||
| + | Input Linux Kernel filename () ==: | ||
| + | </ | ||
| + | |||
| + | If TFTP server installed correctly, the firmware would be downloaded at ~30 seconds. | ||
| + | Then it will be flashed into device (It will take about 2 minutes). | ||
| + | |||
| + | |||
| + | ===== Basic configuration ===== | ||
| + | [[docs: | ||
| + | |||
| + | ===== Hardware ===== | ||
| + | ==== Info ==== | ||
| + | ^ [[wp> | ||
| + | ^ Vendor | ||
| + | ^ [[docs: | ||
| + | ^ [[docs: | ||
| + | ^ [[docs: | ||
| + | ^ Flash-Chip | ||
| + | ^ Flash size | 8192 KiB | | ||
| + | ^ RAM | 32 MiB Zentel A3V28S40FTP -G6 | | ||
| + | ^ Wireless | ||
| + | ^ Ethernet | ||
| + | ^ USB | Yes 1 x 2.0 | | ||
| + | ^ [[docs: | ||
| + | ^ [[docs: | ||
| + | |||
| + | ==== JTAG ==== | ||
| + | {{: | ||
| + | |||
| + | == Pinout == | ||
| + | | TP3 (JTAG_TD1) | ||
| + | | TP7 (JTAG_TRST_N) | ||
| + | |||
| + | ==== Serial ==== | ||
| + | == Pinout == | ||
| + | {{: | ||
| + | Now connect a [[http:// | ||
| + | The right settings for accessing the serial console are as follows: | ||
| + | |||
| + | Bits per second: **57600**\\ | ||
| + | Data bits: **8**\\ | ||
| + | Stop bits: **1**\\ | ||
| + | Parity: **None**\\ | ||
| + | Flow control: **None**\\ | ||
| + | |||
| + | |||
| + | ==== OpenWrt bootlog ==== | ||
| + | <WRAP bootlog> | ||
| + | < | ||
| + | |||
| + | Board: Ralink APSoC DRAM: 32 MB | ||
| + | relocate_code Pointer at: 81fb0000 | ||
| + | |||
| + | Set info-> | ||
| + | flash_protect ON: from 0xBF000000 to 0xBF01D3C3 | ||
| + | flash_protect ON: from 0xBF030000 to 0xBF030FFF | ||
| + | ============================================ | ||
| + | Ralink UBoot Version: 3.3 | ||
| + | -------------------------------------------- | ||
| + | ASIC 3052_MP2 (Port5< | ||
| + | DRAM component: 128 Mbits SDR | ||
| + | DRAM bus: 32 bit | ||
| + | Total memory: 32 MBytes | ||
| + | Flash component: NOR Flash | ||
| + | Date: | ||
| + | ============================================ | ||
| + | icache: sets:256, ways:4, linesz:32 , | ||
| + | dcache: sets:128, ways:4, linesz:32 , | ||
| + | |||
| + | ##### The CPU freq = 384 MHZ #### | ||
| + | |||
| + | SDRAM bus set to 32 bit | ||
| + | SDRAM size =32 Mbytes | ||
| + | |||
| + | Please choose the operation: | ||
| + | 1: Load system code to SDRAM via TFTP. | ||
| + | 2: Load system code then write to Flash via TFTP. | ||
| + | 3: Boot system code via Flash (default). | ||
| + | 4: Entr boot command line interface. | ||
| + | 9: Load Boot Loader code then write to Flash via TFTP. | ||
| + | |||
| + | |||
| + | 3: System Boot system code via Flash. | ||
| + | ## Booting image at bf050000 ... | ||
| + | Image Name: MIPS OpenWrt Linux-3.2.9 | ||
| + | | ||
| + | Image Type: MIPS Linux Kernel Image (lzma compressed) | ||
| + | Data Size: 820938 Bytes = 801.7 kB | ||
| + | Load Address: 80000000 | ||
| + | Entry Point: | ||
| + | | ||
| + | | ||
| + | No initrd | ||
| + | ## Transferring control to Linux (at address 80000000) ... | ||
| + | ## Giving linux memsize in MB, 32 | ||
| + | |||
| + | Starting kernel ... | ||
| + | |||
| + | [ 0.000000] Linux version 3.2.9 (gcc version 4.6.3 20120201 (prerelease) (Linaro GCC 4.6-2012.02) ) #1 Tue Mar 6 10:33:38 SGT 2012 | ||
| + | [ 0.000000] bootconsole [early0] enabled | ||
| + | [ 0.000000] CPU revision is: 0001964c (MIPS 24Kc) | ||
| + | [ 0.000000] Ralink RT3052 | ||
| + | [ 0.000000] Determined physical RAM map: | ||
| + | [ 0.000000] | ||
| + | [ 0.000000] Initrd not found or empty - disabling initrd | ||
| + | [ 0.000000] Zone PFN ranges: | ||
| + | [ 0.000000] | ||
| + | [ 0.000000] Movable zone start PFN for each node | ||
| + | [ 0.000000] early_node_map[1] active PFN ranges | ||
| + | [ 0.000000] | ||
| + | [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 8128 | ||
| + | [ 0.000000] Kernel command line: board=HW550-3G console=ttyS1, | ||
| + | [ 0.000000] PID hash table entries: 128 (order: -3, 512 bytes) | ||
| + | [ 0.000000] Dentry cache hash table entries: 4096 (order: 2, 16384 bytes) | ||
| + | [ 0.000000] Inode-cache hash table entries: 2048 (order: 1, 8192 bytes) | ||
| + | [ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. | ||
| + | [ 0.000000] Primary data cache 16kB, 4-way, VIPT, no aliases, linesize 32 bytes | ||
| + | [ 0.000000] Writing ErrCtl register=00044007 | ||
| + | [ 0.000000] Readback ErrCtl register=00044007 | ||
| + | [ 0.000000] Memory: 29992k/ | ||
| + | [ 0.000000] SLUB: Genslabs=9, HWalign=32, Order=0-3, MinObjects=0, | ||
| + | [ 0.000000] NR_IRQS:48 | ||
| + | [ 0.000000] console [ttyS1] enabled, bootconsole disabled | ||
| + | [ 0.000000] console [ttyS1] enabled, bootconsole disabled | ||
| + | [ 0.010000] Calibrating delay loop... 255.59 BogoMIPS (lpj=1277952) | ||
| + | [ 0.090000] pid_max: default: 32768 minimum: 301 | ||
| + | [ 0.100000] Mount-cache hash table entries: 512 | ||
| + | [ 0.110000] NET: Registered protocol family 16 | ||
| + | [ 0.120000] MIPS: machine is Aztech HW550-3G | ||
| + | [ 0.140000] bio: create slab < | ||
| + | [ 0.150000] Switching to clocksource MIPS | ||
| + | [ 0.160000] NET: Registered protocol family 2 | ||
| + | [ 0.170000] IP route cache hash table entries: 1024 (order: 0, 4096 bytes) | ||
| + | [ 0.180000] TCP established hash table entries: 1024 (order: 1, 8192 bytes) | ||
| + | [ 0.200000] TCP bind hash table entries: 1024 (order: 0, 4096 bytes) | ||
| + | [ 0.210000] TCP: Hash tables configured (established 1024 bind 1024) | ||
| + | [ 0.220000] TCP reno registered | ||
| + | [ 0.230000] UDP hash table entries: 256 (order: 0, 4096 bytes) | ||
| + | [ 0.240000] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes) | ||
| + | [ 0.260000] NET: Registered protocol family 1 | ||
| + | [ 0.300000] squashfs: version 4.0 (2009/ | ||
| + | [ 0.310000] JFFS2 version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc. | ||
| + | [ 0.330000] msgmni has been set to 58 | ||
| + | [ 0.340000] io scheduler noop registered | ||
| + | [ 0.350000] io scheduler deadline registered (default) | ||
| + | [ 0.360000] Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled | ||
| + | [ 0.370000] serial8250: ttyS0 at MMIO 0x10000500 (irq = 13) is a 16550A | ||
| + | [ 0.380000] serial8250: ttyS1 at MMIO 0x10000c00 (irq = 20) is a 16550A | ||
| + | [ 0.400000] physmap platform flash device: 00800000 at bf000000 | ||
| + | [ 0.410000] physmap-flash.0: | ||
| + | [ 0.430000] Amd/Fujitsu Extended Query Table at 0x0040 | ||
| + | [ 0.440000] | ||
| + | [ 0.450000] number of CFI chips: 1 | ||
| + | [ 0.460000] 6 cmdlinepart partitions found on MTD device physmap-flash.0 | ||
| + | [ 0.470000] Creating 6 MTD partitions on " | ||
| + | [ 0.490000] 0x000000000000-0x000000030000 : " | ||
| + | [ 0.500000] 0x000000030000-0x000000040000 : " | ||
| + | [ 0.510000] 0x000000040000-0x000000050000 : " | ||
| + | [ 0.520000] 0x000000050000-0x000000130000 : " | ||
| + | [ 0.540000] 0x000000130000-0x000000800000 : " | ||
| + | [ 0.550000] mtd: partition " | ||
| + | [ 0.560000] mtd: partition " | ||
| + | [ 0.580000] 0x0000006e0000-0x000000800000 : " | ||
| + | [ 0.590000] 0x000000050000-0x000000800000 : " | ||
| + | [ 0.610000] TCP westwood registered | ||
| + | [ 0.620000] NET: Registered protocol family 17 | ||
| + | [ 0.630000] 8021q: 802.1Q VLAN Support v1.8 | ||
| + | [ 0.640000] VFS: Mounted root (squashfs filesystem) readonly on device 31:4. | ||
| + | [ 0.660000] Freeing unused kernel memory: 160k freed | ||
| + | [ 2.800000] input: gpio-keys-polled as / | ||
| + | [ 2.950000] Button Hotplug driver version 0.4.1 | ||
| + | - preinit - | ||
| + | Press the [f] key and hit [enter] to enter failsafe mode | ||
| + | - regular preinit - | ||
| + | [ 6.490000] JFFS2 notice: (353) jffs2_build_xattr_subsystem: | ||
| + | [ 7.300000] SCSI subsystem initialized | ||
| + | [ 7.540000] usbcore: registered new interface driver usbfs | ||
| + | [ 7.550000] usbcore: registered new interface driver hub | ||
| + | [ 7.560000] usbcore: registered new device driver usb | ||
| + | [ 8.220000] dwc_otg: version 2.72a 24-JUN-2008 | ||
| + | [ 8.230000] dwc_otg: Core Release: 2.66a | ||
| + | [ 8.440000] dwc_otg: Periodic Transfer Interrupt Enhancement - disabled | ||
| + | [ 8.460000] dwc_otg: Multiprocessor Interrupt Enhancement - disabled | ||
| + | [ 8.470000] dwc_otg: Using DMA mode | ||
| + | [ 8.470000] dwc_otg: Device using Buffer DMA mode | ||
| + | [ 8.480000] dwc_otg dwc_otg.0: DWC OTG Controller | ||
| + | [ 8.490000] dwc_otg dwc_otg.0: new USB bus registered, assigned bus number 1 | ||
| + | [ 8.510000] dwc_otg dwc_otg.0: irq 26, io mem 0x101c0000 | ||
| + | [ 8.520000] dwc_otg: Init: Port Power? op_state=1 | ||
| + | [ 8.530000] dwc_otg: Init: Power Port (0) | ||
| + | [ 8.540000] hub 1-0:1.0: USB hub found | ||
| + | [ 8.550000] hub 1-0:1.0: 1 port detected | ||
| + | [ 8.650000] Initializing USB Mass Storage driver... | ||
| + | [ 8.660000] usbcore: registered new interface driver usb-storage | ||
| + | [ 8.670000] USB Mass Storage support registered. | ||
| + | switching to jffs2 | ||
| + | - init - | ||
| + | |||
| + | Please press Enter to activate this console. [ | ||
| + | [ | ||
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| + | </ | ||
| + | |||
| + | ==== Upgrade to 64MB SDRAM ==== | ||
| + | |||
| + | To upgrade to 64MB SDRAM you need to flash a Ralink Bootloader that initialises 64MB of RAM and flash OpenWrt to the system. | ||
| + | The original bootloader only initialises 32MB of SDRAM and the original Aztech Firmware only utilises 32MB of SDRAM as well. | ||
| + | You can either compile the Bootloader by downloading Aztech' | ||
| + | [[http:// | ||
| + | |||
| + | ==== Upgradable RAM ==== | ||
| + | ^ | ||
| + | | SDRAM | 16Mx16 | ||
| + | |||
| + | ==== Flashing the Ralink Bootloader ==== | ||
| + | |||
| + | **NOTE:** Serial connection and configured TFTP server needed! If you flash wrongly you risk bricking the entire device! | ||
| + | |||
| + | * | ||
| + | * Then rename Bootloader to something shorter, for example " | ||
| + | * | ||
| + | * When you power on device, and see U-Boot log, immediately push " | ||
| + | |||
| + | You will see this message: | ||
| + | < | ||
| + | 9: Load Boot Loader code then write to Flash via TFTP. | ||
| + | Warning!! Erase Boot Loader in Flash then burn new one. Are you sure? | ||
| + | * Push " | ||
| + | < | ||
| + | | ||
| + | Input device IP (10.10.10.123) ==: | ||
| + | Input server IP (10.10.10.3) ==: | ||
| + | Input Uboot filename () ==: | ||
| + | </ | ||
| + | |||
| + | If TFTP server installed correctly, the firmware would be downloaded at ~5 seconds. | ||
| + | Then it will be flashed into device (It will take about 30 seconds). | ||
| + | |||
| + | ==== Bootloader After Flashing 64MB Uboot ==== | ||
| + | < | ||
| + | U-Boot 1.1.3 (Mar 19 2010 - 10:55:07) | ||
| + | |||
| + | Board: Ralink APSoC DRAM: 64 MB | ||
| + | relocate_code Pointer at: 83fb0000 | ||
| + | |||
| + | Set info-> | ||
| + | flash_protect ON: from 0xBF000000 to 0xBF01D3C3 | ||
| + | flash_protect ON: from 0xBF030000 to 0xBF030FFF | ||
| + | *** Warning - bad CRC, using default environment | ||
| + | |||
| + | ============================================ | ||
| + | Ralink UBoot Version: 3.3 | ||
| + | -------------------------------------------- | ||
| + | ASIC 3052_MP2 (Port5< | ||
| + | DRAM component: 256 Mbits SDR | ||
| + | DRAM bus: 32 bit | ||
| + | Total memory: 64 MBytes | ||
| + | Flash component: NOR Flash | ||
| + | Date:Mar 19 2010 Time: | ||
| + | ============================================ | ||
| + | icache: sets:256, ways:4, linesz:32 , | ||
| + | dcache: sets:128, ways:4, linesz:32 , | ||
| + | |||
| + | ##### The CPU freq = 384 MHZ #### | ||
| + | |||
| + | SDRAM bus set to 32 bit | ||
| + | SDRAM size =64 Mbytes | ||
| + | |||
| + | Please choose the operation: | ||
| + | 1: Load system code to SDRAM via TFTP. | ||
| + | 2: Load system code then write to Flash via TFTP. | ||
| + | 3: Boot system code via Flash (default). | ||
| + | 4: Entr boot command line interface. | ||
| + | 9: Load Boot Loader code then write to Flash via TFTP. | ||
| + | </ | ||
| + | To remove the "*** Warning - bad CRC, using default environment" | ||
| + | Boot into the bootloader command line interface by pressing " | ||
| + | Then type saveenv in the prompt to overwrite the boot environment variables from the original bootloader.\\ | ||
| + | This will correct the error in the checksum. | ||
| + | |||
| + | |||
| + | ===== Tags ===== | ||
| + | [[meta: | ||
| + | {{tag> | ||