ASUS RT-N56U B1

Dual-band Wireless-N600 Gigabit Router

SPECIFICATIONS (some information from the box):

  • 1 x Gigabit WAN port
  • 4 x Gigabit WAN ports
  • 2 x High speed USB 2.0 ports
  • 2 x Internal antenna for 2.4G with peak gain 3.17dBi
  • 2 x Internal antenna for 5 G with peak gain 4.06dBi
  • DC output: 12V with max. 1.5A current

Asus RT-N56U B1 Router

Install OpenWrt (generic explanation)

FIXME Please add the installation procedure here.

OpenWrt Flash Layout:

cat /proc/mtd
dev:    size   erasesize  name
mtd0: 00030000 00010000 "u-boot"
mtd1: 00010000 00010000 "config"
mtd2: 00010000 00010000 "factory"
mtd3: 00fb0000 00010000 "firmware"
mtd4: 0025e786 00010000 "kernel"
mtd5: 00d5187a 00010000 "rootfs"
mtd6: 00a90000 00010000 "rootfs_data"
spi-mt7621 1e000b00.spi: sys_freq: 220000000
spi-nor spi0.0: mx25l12805d (16384 Kbytes)
4 fixed-partitions partitions found on MTD device spi0.0
Creating 4 MTD partitions on "spi0.0":
0x000000000000-0x000000030000 : "u-boot"
0x000000030000-0x000000040000 : "config"
0x000000040000-0x000000050000 : "factory"
0x000000050000-0x000001000000 : "firmware"
2 uimage-fw partitions found on MTD device firmware
Creating 2 MTD partitions on "firmware":
0x000000000000-0x00000025e786 : "kernel"
0x00000025e786-0x000000fb0000 : "rootfs"
mtd: device 5 (rootfs) set to be root filesystem
1 squashfs-split partitions found on MTD device rootfs
0x000000520000-0x000000fb0000 : "rootfs_data"

At present it is not known what the structure of the OEM firmware image is that the Web-Gui would accept. Therefore this installation method is not possible.

generic.flashing.tftp

  1. Set your computer's IP-Address to 192.168.1.75.
  2. Power up the router with the reset button pressed.
  3. Release the reset button after 5 seconds and power LED blinking.
  4. Upload OpenWrt sysupgrade image via TFTP:
     tftp -4 -v -m binary 192.168.1.1 -c put <IMAGE>

Specific values needed for tftp

Bootloader tftp server IPv4 address 192.168.1.1
Firmware tftp image Development Snapshot builds - sysupgrade image
TFTP transfer window about 60 seconds
TFTP window start within 5 seconds after power on, Reset needs to be pressed until the power LED starts blinking slowly. Window starts at this point
TFTP client required IP address 192.168.1.75
  • Browse to http://192.168.1.1/cgi-bin/luci/admin/system/flash
  • Upload a sysupgrade-compatible image here to replace the running firmware.
  • Wait for reboot

If you don't have a GUI (LuCI) available, you can alternatively upgrade via the command line. There are two command line methods for upgrading:

  • sysupgrade
  • mtd

Note: It is important that you put the firmware image into the ramdisk (/tmp) before you start flashing.

sysupgrade

  • Login as root via SSH on 192.168.1.1, then enter the following commands:
cd /tmp
wget http://downloads.openwrt.org/snapshots/trunk/XXX/xxx.abc
sysupgrade /tmp/xxx.abc

mtd

If sysupgrade does not support this router, use mtd.

  • Login as root via SSH on 192.168.1.1, then enter the following commands:
cd /tmp
wget http://downloads.openwrt.org/snapshots/trunk/XXX/xxx.abc
mtd write /tmp/xxx.abc linux && reboot

Basic configuration After flashing, proceed with this.
Set up your Internet connection, configure wireless, configure USB port, etc.

The default network configuration is:

Interface Name Description Default configuration
br-lan LAN & WiFi 192.168.1.1/24
wan WAN port DHCP
lan1-lan4 LAN ports (1 to 4) None
wlan0 2.4 GHz WiFi Disabled
wlan1 5 GHz WiFi Disabled

Numbers 0-3 are Ports 1-4 as labeled on the unit, number 4 is the Internet (WAN) on the unit, 6 is the internal connection to the router itself. Don't be fooled: Port 1 on the unit is number 3 when configuring VLANs. vlan0 = eth0.0, vlan1 = eth0.1 and so on.

Port Switch port
Internet (WAN) 4
LAN 1 3
LAN 2 2
LAN 3 1
LAN 4 0

hardware.button on howto use and configure the hardware button(s). Here, we merely name the buttons, so we can use them in the above Howto.

The ASUS RT-N56U has the following buttons:

BUTTON Event
Reset reset
WPS -

Front: Case front Back: Ports Backside label: Label

Note: This will void your warranty!

PCB Top

To remove the cover and open the device:

  • Peel off the edge of the label or make a cut at the screw locations (see picture).
  • Remove the two screws under the label using a screwdriver Phillips #1.
  • Use a plectrum or a similar object to open the case. The edge above the ports is glued with soft glue and needs some force or liitle warming.

Main PCB:
PCB Top PCB bottom

Main PCB ICs:
SOC RAM SPI Flash MT7612 MT7603 FEM 2.4GHz FEM 5GHz
DC-DC 1 DC-DC 2 DC-DC 3

port.serial general information about the serial port, serial port cable, etc.

How to connect to the Serial Port of this specific device:
Serial port

Serial connection parameters
for ASUS RT-N56U B1
115200, 8N1

port.jtag general information about the JTAG port, JTAG cable, etc.

Jtag port not found on board

OCP Bridge divider modification.
The default divider is 1:4 - 220MHz and it is suitable for DDR2 memory. The router has DDR3 memory installed. Remove the resistor R157 with a soldering iron and get a 1:3 divider - 293MHz, which is more suitable for DDR3 memory. See picture bellow:

Remove R157 OCP

=================================================================== MT7621 stage1 code 10:33:55 (ASIC) CPU=500000000 HZ BUS=166666666 HZ ================================================================== Change MPLL source from XTAL to CR... do MEMPLL setting.. MEMPLL Config : 0x11000000 3PLL mode + External loopback === XTAL-40Mhz === DDR-1200Mhz === PLL3 FB_DL: 0xa, 1/0 = 525/499 29000000 PLL2 FB_DL: 0xc, 1/0 = 600/424 31000000 PLL4 FB_DL: 0x12, 1/0 = 630/394 49000000 do DDR setting..[01F40000] Apply DDR3 Setting...(use default AC) 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120 -------------------------------------------------------------------------------- 0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000E:| 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 000F:| 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 0010:| 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0011:| 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 rank 0 coarse = 15 rank 0 fine = 80 B:| 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 opt_dle value:10 DRAMC_R0DELDLY[018]=0000201F ================================================================== RX DQS perbit delay software calibration ================================================================== 1.0-15 bit dq delay value ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 11 8 11 10 10 9 11 8 8 9 10 | 11 11 11 13 10 11 -------------------------------------- ================================================================== 2.dqs window x=pass dqs delay value (min~max)center y=0-7bit DQ of every group input delay:DQS0 =31 DQS1 = 32 ================================================================== bit DQS0 bit DQS1 0 (1~60)30 8 (1~58)29 1 (0~57)28 9 (1~61)31 2 (1~58)29 10 (1~58)29 3 (0~58)29 11 (1~58)29 4 (1~62)31 12 (1~64)32 5 (1~60)30 13 (1~59)30 6 (1~60)30 14 (1~61)31 7 (1~62)31 15 (1~62)31 ================================================================== 3.dq delay value last ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 12 11 13 12 10 10 12 8 11 10 10 | 14 14 11 15 11 12 ================================================================== ================================================================== TX perbyte calibration ================================================================== DQS loop = 15, cmp_err_1 = ffff0000 dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1 dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2 DQ loop=15, cmp_err_1 = ffff0000 dqs_perbyte_dly.last_dqdly_pass[0]=15, finish count=1 dqs_perbyte_dly.last_dqdly_pass[1]=15, finish count=2 byte:0, (DQS,DQ)=(8,8) byte:1, (DQS,DQ)=(8,8) 20,data:88 [EMI] DRAMC calibration passed =================================================================== MT7621 stage1 code done CPU=500000000 HZ BUS=166666666 HZ =================================================================== U-Boot 1.1.3 (Dec 18 2014 - 16:18:02) RT-N56UB1 bootloader version: 1.0.0.0 Board: Ralink APSoC DRAM: 128 MB ASUS RT-N56UB1 gpio init : wps / reset pin Config XHCI 40M PLL flash manufacture id: c2, device id 20 18 find flash: MX25L12805D raspi_read: from:30000 len:1000 Maximum malloc length: 1024 KBytes mem_malloc_start/brk/end: 0x87eb3000/87eb5000/87fb4000 *** Warning - bad CRC, using default environment ============================================ Ralink UBoot Version: 4.3.0.0 -------------------------------------------- ASIC 7621_MP (MAC to MT7530 Mode) ASIC MT7621AS (MAC to MT7530 Mode) DRAM_CONF_FROM: Auto-Detection DRAM_TYPE: DDR3 DRAM bus: 16 bit Xtal Mode=3 OCP Ratio=1/3 Flash component: SPI Flash Date:Dec 18 2014 Time:16:18:02 ============================================ icache: sets:256, ways:4, linesz:32 ,total:32768 dcache: sets:256, ways:4, linesz:32 ,total:32768 #Reset_MT7530 set LAN/WAN WLLLL Please choose the operation: 1: Load System code to SDRAM via TFTP. 2: Load System code then write to Flash via TFTP. 3: Boot System code via Flash (default). 4: Entr boot command line interface. 8: Load Boot Loader code to SDRAM via TFTP. 9: Load Boot Loader code then write to Flash via TFTP. 0 3: System Boot System code via Flash. raspi_read: from:4018a len:4 RT-N56UB1 bootloader version: 1.0.0.0 raspi_read: from:40004 len:6 MAC Address: 10:7B:44:55:81:C8 raspi_read: from:40004 len:6 ## Checking 1st firmware at bfc50000 ... raspi_read: from:50000 len:40 Image Name: Image Type: MIPS Linux Kernel Image (lzma compressed) Data Size: 14558818 Bytes = 13.9 MB Load Address: 80001000 Entry Point: 8000d1d0 raspi_read: from:50040 len:de2662 Verifying Checksum ... OK Uncompressing Kernel Image ... OK ## Giving linux ramsize: 134217728 (128 MB) Starting kernel ... 怘####fff##~##~fx###怘#怘#f####f####f#f###Linux version 2.6.36 (root@asus) (gcc version 4.2.4) #2 SMP Fri Feb 17 16:09:42 CST 2017 The CPU feqenuce set to 880 MHz GCMP present CPU revision is: 0001992f (MIPS 1004Kc) Software DMA cache coherency Determined physical RAM map: memory: 08000000 @ 00000000 (usable) Initrd not found or empty - disabling initrd Zone PFN ranges: Normal 0x00000000 -> 0x00008000 Movable zone start PFN for each node early_node_map[1] active PFN ranges 0: 0x00000000 -> 0x00008000 avail: cpu2 is not ready avail: cpu3 is not ready Detected 1 available secondary CPU(s) PERCPU: Embedded 7 pages/cpu @81103000 s7360 r8192 d13120 u65536 pcpu-alloc: s7360 r8192 d13120 u65536 alloc=16*4096 pcpu-alloc: [0] 0 [0] 1 Built 1 zonelists in Zone order, mobility grouping off. Total pages: 32512 Kernel command line: console=ttyS1,115200n8 root=/dev/mtdblock4 rootfstype=squashfs PID hash table entries: 512 (order: -1, 2048 bytes) Dentry cache hash table entries: 16384 (order: 4, 65536 bytes) Inode-cache hash table entries: 8192 (order: 3, 32768 bytes) Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes MIPS secondary cache 256kB, 8-way, linesize 32 bytes. Writing ErrCtl register=00000000 Readback ErrCtl register=00000000 Memory: 125944k/131072k available (2932k kernel code, 5128k reserved, 597k data, 216k init, 0k highmem) SLUB: Genslabs=7, HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 Hierarchical RCU implementation. Verbose stalled-CPUs detection is disabled. NR_IRQS:128 Trying to install interrupt handler for IRQ24 Trying to install interrupt handler for IRQ25 Trying to install interrupt handler for IRQ22 Trying to install interrupt handler for IRQ9 Trying to install interrupt handler for IRQ10 Trying to install interrupt handler for IRQ11 Trying to install interrupt handler for IRQ12 Trying to install interrupt handler for IRQ13 Trying to install interrupt handler for IRQ14 Trying to install interrupt handler for IRQ16 Trying to install interrupt handler for IRQ17 Trying to install interrupt handler for IRQ18 Trying to install interrupt handler for IRQ19 Trying to install interrupt handler for IRQ20 Trying to install interrupt handler for IRQ21 Trying to install interrupt handler for IRQ23 Trying to install interrupt handler for IRQ26 Trying to install interrupt handler for IRQ27 Trying to install interrupt handler for IRQ28 Trying to install interrupt handler for IRQ15 Trying to install interrupt handler for IRQ8 Trying to install interrupt handler for IRQ29 Trying to install interrupt handler for IRQ30 Trying to install interrupt handler for IRQ31 CPU0: status register was 11000000 CPU0: status register now 11000000 CPU0: status register frc 11001800 console [ttyS1] enabled Calibrating delay loop... 579.58 BogoMIPS (lpj=1159168) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 512 launch: starting cpu1 launch: cpu1 gone! CPU revision is: 0001992f (MIPS 1004Kc) Primary instruction cache 32kB, VIPT, , 4-waylinesize 32 bytes. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes MIPS secondary cache 256kB, 8-way, linesize 32 bytes. Brought up 2 CPUs Synchronize counters across 2 CPUs: done. NET: Registered protocol family 16 release PCIe RST: RALINK_RSTCTRL = 7000000 PCIE PHY initialize ***** Xtal 40MHz ***** start MT7621 PCIe register access RALINK_RSTCTRL = 7000000 RALINK_CLKCFG1 = 77ffeff8 *************** MT7621 PCIe RC mode ************* PCIE2 no card, disable it(RST&CLK) pcie_link status = 0x3 RALINK_RSTCTRL= 3000000 *** Configure Device number setting of Virtual PCI-PCI bridge *** RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2 PCIE0 enabled PCIE1 enabled interrupt enable status: 300000 Port 1 N_FTS = 1b105000 Port 0 N_FTS = 1b105000 config reg done init_rt2880pci done bio: create slab <bio-0> at 0 pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000) pci 0000:00:01.0: BAR 0: can't assign mem (size 0x80000000) pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff] pci 0000:00:00.0: BAR 9: assigned [mem 0x60100000-0x601fffff pref] pci 0000:00:01.0: BAR 8: assigned [mem 0x60200000-0x602fffff] pci 0000:00:00.0: BAR 1: assigned [mem 0x60300000-0x6030ffff] pci 0000:00:00.0: BAR 1: set to [mem 0x60300000-0x6030ffff] (PCI address [0x60300000-0x6030ffff] pci 0000:00:01.0: BAR 1: assigned [mem 0x60310000-0x6031ffff] pci 0000:00:01.0: BAR 1: set to [mem 0x60310000-0x6031ffff] (PCI address [0x60310000-0x6031ffff] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit] pci 0000:01:00.0: BAR 0: set to [mem 0x60000000-0x600fffff 64bit] (PCI address [0x60000000-0x600fffff] pci 0000:01:00.0: BAR 6: assigned [mem 0x60100000-0x6010ffff pref] pci 0000:00:00.0: PCI bridge to [bus 01-01] pci 0000:00:00.0: bridge window [io disabled] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff] pci 0000:00:00.0: bridge window [mem 0x60100000-0x601fffff pref] pci 0000:02:00.0: BAR 0: assigned [mem 0x60200000-0x602fffff] pci 0000:02:00.0: BAR 0: set to [mem 0x60200000-0x602fffff] (PCI address [0x60200000-0x602fffff] pci 0000:00:01.0: PCI bridge to [bus 02-02] pci 0000:00:01.0: bridge window [io disabled] pci 0000:00:01.0: bridge window [mem 0x60200000-0x602fffff] pci 0000:00:01.0: bridge window [mem pref disabled] PCI: Enabling device 0000:00:00.0 (0004 -> 0006) PCI: Enabling device 0000:00:01.0 (0004 -> 0006) BAR0 at slot 0 = 0 bus=0x0, slot = 0x0 res[0]->start = 0 res[0]->end = 0 res[1]->start = 60300000 res[1]->end = 6030ffff res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 BAR0 at slot 1 = 0 bus=0x0, slot = 0x1 res[0]->start = 0 res[0]->end = 0 res[1]->start = 60310000 res[1]->end = 6031ffff res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 bus=0x1, slot = 0x0, irq=0x4 res[0]->start = 60000000 res[0]->end = 600fffff res[1]->start = 0 res[1]->end = 0 res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 bus=0x2, slot = 0x1, irq=0x18 res[0]->start = 60200000 res[0]->end = 602fffff res[1]->start = 0 res[1]->end = 0 res[2]->start = 0 res[2]->end = 0 res[3]->start = 0 res[3]->end = 0 res[4]->start = 0 res[4]->end = 0 res[5]->start = 0 res[5]->end = 0 Switching to clocksource MIPS NET: Registered protocol family 2 IP route cache hash table entries: 1024 (order: 0, 4096 bytes) TCP established hash table entries: 4096 (order: 3, 32768 bytes) TCP bind hash table entries: 4096 (order: 3, 32768 bytes) TCP: Hash tables configured (established 4096 bind 4096) TCP reno registered UDP hash table entries: 128 (order: 0, 4096 bytes) UDP-Lite hash table entries: 128 (order: 0, 4096 bytes) NET: Registered protocol family 1 4 CPUs re-calibrate udelay(lpj = 1167360) Load Ralink Timer0 Module Load Ralink Timer1 Module Load Ralink Timer2 Module squashfs: version 4.0 (2009/01/31) Phillip Lougher JFFS2 version 2.2 (NAND) (ZLIB) (RTIME) (c) 2001-2006 Red Hat, Inc. msgmni has been set to 245 Block layer SCSI generic (bsg) driver version 0.4 loaded (major 254) io scheduler noop registered (default) HDLC line discipline maxframe=4096 N_HDLC line discipline registered. Ralink gpio driver initialized Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled serial8250: ttyS0 at MMIO 0x1e000d00 (irq = 27) is a 16550A serial8250: ttyS1 at MMIO 0x1e000c00 (irq = 26) is a 16550A brd: module loaded flash manufacture id: c2, device id 20 18 MX25L12805D(c2 2018c220) (16384 Kbytes) mtd .name = raspi, .size = 0x01000000 (16M) .erasesize = 0x00010000 (64K) .numeraseregions = 0 partion 3: ffffffff eb0000 partion 4: 185f00 d7a100 #add mtd partition# Creating 7 MTD partitions on "raspi": 0x000000000000-0x000000030000 : "Bootloader" 0x000000030000-0x000000040000 : "nvram" 0x000000040000-0x000000050000 : "Factory" 0x000000050000-0x000000f00000 : "linux" 0x000000185f00-0x000000f00000 : "rootfs" 0x000000f00000-0x000001000000 : "jffs2" 0x000000000000-0x000001000000 : "ALL" rdm_major = 253 Allocate 4096 entries coherent memory for hw_nat. (327680 bytes) GMAC1_MAC_ADRH -- : 0x0000000c GMAC1_MAC_ADRL -- : 0x432880f5 Ralink APSoC Ethernet Driver Initilization. v3.1 512 rx/tx descriptors allocated, mtu = 1500! GMAC1_MAC_ADRH -- : 0x0000000c GMAC1_MAC_ADRL -- : 0x4328807f PROC INIT OK! PPP generic driver version 2.4.2 PPP Deflate Compression module registered PPP MPPE Compression module registered NET: Registered protocol family 24 PPTP driver version 0.8.5 IMQ driver loaded successfully. Hooking IMQ before NAT on PREROUTING. Hooking IMQ after NAT on POSTROUTING. u32 classifier nf_conntrack version 0.5.0 (1967 buckets, 7868 max) matchsize=262 xt_time: kernel timezone is -0000 GRE over IPv4 demultiplexor driver gre: can't add protocol ip_tables: (C) 2000-2006 Netfilter Core Team, Type=Linux arp_tables: (C) 2002 David S. Miller TCP cubic registered NET: Registered protocol family 10 ip6_tables: (C) 2000-2006 Netfilter Core Team NET: Registered protocol family 17 L2TP core driver, V2.0 PPPoL2TP kernel driver, V2.0 802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com> All bugs added by David S. Miller <davem@redhat.com> VFS: Mounted root (squashfs filesystem) readonly on device 31:4. Freeing unused kernel memory: 216k freed offset 0x1000 elapse 0ms Algorithmics/MIPS FPU Emulator v1.5 1: set_action 0 Hit ENTER for console... firmware version: 3.0.0.4.378_9596-ge704ad0 mtd productid: RT-N56UB1 bootloader version: RT-N56UB1-01-00-00-00 firmware version: 3.0.0.4 odmpid: current FW productid: RT-N56UB1 current FW firmver: 3.0.0.4 clean_mode(1) clean_time(2) threshold(0) free_caches: Start syncing... free_caches: Start cleaning... free_caches: waiting 2 second... free_caches: Finish. [1 init:init_nvram +8] init_nvram for 12 set_basic_ifname_vars: WAN eth3 LAN vlan1 2G ra0 5G rai0 USB usb AP_LAN vlan1 DW_WAN eth3 DW_LAN vlan3 force_dwlan 0, sw_mode 1 wan_ifnames: eth3 bled: GPIO#7: switch ports mask 0. bled: GPIO#16: switch ports mask 0. bled: GPIO#14: netdev ra0. bled: GPIO#15: netdev rai0. bled: GPIO#13: USB BUS mask 3. config_tcode(0x0013): tcode is [EU/01] config_tcode(0x002c): [tcode] add rc_support:[defpsk] num_of_mssid_support(0x0097): [mssid] support [3] mssid size: 26989 bytes (34451 left) Raeth v3.1 (Tasklet,SkbRecycle) phy_free_head is 0x7732000!!! phy_free_tail_phy is 0x7733ff0!!! txd_pool=a7734000 phy_txd_pool=07734000 ei_local->skb_free start address is 0x87dcd494. free_txd: a7734010, ei_local->cpu_ptr: 07734000 POOL HEAD_PTR | DMA_PTR | CPU_PTR ----------------+---------+-------- 0xa7734000 0x07734000 0x07734000 phy_qrx_ring = 0x07730000, qrx_ring = 0xa7730000 phy_rx_ring0 = 0x07736000, rx_ring0 = 0xa7736000 change HW-TRAP to 0x17c8f!!!!!!!!!!!!set LAN/WAN LLLLW GMAC1_MAC_ADRH -- : 0x0000107b GMAC1_MAC_ADRL -- : 0x445581cc GDMA2_MAC_ADRH -- : 0x0000000c GDMA2_MAC_ADRL -- : 0x43288037 eth3: ===> VirtualIF_open MT7621 GE2 link rate to 10M/1G ESW: Link Status Changed - WAN (P4) Link DOWN CDMA_CSG_CFG = 81000000 GDMA1_FWD_CFG = 20710000 GDMA2_FWD_CFG = 20710000 hotplug net INTERFACE=eth3 ACTION=add config_switch(0x0113): link down all ports rtkswitch!!!=8 config_mt7621_esw_LANWANPartition: LAN/WAN/WANS_LAN portmask 0000000f/00000030/00000000 config_mt7621_esw_LANWANPartition: P0 PVID 1 config_mt7621_esw_LANWANPartition: P1 PVID 1 config_mt7621_esw_LANWANPartition: P2 PVID 1 config_mt7621_esw_LANWANPartition: P3 PVID 1 config_mt7621_esw_LANWANPartition: P4 PVID 2 config_mt7621_esw_LANWANPartition: P5 PVID 2 mt7621_vlan_set: idx=1, vid=1, portmap=11110011, stag=0 mt7621_vlan_set: idx=2, vid=2, portmap=00001100, stag=0 config_switch(0x013a): ISP Profile/STB: none/0 config_switch(0x0234): link up wan port(s) register rt2860 === pAd = c0582000, size = 1269952 === <-- RTMPAllocTxRxRingMemory, Status=0 <-- RTMPAllocAdapterBlock, Status=0 pAd->CSRBaseAddress =0xc0480000, csr_addr=0xc0480000! device_id =0x7662 ==>rlt_wlan_chip_onoff(): OnOff:1, Reset= 1, pAd->WlanFunCtrl:0x0, Reg-WlanFunCtrl=0x20a RtmpChipOpsEepromHook::e2p_type=0, inf_Type=5 RtmpEepromGetDefault::e2p_dafault=2 NVM is FLASH mode hotplug net INTERFACE=rai0 ACTION=add register mt_drv === pAd = c0b82000, size = 585128 === <-- RTMPAllocTxRxRingMemory, Status=0 <-- RTMPAllocAdapterBlock, Status=0 pAd->CSRBaseAddress =0xc0a80000, csr_addr=0xc0a80000! device_id =0x7603 RtmpChipOpsHook(502): Not support for HIF_MT yet! mt7603_init()--> mt_bcn_buf_init(224): Not support for HIF_MT yet! <--mt7603_init() hotplug net INTERFACE=ra0 ACTION=add / # 1: check_action 0 start jffs2: 5, 1048576 syslog output directory: /tmp. syslog output directory: /tmp. [1 init:init_main +14] main loop signal/state=17 start_logger: syslog output directory: /tmp. hotplug net INTERFACE=vlan1 ACTION=add update_lan_state(lan_, 0, 0) start_lan: setting up the bridge br0 _ifconfig: name=vlan1 flags=1043 IFUP addr=(null) netmask=(null) start_lan: setting MAC of br0 bridge to 10:7B:44:55:81:CC gen ralink config hotplug net INTERFACE=br0 ACTION=add gen_ralink_config(0x032b)TX_BCN DESC a6762000 size = 320 : RX[0] DESC a6764000 size = 2048 Main BSSID is not multipRX[1] DESC a6765000 size = 2048 le of 4s!warning: 50!!!! Miss some configuration, please check!!!! _ifconfig: name=ra0 cfg_mode=9 fcfg_mode=9 lawmode_band_equal(): Band Equal! gs=1043 IFUP addr=(null) APSDCapable[0]=1 nAPSDCapable[1]=1 eAPSDCapable[2]=1 tAPSDCapable[3]=1 mAPSDCapable[4]=1 aAPSDCapable[5]=1 sAPSDCapable[6]=1 kAPSDCapable[7]=1 =APSDCapable[8]=1 (APSDCapable[9]=1 nuAPSDCapable[10]=1 lAPSDCapable[11]=1 lAPSDCapable[12]=1 )APSDCapable[13]=1 APSDCapable[14]=1 APSDCapable[15]=1 Key1Str is Invalid key length(0) or Type(0) Key2Str is Invalid key length(0) or Type(0) Key3Str is Invalid key length(0) or Type(0) Key4Str is Invalid key length(0) or Type(0) 20150206CmdAddressLenReq:(ret = 0) CmdFwStartReq: override = 1, address = 1048576 CmdStartDLRsp: WiFI FW Download Success AsicDMASchedulerInit(): DMA Scheduler Mode=0(LMAC) CmdPsRetrieveRsp Disable FW PS Supportstatus:1 !!!!! RtmpChipOpsEepromHook::e2p_type=-1061090132, inf_Type=5 efuse_probe: efuse = 10000002 RtmpEepromGetDefault::e2p_dafault=1 RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1 NVM is FLASH mode 1. Phy Mode = 14 @@@ NICReadEEPROMParameters : pAd->FWLoad=0 Country Region from e2p = ffff tssi_1_target_pwr_g_band = 35 2. Phy Mode = 14 3. Phy Mode = 14 NICInitPwrPinCfg(13): Not support for HIF_MT yet! NICInitializeAsic(586): Not support rtmp_mac_sys_reset () for HIF_MT yet! mt_mac_init()--> mt7603_init_mac_cr()--> AsicSetMacMaxLen(1571): Set the Max RxPktLen=1024! <--mt_mac_init() WTBL Segment 1 info: MemBaseAddr/FID:0x28000/0 EntrySize/Cnt:32/128 WTBL Segment 2 info: MemBaseAddr/FID:0x40000/0 EntrySize/Cnt:64/128 WTBL Segment 3 info: MemBaseAddr/FID:0x42000/64 EntrySize/Cnt:64/128 WTBL Segment 4 info: MemBaseAddr/FID:0x44000/128 EntrySize/Cnt:32/128 AntCfgInit(2385): Not support for HIF_MT yet! AsicSendCommandToMcu(3438): Not support for HIF_MT yet! AsicSendCommandToMcu(3438): Not support for HIF_MT yet! AsicSendCommandToMcu(3438): Not support for HIF_MT yet! AsicSendCommandToMcu(3438): Not support for HIF_MT yet! RTMPSetPhyMode(): channel out of range, use first ch=0 MCS Set = ff ff 00 00 01 AsicSetChBusyStat(882): Not support for HIF_MT yet! CmdChannelSwitch: control_chl = 1, central_chl = 1, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#1(2T2R), BBP_BW=0 CmdChannelSwitch: control_chl = 2, central_chl = 2, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#2(2T2R), BBP_BW=0 CmdChannelSwitch: control_chl = 3, central_chl = 3, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#3(2T2R), BBP_BW=0 CmdChannelSwitch: control_chl = 4, central_chl = 4, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#4(2T2R), BBP_BW=0 CmdChannelSwitch: control_chl = 5, central_chl = 5, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#5(2T2R), BBP_BW=0 CmdChannelSwitch: control_chl = 6, central_chl = 6, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#6(2T2R), BBP_BW=0 CmdChannelSwitch: control_chl = 7, central_chl = 7, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#7(2T2R), BBP_BW=0 CmdChannelSwitch: control_chl = 8, central_chl = 8, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#8(2T2R), BBP_BW=0 CmdChannelSwitch: control_chl = 9, central_chl = 9, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#9(2T2R), BBP_BW=0 CmdChannelSwitch: control_chl = 10, central_chl = 10, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#10(2T2R), BBP_BW=0 CmdChannelSwitch: control_chl = 11, central_chl = 11, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#11(2T2R), BBP_BW=0 CmdChannelSwitch: control_chl = 12, central_chl = 12, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#12(2T2R), BBP_BW=0 CmdChannelSwitch: control_chl = 13, central_chl = 13, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#13(2T2R), BBP_BW=0 Channel 1 : Dirty = 98, False CCA = 0, Busy Time = 30262, Skip Channel = FALSE Channel 2 : Dirty = 104, False CCA = 0, Busy Time = 22857, Skip Channel = FALSE Channel 3 : Dirty = 146, False CCA = 0, Busy Time = 18204, Skip Channel = FALSE Channel 4 : Dirty = 112, False CCA = 0, Busy Time = 18765, Skip Channel = FALSE Channel 5 : Dirty = 152, False CCA = 0, Busy Time = 21842, Skip Channel = FALSE Channel 6 : Dirty = 232, False CCA = 0, Busy Time = 42645, Skip Channel = FALSE Channel 7 : Dirty = 184, False CCA = 0, Busy Time = 39971, Skip Channel = FALSE Channel 8 : Dirty = 172, False CCA = 0, Busy Time = 27146, Skip Channel = FALSE Channel 9 : Dirty = 248, False CCA = 0, Busy Time = 30818, Skip Channel = FALSE Channel 10 : Dirty = 206, False CCA = 0, Busy Time = 15878, Skip Channel = FALSE Channel 11 : Dirty = 158, False CCA = 0, Busy Time = 15303, Skip Channel = FALSE Channel 12 : Dirty = 108, False CCA = 0, Busy Time = 26934, Skip Channel = FALSE Channel 13 : Dirty = 92, False CCA = 0, Busy Time = 13581, Skip Channel = FALSE CmdChannelSwitch: control_chl = 1, central_chl = 1, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#1(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l CmdChannelSwitch: control_chl = 2, central_chl = 2, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#2(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l CmdChannelSwitch: control_chl = 3, central_chl = 3, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#3(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l CmdChannelSwitch: control_chl = 4, central_chl = 4, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#4(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l CmdChannelSwitch: control_chl = 5, central_chl = 5, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#5(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l CmdChannelSwitch: control_chl = 6, central_chl = 6, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#6(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l CmdChannelSwitch: control_chl = 7, central_chl = 7, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#7(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l CmdChannelSwitch: control_chl = 8, central_chl = 8, BW = 0, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#8(2T2R), BBP_BW=0 SYNC - BBP R4 to 20MHz.l AsicSetRalinkBurstMode(3752): Not support for HIF_MT yet! RTMPSetPiggyBack(802): Not support for HIF_MT yet! CmdChannelSwitch: control_chl = 1, central_chl = 3, BW = 1, TXStream = 2, RXStream = 2 mt7603_switch_channel(): Switch to Ch#3(2T2R), BBP_BW=1 AsicSetTxPreamble(3738): Not support for HIF_MT yet! AsicSetPreTbtt(): bss_idx=0, PreTBTT timeout = 0xf0 Main bssid = 10:7b:44:55:81:c8 <==== rt28xx_init, Status=0 RT28xx_Monitor_Init: 724 !!!!####!!!!!! [doSystem] iwpriv ra0 set TxPower=100 hotplug net INTERFACE=mon0 ACTION=add hotplug net INTERFACE=wds3 ACTION=add hotplug net INTERFACE=wds1 ACTION=add hotplug net INTERFACE=wds0 ACTION=add hotplug net INTERFACE=wds2 ACTION=add rai0: Network is down ioctl error gen ralink iNIC config gen_ralink_config(0x03build time = 22b)0:1 4M0a4i0n8 0B6S0S6I4D0 ai srom patch for E3 IC nplatform = oAtL PmSu lhw/sw version = t#ip#le patch version = of 4s!warning: 50!!!! Miss some configuration, please check!!!! _ifconfig: name=rai0 flags=1043 IFUP addr=(null) netmask=(null) FW Version:0.0.00 Build:1 Build Time:201411280941____ fw for E3 IC RX[0] DESC a6994000 size = 4096 RX[1] DESC a6995000 size = 4096 RTMP_TimerListAdd: add timer obj c062caf4! RTMP_TimerListAdd: add timer obj c0596210! RTMP_TimerListAdd: add timer obj c0595df4! RTMP_TimerListAdd: add timer obj c05961e0! RTMP_TimerListAdd: add timer obj c059658c! RTMP_TimerListAdd: add timer obj c05962d8! RTMP_TimerListAdd: add timer obj c0596308! RTMP_TimerListAdd: add timer obj c05964c8! RTMP_TimerListAdd: add timer obj c05964f8! RTMP_TimerListAdd: add timer obj c0599568! RTMP_TimerListAdd: add timer obj c059914c! RTMP_TimerListAdd: add timer obj c0599538! RTMP_TimerListAdd: add timer obj c05998e4! RTMP_TimerListAdd: add timer obj c0599630! RTMP_TimerListAdd: add timer obj c0599660! RTMP_TimerListAdd: add timer obj c0599820! RTMP_TimerListAdd: add timer obj c0599850! RTMP_TimerListAdd: add timer obj c059c8c0! RTMP_TimerListAdd: add timer obj c059c4a4! RTMP_TimerListAdd: add timer obj c059c890! RTMP_TimerListAdd: add timer obj c059cc3c! RTMP_TimerListAdd: add timer obj c059c988! RTMP_TimerListAdd: add timer obj c059c9b8! RTMP_TimerListAdd: add timer obj c059cb78! RTMP_TimerListAdd: add timer obj c059cba8! RTMP_TimerListAdd: add timer obj c059fc18! RTMP_TimerListAdd: add timer obj c059f7fc! RTMP_TimerListAdd: add timer obj c059fbe8! RTMP_TimerListAdd: add timer obj c059ff94! RTMP_TimerListAdd: add timer obj c059fce0! RTMP_TimerListAdd: add timer obj c059fd10! RTMP_TimerListAdd: add timer obj c059fed0! RTMP_TimerListAdd: add timer obj c059ff00! RTMP_TimerListAdd: add timer obj c05a2f70! RTMP_TimerListAdd: add timer obj c05a2b54! RTMP_TimerListAdd: add timer obj c05a2f40! RTMP_TimerListAdd: add timer obj c05a32ec! RTMP_TimerListAdd: add timer obj c05a3038! RTMP_TimerListAdd: add timer obj c05a3068! RTMP_TimerListAdd: add timer obj c05a3228! RTMP_TimerListAdd: add timer obj c05a3258! RTMP_TimerListAdd: add timer obj c05a62c8! RTMP_TimerListAdd: add timer obj c05a5eac! RTMP_TimerListAdd: add timer obj c05a6298! RTMP_TimerListAdd: add timer obj c05a6644! RTMP_TimerListAdd: add timer obj c05a6390! RTMP_TimerListAdd: add timer obj c05a63c0! RTMP_TimerListAdd: add timer obj c05a6580! RTMP_TimerListAdd: add timer obj c05a65b0! flush result = ffffff check pse fid Q7:set_get_fid, q_idx:7 empty!! RTMP_TimerListAdd: add timer obj c05a9620! RTMP_TimerListAdd: add timer obj c05a9204! RTMP_TimerListAdd: add timer obj c05a95f0! RTMP_TimerListAdd: add timer obj c05a999c! RTMP_TimerListAdd: add timer obj c05a96e8! RTMP_TimerListAdd: add timer obj c05a9718! RTMP_TimerListAdd: add timer obj c05a98d8! RTMP_TimerListAdd: add timer obj c05a9908! RTMP_TimerListAdd: add timer obj c05ac978! RTMP_TimerListAdd: add timer obj c05ac55c! RTMP_TimerListAdd: add timer obj c05ac948! RTMP_TimerListAdd: add timer obj c05accf4! RTMP_TimerListAdd: add timer obj c05aca40! RTMP_TimerListAdd: add timer obj c05aca70! RTMP_TimerListAdd: add timer obj c05acc30! RTMP_TimerListAdd: add timer obj c05acc60! RTMP_TimerListAdd: add timer obj c05d8844! RTMP_TimerListAdd: add timer obj c05d8960! RTMP_TimerListAdd: add timer obj c05d8870! RTMP_TimerListAdd: add timer obj c05c6af4! cfg_mode=14 cfg_mode=14 wmode_band_equal(): Band Not Equal! APSDCapable[0]=1 APSDCapable[1]=1 APSDCapable[2]=1 APSDCapable[3]=1 APSDCapable[4]=1 APSDCapable[5]=1 APSDCapable[6]=1 APSDCapable[7]=1 APSDCapable[8]=1 APSDCapable[9]=1 APSDCapable[10]=1 APSDCapable[11]=1 APSDCapable[12]=1 APSDCapable[13]=1 APSDCapable[14]=1 APSDCapable[15]=1 pAd->ed_false_cca_threshold = 1 Key1Str is Invalid key length(0) or Type(0) Key2Str is Invalid key length(0) or Type(0) Key3Str is Invalid key length(0) or Type(0) Key4Str is Invalid key length(0) or Type(0) 1. Phy Mode = 49 get_chl_grp:illegal channel (167) get_chl_grp:illegal channel (167) get_chl_grp:illegal channel (169) get_chl_grp:illegal channel (169) get_chl_grp:illegal channel (171) get_chl_grp:illegal channel (171) get_chl_grp:illegal channel (173) get_chl_grp:illegal channel (173) Country Region from e2p = ffff mt76x2_read_temp_info_from_eeprom:: is_temp_tx_alc=1, temp_tx_alc_enable=1 mt76x2_read_tx_alc_info_from_eeprom:: is_ePA_mode=1, ePA_type=1 mt76x2_read_tx_alc_info_from_eeprom:: [5G band] high_temp_slope=15, low_temp_slope=9 mt76x2_read_tx_alc_info_from_eeprom:: [2G band] high_temp_slope=0, low_temp_slope=0 mt76x2_read_tx_alc_info_from_eeprom:: [5G band] tc_lower_bound=-7, tc_upper_bound=4 mt76x2_read_tx_alc_info_from_eeprom:: [2G band] tc_lower_bound=0, tc_upper_bound=0 mt76x2_get_external_lna_gain::LNA type=0x1, BLNAGain=0xffffff8c, ALNAGain0=0xffffff8a, ALNAGain1=0xffffff8a, ALNAGain2=0xffffff8d 2. Phy Mode = 49 RTMP_TimerListAdd: add timer obj c0593620! RTMP_TimerListAdd: add timer obj c0596978! RTMP_TimerListAdd: add timer obj c0599cd0! RTMP_TimerListAdd: add timer obj c059d028! RTMP_TimerListAdd: add timer obj c05a0380! RTMP_TimerListAdd: add timer obj c05a36d8! RTMP_TimerListAdd: add timer obj c05a6a30! RTMP_TimerListAdd: add timer obj c05a9d88! RTMP_TimerListAdd: add timer obj c05c6804! 3. Phy Mode = 49 andes_pci_fw_init 0x1300 = 00073200 AntCfgInit: primary/secondary ant 0/1 andes_load_cr:cr_type(2) ChipStructAssign(): MT76x2 hook ! RTMPSetPhyMode: channel is out of range, use first channel=0 MCS Set = ff ff 00 00 01 mt76x2_single_sku::DefaultTargetPwr = 37 mt76x2_single_sku::DefaultTargetPwr = 0x25, delta_power = 0x0 mt76x2_single_sku::sku_base_pwr = 0x1e, DefaultTargetPwr = 0x25, ch_pwr_adj = 0xfffffff9(-7), 0x13B4: 0x1b0f0439 mt76x2_single_sku::DefaultTargetPwr = 37 mt76x2_single_sku::DefaultTargetPwr = 0x25, delta_power = 0x0 mt76x2_single_sku::sku_base_pwr = 0x1e, DefaultTargetPwr = 0x25, ch_pwr_adj = 0xfffffff9(-7), 0x13B4: 0x1b0f0439 mt76x2_single_sku::DefaultTargetPwr = 37 mt76x2_single_sku::DefaultTargetPwr = 0x25, delta_power = 0x0 mt76x2_single_sku::sku_base_pwr = 0x1e, DefaultTargetPwr = 0x25, ch_pwr_adj = 0xfffffff9(-7), 0x13B4: 0x1b0f0439 mt76x2_single_sku::DefaultTargetPwr = 37 mt76x2_single_sku::DefaultTargetPwr = 0x25, delta_power = 0x0 mt76x2_single_sku::sku_base_pwr = 0x1e, DefaultTargetPwr = 0x25, ch_pwr_adj = 0xfffffff9(-7), 0x13B4: 0x1b0f0439 mt76x2_single_sku::DefaultTargetPwr = 37 mt76x2_single_sku::DefaultTargetPwr = 0x25, delta_power = 0x0 mt76x2_single_sku::sku_base_pwr = 0x18, DefaultTargetPwr = 0x25, ch_pwr_adj = 0xfffffff3(-13), 0x13B4: 0x1b0f0433 mt76x2_single_sku::DefaultTargetPwr = 37 mt76x2_single_sku::DefaultTargetPwr = 0x25, delta_power = 0x0 mt76x2_single_sku::sku_base_pwr = 0x18, DefaultTargetPwr = 0x25, ch_pwr_adj = 0xfffffff3(-13), 0x13B4: 0x1b0f0433 mt76x2_single_sku::DefaultTargetPwr = 37 mt76x2_single_sku::DefaultTargetPwr = 0x25, delta_power = 0x0 mt76x2_single_sku::sku_base_pwr = 0x18, DefaultTargetPwr = 0x25, ch_pwr_adj = 0xfffffff3(-13), 0x13B4: 0x1b0f0433 mt76x2_single_sku::DefaultTargetPwr = 37 mt76x2_single_sku::DefaultTargetPwr = 0x25, delta_power = 0x0 mt76x2_single_sku::sku_base_pwr = 0x18, DefaultTargetPwr = 0x25, ch_pwr_adj = 0xfffffff3(-13), 0x13B4: 0x1b0f0433 mt76x2_single_sku::DefaultTargetPwr = 37 mt76x2_single_sku::DefaultTargetPwr = 0x25, delta_power = 0x0 mt76x2_single_sku::sku_base_pwr = 0x24, DefaultTargetPwr = 0x25, ch_pwr_adj = 0xffffffff(-1), 0x13B4: 0x1b0f043f mt76x2_single_sku::DefaultTargetPwr = 37 mt76x2_single_sku::DefaultTargetPwr = 0x25, delta_power = 0x0 mt76x2_single_sku::sku_base_pwr = 0x24, DefaultTargetPwr = 0x25, ch_pwr_adj = 0xffffffff(-1), 0x13B4: 0x1b0f043f mt76x2_single_sku::DefaultTargetPwr = 37 mt76x2_single_sku::DefaultTargetPwr = 0x25, delta_power = 0x0 mt76x2_single_sku::sku_base_pwr = 0x24, DefaultTargetPwr = 0x25, ch_pwr_adj = 0xffffffff(-1), 0x13B4: 0x1b0f043f mt76x2_single_sku::DefaultTargetPwr = 37 mt76x2_single_sku::DefaultTargetPwr = 0x25, delta_power = 0x0 mt76x2_single_sku::sku_base_pwr = 0x24, DefaultTargetPwr = 0x25, ch_pwr_adj = 0xffffffff(-1), 0x13B4: 0x1b0f043f mt76x2_single_sku::DefaultTargetPwr = 37 mt76x2_single_sku::DefaultTargetPwr = 0x25, delta_power = 0x0 mt76x2_single_sku::sku_base_pwr = 0x24, DefaultTargetPwr = 0x25, ch_pwr_adj = 0xffffffff(-1), 0x13B4: 0x1b0f043f mt76x2_single_sku::DefaultTargetPwr = 37 mt76x2_single_sku::DefaultTargetPwr = 0x25, delta_power = 0x0 mt76x2_single_sku::sku_base_pwr = 0x24, DefaultTargetPwr = 0x25, ch_pwr_adj = 0xffffffff(-1), 0x13B4: 0x1b0f043f mt76x2_single_sku::DefaultTargetPwr = 37 mt76x2_single_sku::DefaultTargetPwr = 0x25, delta_power = 0x0 mt76x2_single_sku::sku_base_pwr = 0x24, DefaultTargetPwr = 0x25, ch_pwr_adj = 0xffffffff(-1), 0x13B4: 0x1b0f043f mt76x2_single_sku::DefaultTargetPwr = 37 mt76x2_single_sku::DefaultTargetPwr = 0x25, delta_power = 0x0 mt76x2_single_sku::sku_base_pwr = 0x24, DefaultTargetPwr = 0x25, ch_pwr_adj = 0xffffffff(-1), 0x13B4: 0x1b0f043f RTMP_TimerListAdd: add timer obj c05d02fc! mt76x2_bbp_adjust():rf_bw=2, ext_ch=1, PrimCh=44, HT-CentCh=46, VHT-CentCh=42 mt76x2_single_sku::DefaultTargetPwr = 37 mt76x2_single_sku::DefaultTargetPwr = 0x25, delta_power = 0x0 mt76x2_single_sku::sku_base_pwr = 0x1e, DefaultTargetPwr = 0x25, ch_pwr_adj = 0xfffffff9(-7), 0x13B4: 0x1b0f0439 APStartUp(): AP Set CentralFreq at 42(Prim=44, HT-CentCh=46, VHT-CentCh=42, BBP_BW=2) mt76x2_calibration(channel = 42) @@@ ed_monitor_init : ===> RTMP_TimerListAdd: add timer obj c06b8064! @@@ ed_monitor_init : <=== Main bssid = 10:7b:44:55:81:cc mt76x2_reinit_agc_gain:original agc_vga0 = 0x4c, agc_vga1 = 0x4c mt76x2_reinit_agc_gain:updated agc_vga0 = 0x4c, agc_vga1 = 0x4c mt76x2_reinit_hi_lna_gain:original hi_lna0 = 0x31, hi_lna1 = 0x31 mt76x2_reinit_hi_lna_gain:updated hi_lna0 = 0x31, hi_lna1 = 0x31 original vga value(chain0) = 4c original vga value(chain1) = 4c <==== rt28xx_init, Status=0 RT28xx_Monitor_Init: 598 !!!!####!!!!!! RTMPDrvOpen(1):Check if PDMA is idle! RTMPDrvOpen(2):Check if PDMA is idle! @@@ ed_monitor_init : ===> @@@ ed_monitor_init : <=== [doSystem] iwpriv rai0 set TxPower=100 _ifconfig: name=br0 flags=1043 IFUP addr=192.168.1.1 netmask=255.255.255.0 _ifconfig: name=lo flags=1043 IFUP addr=127.0.0.1 netmask=255.0.0.0 route_manip: cmd=ADD name=lo addr=127.0.0.0 netmask=255.0.0.0 gateway=0.0.0.0 metric=0 update_lan_state(lan_, 2, 0) hotplug net INTERFACE=wdsi3 ACTION=add hotplug net INTERFACE=wdsi2 ACTION=add hotplug net INTERFACE=moni0 ACTION=add hotplug net INTERFACE=wdsi0 ACTION=add hotplug net INTERFACE=wdsi1 ACTION=add stop_nat_rules: apply the redirect_rules! start_lan 1943 start_services 3632 start_wsc_pin_enrollee: start wsc (0) [doSystem] iwpriv ra0 set WscConfMode=7 WPS: PIN [doSystem] iwpriv ra0 set WscMode=1 # wanduck: Got LAN(-1) information: # Enable direct rule [1 init:start_dnsmasq +27] begin [1 init:stop_dnsmasq +27] begin [1 init:stop_dnsmasq +27] end [1 init:start_dnsmasq +27] end start_lan_port(0) 1 rtkswitch!!!=14 [doSystem] iwpriv ra0 set WatchdogPid=238 set watchdog pid as: 238 [doSystem] iwpriv rai0 set WatchdogPid=238 set watchdog pid as: 238 TZ watchdog decomp: fname=/var/lib/misc/rstats-speed.gz decomp: gzip -dc /var/lib/misc/rstats-speed.gz > /var/tmp/rstats-uncomp != 0 load: speed_count = 0 load: read source= save_path= load_history: fname=/var/lib/misc/rstats-history.gz decomp: fname=/var/lib/misc/rstats-history.gz decomp: gzip -dc /var/lib/misc/rstats-history.gz > /var/tmp/rstats-uncomp != 0 decomp: fname=/var/lib/misc/rstats-history.gz decomp: gzip -dc /var/lib/misc/rstats-history.gz > /var/tmp/rstats-uncomp != 0 load_history: load failed start_pptpd: getpid= 1 reinit_hwnat:DUALWAN: unit -1,0 type 0 iptv [none] nat_x -1 qos 0 wans_mode fo link 1,1: action 1. hw_nat: module license 'Proprietary' taints kernel. Disabling lock debugging due to kernel taint hwnat_wifi = 1 start_wan:GDMA2_MAC_ADRH -- : 0x0000107b GDMA2_MAC_ADRL -- : 0x445581c8 eth3: ===> VirtualIF_open [1 init:start_wan_if +29] unit=0. update_wan_state(wan0_, 0, 0) convert_wan_nvram(wan0_) _ifconfig: name=eth3 flags=0000 addr=(null) netmask=(null) ** wan_ifname: eth3 is NOT UP _ifconfig: name=eth3 flags=1043 IFUP addr=(null) netmask=(null) update_wan_state(wan0_, 1, 0) _ifconfig: name=eth3 flags=1043 IFUP addr=(null) netmask=(null) start_auth:: done start_wan_if(): End. start_usb udhcpc_wan:: deconfig _ifconfig: name=eth3 flags=1043 IFUP addr=0.0.0.0 netmask=(null) wan_down(eth3) wan_down(eth3): . stop_auth:: done route_manip: cmd=DEL name=eth3 addr=0.0.0.0 netmask=0.0.0.0 gateway=(null) metric=0 update_wan_state(wan0_, 3, 0) update_wan_state(wan0_, 4, 3) udhcpc:: deconfig done FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) FM_OUT value: u4FmOut = 0(0x00000000) clean_mode(1) clean_time(2) threshold(0) free_caches: Start syncing... free_caches: Start cleaning... free_caches: waiting 2 second... free_caches: Finish. [1 init:init_main +33] main loop signal/state=14 udhcpc_wan:: leasefail


=================================================================== MT7621 stage1 code 10:33:55 (ASIC) CPU=500000000 HZ BUS=166666666 HZ ================================================================== Change MPLL source from XTAL to CR... do MEMPLL setting.. MEMPLL Config : 0x11000000 3PLL mode + External loopback === XTAL-40Mhz === DDR-1200Mhz === PLL3 FB_DL: 0xa, 1/0 = 551/473 29000000 PLL2 FB_DL: 0xc, 1/0 = 576/448 31000000 PLL4 FB_DL: 0x12, 1/0 = 628/396 49000000 do DDR setting..[01F40000] Apply DDR3 Setting...(use default AC) 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120 -------------------------------------------------------------------------------- 0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 000E:| 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 000F:| 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0010:| 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0011:| 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 rank 0 coarse = 16 rank 0 fine = 40 B:| 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 opt_dle value:8 DRAMC_R0DELDLY[018]=0000201F ================================================================== RX DQS perbit delay software calibration ================================================================== 1.0-15 bit dq delay value ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 11 9 12 10 11 10 11 8 9 9 10 | 11 11 11 14 10 11 -------------------------------------- ================================================================== 2.dqs window x=pass dqs delay value (min~max)center y=0-7bit DQ of every group input delay:DQS0 =31 DQS1 = 32 ================================================================== bit DQS0 bit DQS1 0 (1~62)31 8 (2~61)31 1 (1~61)31 9 (1~62)31 2 (1~61)31 10 (1~62)31 3 (1~58)29 11 (1~58)29 4 (1~62)31 12 (1~62)31 5 (1~62)31 13 (2~62)32 6 (1~62)31 14 (1~62)31 7 (1~62)31 15 (1~62)31 ================================================================== 3.dq delay value last ================================================================== bit| 0 1 2 3 4 5 6 7 8 9 -------------------------------------- 0 | 11 9 12 12 11 10 11 8 10 10 10 | 12 14 12 14 11 12 ================================================================== ================================================================== TX perbyte calibration ================================================================== DQS loop = 15, cmp_err_1 = ffff0000 dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1 dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2 DQ loop=15, cmp_err_1 = ffff0080 dqs_perbyte_dly.last_dqdly_pass[1]=15, finish count=1 DQ loop=14, cmp_err_1 = ffff0000 dqs_perbyte_dly.last_dqdly_pass[0]=14, finish count=2 byte:0, (DQS,DQ)=(8,8) byte:1, (DQS,DQ)=(8,8) 20,data:88 [EMI] DRAMC calibration passed =================================================================== MT7621 stage1 code done CPU=500000000 HZ BUS=166666666 HZ =================================================================== U-Boot 1.1.3 (Dec 18 2014 - 16:18:02) RT-N56UB1 bootloader version: 1.0.0.0 Board: Ralink APSoC DRAM: 128 MB ASUS RT-N56UB1 gpio init : wps / reset pin Config XHCI 40M PLL ****************************** Software System Reset Occurred ****************************** flash manufacture id: c2, device id 20 18 find flash: MX25L12805D raspi_read: from:30000 len:1000 Maximum malloc length: 1024 KBytes mem_malloc_start/brk/end: 0x87eb3000/87eb5000/87fb4000 *** Warning - bad CRC, using default environment ============================================ Ralink UBoot Version: 4.3.0.0 -------------------------------------------- ASIC 7621_MP (MAC to MT7530 Mode) ASIC MT7621AS (MAC to MT7530 Mode) DRAM_CONF_FROM: Auto-Detection DRAM_TYPE: DDR3 DRAM bus: 16 bit Xtal Mode=3 OCP Ratio=1/3 Flash component: SPI Flash Date:Dec 18 2014 Time:16:18:02 ============================================ icache: sets:256, ways:4, linesz:32 ,total:32768 dcache: sets:256, ways:4, linesz:32 ,total:32768 #Reset_MT7530 set LAN/WAN WLLLL Please choose the operation: 1: Load System code to SDRAM via TFTP. 2: Load System code then write to Flash via TFTP. 3: Boot System code via Flash (default). 4: Entr boot command line interface. 8: Load Boot Loader code to SDRAM via TFTP. 9: Load Boot Loader code then write to Flash via TFTP. 0 3: System Boot System code via Flash. raspi_read: from:4018a len:4 RT-N56UB1 bootloader version: 1.0.0.0 raspi_read: from:40004 len:6 MAC Address: 10:7B:44:55:81:C8 raspi_read: from:40004 len:6 ## Checking 1st firmware at bfc50000 ... raspi_read: from:50000 len:40 Image Name: MIPS OpenWrt Linux-5.4.80 Image Type: MIPS Linux Kernel Image (lzma compressed) Data Size: 2484038 Bytes = 2.4 MB Load Address: 80001000 Entry Point: 80001000 raspi_read: from:50040 len:25e746 Verifying Checksum ... OK Uncompressing Kernel Image ... OK ## Giving linux ramsize: 134217728 (128 MB) Starting kernel ... [ 0.000000] Linux version 5.4.80 (builder@buildhost) (gcc version 8.4.0 (OpenWrt GCC 8.4.0 r15104-451c1eb8c2)) #0 SMP Sun Nov 29 01:12:36 2020 [ 0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3 [ 0.000000] printk: bootconsole [early0] enabled [ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc) [ 0.000000] MIPS: machine is ASUS RT-N56U B1 [ 0.000000] Initrd not found or empty - disabling initrd [ 0.000000] VPE topology {2} total 2 [ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. [ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes [ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. [ 0.000000] Zone ranges: [ 0.000000] Normal [mem 0x0000000000000000-0x0000000007ffffff] [ 0.000000] HighMem empty [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000000000000-0x0000000007ffffff] [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff] [ 0.000000] percpu: Embedded 14 pages/cpu s26768 r8192 d22384 u57344 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 32480 [ 0.000000] Kernel command line: console=ttyS0,115200 rootfstype=squashfs,jffs2 [ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes, linear) [ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes, linear) [ 0.000000] Writing ErrCtl register=00000000 [ 0.000000] Readback ErrCtl register=00000000 [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off [ 0.000000] Memory: 120696K/131072K available (5946K kernel code, 210K rwdata, 1276K rodata, 1260K init, 238K bss, 10376K reserved, 0K cma-reserved, 0K highmem) [ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] rcu: Hierarchical RCU implementation. [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2. [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies. [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2 [ 0.000000] NR_IRQS: 256 [ 0.000000] random: get_random_bytes called from start_kernel+0x340/0x558 with crng_init=0 [ 0.000000] CPU Clock: 880MHz [ 0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns [ 0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4343773742 ns [ 0.000008] sched_clock: 32 bits at 440MHz, resolution 2ns, wraps every 4880645118ns [ 0.007790] Calibrating delay loop... 583.68 BogoMIPS (lpj=1167360) [ 0.041952] pid_max: default: 32768 minimum: 301 [ 0.046691] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.053908] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.063902] rcu: Hierarchical SRCU implementation. [ 0.069137] smp: Bringing up secondary CPUs ... [ 0.074862] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. [ 0.074871] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes [ 0.074882] MIPS secondary cache 256kB, 8-way, linesize 32 bytes. [ 0.074974] CPU1 revision is: 0001992f (MIPS 1004Kc) [ 0.101771] Synchronize counters for CPU 1: done. [ 0.131681] smp: Brought up 1 node, 2 CPUs [ 0.139914] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns [ 0.149608] futex hash table entries: 512 (order: 2, 16384 bytes, linear) [ 0.156517] pinctrl core: initialized pinctrl subsystem [ 0.163643] NET: Registered protocol family 16 [ 0.201195] workqueue: max_active 576 requested for napi_workq is out of range, clamping between 1 and 512 [ 0.212761] clocksource: Switched to clocksource GIC [ 0.219266] NET: Registered protocol family 2 [ 0.224589] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes, linear) [ 0.233012] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.240597] TCP bind hash table entries: 1024 (order: 1, 8192 bytes, linear) [ 0.247595] TCP: Hash tables configured (established 1024 bind 1024) [ 0.254043] UDP hash table entries: 256 (order: 1, 8192 bytes, linear) [ 0.260517] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear) [ 0.267674] NET: Registered protocol family 1 [ 0.271990] PCI: CLS 0 bytes, default 32 [ 0.364759] 4 CPUs re-calibrate udelay(lpj = 1163264) [ 0.371585] workingset: timestamp_bits=14 max_order=15 bucket_order=1 [ 0.391237] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.397052] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc. [ 0.411058] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 251) [ 0.421020] mt7621_gpio 1e000600.gpio: registering 32 gpios [ 0.426894] mt7621_gpio 1e000600.gpio: registering 32 gpios [ 0.432770] mt7621_gpio 1e000600.gpio: registering 32 gpios [ 0.439152] Serial: 8250/16550 driver, 16 ports, IRQ sharing enabled [ 0.449635] printk: console [ttyS0] disabled [ 0.453974] 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 15, base_baud = 3125000) is a 16550A [ 0.462972] printk: console [ttyS0] enabled [ 0.462972] printk: console [ttyS0] enabled [ 0.471234] printk: bootconsole [early0] disabled [ 0.471234] printk: bootconsole [early0] disabled [ 0.483664] spi-mt7621 1e000b00.spi: sys_freq: 220000000 [ 0.490115] spi-nor spi0.0: mx25l12805d (16384 Kbytes) [ 0.495359] 4 fixed-partitions partitions found on MTD device spi0.0 [ 0.501718] Creating 4 MTD partitions on "spi0.0": [ 0.506521] 0x000000000000-0x000000030000 : "u-boot" [ 0.513053] 0x000000030000-0x000000040000 : "config" [ 0.519479] 0x000000040000-0x000000050000 : "factory" [ 0.526033] 0x000000050000-0x000001000000 : "firmware" [ 0.532861] 2 uimage-fw partitions found on MTD device firmware [ 0.538790] Creating 2 MTD partitions on "firmware": [ 0.543758] 0x000000000000-0x00000025e786 : "kernel" [ 0.550207] 0x00000025e786-0x000000fb0000 : "rootfs" [ 0.556582] mtd: device 5 (rootfs) set to be root filesystem [ 0.562390] 1 squashfs-split partitions found on MTD device rootfs [ 0.568619] 0x000000520000-0x000000fb0000 : "rootfs_data" [ 0.576496] libphy: Fixed MDIO Bus: probed [ 0.607207] libphy: mdio: probed [ 0.610694] mt7530 mdio-bus:1f: MT7530 adapts as multi-chip module [ 0.620213] mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 17 [ 0.630672] mt7621-pci 1e140000.pcie: Parsing DT failed [ 0.637133] random: fast init done [ 0.638929] NET: Registered protocol family 10 [ 0.646719] Segment Routing with IPv6 [ 0.650542] NET: Registered protocol family 17 [ 0.655064] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this. [ 0.668256] 8021q: 802.1Q VLAN Support v1.8 [ 0.674883] mt7530 mdio-bus:1f: MT7530 adapts as multi-chip module [ 0.693015] libphy: dsa slave smi: probed [ 0.697475] mt7530 mdio-bus:1f lan4 (uninitialized): PHY [dsa-0.0:00] driver [Generic PHY] [ 0.707280] mt7530 mdio-bus:1f lan3 (uninitialized): PHY [dsa-0.0:01] driver [Generic PHY] [ 0.717242] mt7530 mdio-bus:1f lan2 (uninitialized): PHY [dsa-0.0:02] driver [Generic PHY] [ 0.726997] mt7530 mdio-bus:1f lan1 (uninitialized): PHY [dsa-0.0:03] driver [Generic PHY] [ 0.736910] mt7530 mdio-bus:1f wan (uninitialized): PHY [dsa-0.0:04] driver [Generic PHY] [ 0.746650] mt7530 mdio-bus:1f: configuring for fixed/rgmii link mode [ 0.757865] DSA: tree 0 setup [ 0.761201] rt2880-pinmux pinctrl: pcie is already enabled [ 0.766699] mt7621-pci 1e140000.pcie: Error applying setting, reverse things back [ 0.774311] mt7621-pci-phy 1e149000.pcie-phy: PHY for 0xbe149000 (dual port = 1) [ 0.781890] mt7621-pci-phy 1e14a000.pcie-phy: PHY for 0xbe14a000 (dual port = 0) [ 0.889160] mt7621-pci-phy 1e149000.pcie-phy: Xtal is 40MHz [ 0.894752] mt7621-pci-phy 1e14a000.pcie-phy: Xtal is 40MHz [ 1.000110] mt7621-pci 1e140000.pcie: pcie2 no card, disable it (RST & CLK) [ 1.007068] mt7621-pci 1e140000.pcie: PCIE0 enabled [ 1.011946] mt7621-pci 1e140000.pcie: PCIE1 enabled [ 1.016831] mt7621-pci 1e140000.pcie: PCI coherence region base: 0x60000000, mask/settings: 0xf0000002 [ 1.026293] mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00 [ 1.032667] pci_bus 0000:00: root bus resource [io 0x1e160000-0x1e16ffff] [ 1.039537] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff] [ 1.046413] pci_bus 0000:00: root bus resource [bus 00-ff] [ 1.051939] pci 0000:00:00.0: [0e8d:0801] type 01 class 0x060400 [ 1.057974] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x7fffffff] [ 1.064244] pci 0000:00:00.0: reg 0x14: [mem 0x60400000-0x6040ffff] [ 1.070583] pci 0000:00:00.0: supports D1 [ 1.074600] pci 0000:00:00.0: PME# supported from D0 D1 D3hot [ 1.080765] pci 0000:00:01.0: [0e8d:0801] type 01 class 0x060400 [ 1.086802] pci 0000:00:01.0: reg 0x10: [mem 0x00000000-0x7fffffff] [ 1.093079] pci 0000:00:01.0: reg 0x14: [mem 0x60410000-0x6041ffff] [ 1.099401] pci 0000:00:01.0: supports D1 [ 1.103413] pci 0000:00:01.0: PME# supported from D0 D1 D3hot [ 1.110721] pci 0000:01:00.0: [14c3:7662] type 00 class 0x028000 [ 1.116817] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000fffff 64bit] [ 1.123636] pci 0000:01:00.0: reg 0x30: [mem 0x00000000-0x0000ffff pref] [ 1.130434] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold [ 1.137888] pci 0000:00:00.0: PCI bridge to [bus 01-ff] [ 1.143127] pci 0000:00:00.0: bridge window [io 0x0000-0x0fff] [ 1.149219] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff] [ 1.156003] pci 0000:00:00.0: bridge window [mem 0x60100000-0x601fffff pref] [ 1.163221] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 [ 1.170060] pci 0000:02:00.0: [14c3:7603] type 00 class 0x028000 [ 1.176118] pci 0000:02:00.0: reg 0x10: [mem 0x00000000-0x000fffff] [ 1.182517] pci 0000:02:00.0: PME# supported from D0 D3hot D3cold [ 1.189985] pci 0000:00:01.0: PCI bridge to [bus 02-ff] [ 1.195233] pci 0000:00:01.0: bridge window [io 0x0000-0x0fff] [ 1.201325] pci 0000:00:01.0: bridge window [mem 0x60200000-0x602fffff] [ 1.208110] pci 0000:00:01.0: bridge window [mem 0x60300000-0x603fffff pref] [ 1.215327] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 02 [ 1.221981] pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000] [ 1.228589] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000] [ 1.235547] pci 0000:00:01.0: BAR 0: no space for [mem size 0x80000000] [ 1.242157] pci 0000:00:01.0: BAR 0: failed to assign [mem size 0x80000000] [ 1.249117] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff] [ 1.255904] pci 0000:00:00.0: BAR 9: assigned [mem 0x60100000-0x601fffff pref] [ 1.263120] pci 0000:00:01.0: BAR 8: assigned [mem 0x60200000-0x602fffff] [ 1.269908] pci 0000:00:01.0: BAR 9: assigned [mem 0x60300000-0x603fffff pref] [ 1.277127] pci 0000:00:00.0: BAR 1: assigned [mem 0x60400000-0x6040ffff] [ 1.283917] pci 0000:00:01.0: BAR 1: assigned [mem 0x60410000-0x6041ffff] [ 1.290704] pci 0000:00:00.0: BAR 7: assigned [io 0x1e160000-0x1e160fff] [ 1.297499] pci 0000:00:01.0: BAR 7: assigned [io 0x1e161000-0x1e161fff] [ 1.304292] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit] [ 1.311606] pci 0000:01:00.0: BAR 6: assigned [mem 0x60100000-0x6010ffff pref] [ 1.318823] pci 0000:00:00.0: PCI bridge to [bus 01] [ 1.323792] pci 0000:00:00.0: bridge window [io 0x1e160000-0x1e160fff] [ 1.330575] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff] [ 1.337360] pci 0000:00:00.0: bridge window [mem 0x60100000-0x601fffff pref] [ 1.344584] pci 0000:02:00.0: BAR 0: assigned [mem 0x60200000-0x602fffff] [ 1.351369] pci 0000:00:01.0: PCI bridge to [bus 02] [ 1.356337] pci 0000:00:01.0: bridge window [io 0x1e161000-0x1e161fff] [ 1.363121] pci 0000:00:01.0: bridge window [mem 0x60200000-0x602fffff] [ 1.369906] pci 0000:00:01.0: bridge window [mem 0x60300000-0x603fffff pref] [ 1.377863] hctosys: unable to open rtc device (rtc0) [ 1.385231] mt7530 mdio-bus:1f: Link is Up - 1Gbps/Full - flow control off [ 1.388550] VFS: Mounted root (squashfs filesystem) readonly on device 31:5. [ 1.403596] Freeing unused kernel memory: 1260K [ 1.408153] This architecture does not have kernel memory protection. [ 1.414583] Run /sbin/init as init process [ 1.895096] init: Console is alive [ 1.898759] init: - watchdog - [ 2.573715] kmodloader: loading kernel modules from /etc/modules-boot.d/* [ 2.669296] usbcore: registered new interface driver usbfs [ 2.674922] usbcore: registered new interface driver hub [ 2.680378] usbcore: registered new device driver usb [ 2.695263] xhci-mtk 1e1c0000.xhci: 1e1c0000.xhci supply vbus not found, using dummy regulator [ 2.704087] xhci-mtk 1e1c0000.xhci: 1e1c0000.xhci supply vusb33 not found, using dummy regulator [ 2.713066] xhci-mtk 1e1c0000.xhci: xHCI Host Controller [ 2.718417] xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 1 [ 2.732954] xhci-mtk 1e1c0000.xhci: hcc params 0x01401198 hci version 0x96 quirks 0x0000000000210010 [ 2.742179] xhci-mtk 1e1c0000.xhci: irq 16, io mem 0x1e1c0000 [ 2.749372] hub 1-0:1.0: USB hub found [ 2.753294] hub 1-0:1.0: 2 ports detected [ 2.758006] xhci-mtk 1e1c0000.xhci: xHCI Host Controller [ 2.763423] xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 2 [ 2.770943] xhci-mtk 1e1c0000.xhci: Host supports USB 3.0 SuperSpeed [ 2.777501] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. [ 2.786515] hub 2-0:1.0: USB hub found [ 2.790405] hub 2-0:1.0: 1 port detected [ 2.800561] kmodloader: done loading kernel modules from /etc/modules-boot.d/* [ 2.813132] init: - preinit - [ 3.583508] mtk_soc_eth 1e100000.ethernet eth0: configuring for fixed/rgmii link mode [ 3.591826] mtk_soc_eth 1e100000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx [ 3.600398] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [ 3.798587] random: jshn: uninitialized urandom read (4 bytes read) [ 3.908063] random: jshn: uninitialized urandom read (4 bytes read) [ 3.954538] random: jshn: uninitialized urandom read (4 bytes read) [ 4.200950] mt7530 mdio-bus:1f lan1: configuring for phy/gmii link mode [ 4.207951] 8021q: adding VLAN 0 to HW filter on device lan1 Press the [f] key and hit [enter] to enter failsafe mode Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level [ 8.478269] jffs2: notice: (596) jffs2_build_xattr_subsystem: complete building xattr subsystem, 8 of xdatum (0 unchecked, 3 orphan) and 9 of xref (3 dead, 0 orphan) found. [ 8.495505] mount_root: switching to jffs2 overlay [ 8.505042] overlayfs: upper fs does not support tmpfile. [ 8.515938] urandom-seed: Seeding with /etc/urandom.seed [ 8.603053] procd: - early - [ 8.606078] procd: - watchdog - [ 9.220945] procd: - watchdog - [ 9.224389] procd: - ubus - [ 9.282738] procd: - init - Please press Enter to activate this console. [ 9.856910] kmodloader: loading kernel modules from /etc/modules.d/* [ 9.885586] Loading modules backported from Linux version v5.8-0-gbcf876870b95 [ 9.892861] Backport generated by backports.git v5.8-1-0-g79400d9e [ 9.927108] xt_time: kernel timezone is -0000 [ 10.073691] urngd: v1.0.2 started. [ 10.085931] mt7621-pci 1e140000.pcie: bus=2 slot=1 irq=20 [ 10.091401] pci 0000:00:01.0: enabling device (0006 -> 0007) [ 10.097149] mt7603e 0000:02:00.0: enabling device (0000 -> 0002) [ 10.103391] mt7603e 0000:02:00.0: ASIC revision: 76030010 [ 10.233144] random: crng init done [ 10.236544] random: 7 urandom warning(s) missed due to ratelimiting [ 10.730142] mt7603e 0000:02:00.0: Firmware Version: ap_pcie [ 10.735737] mt7603e 0000:02:00.0: Build Time: 20160107100755 [ 10.768775] mt7603e 0000:02:00.0: firmware init done [ 10.985949] mt7621-pci 1e140000.pcie: bus=1 slot=0 irq=19 [ 10.991458] pci 0000:00:00.0: enabling device (0006 -> 0007) [ 10.997132] mt76x2e 0000:01:00.0: enabling device (0000 -> 0002) [ 11.003413] mt76x2e 0000:01:00.0: ASIC revision: 76120044 [ 11.618155] mt76x2e 0000:01:00.0: ROM patch build: 20141115060606a [ 11.630213] mt76x2e 0000:01:00.0: Firmware Version: 0.0.00 [ 11.635811] mt76x2e 0000:01:00.0: Build: 1 [ 11.640023] mt76x2e 0000:01:00.0: Build Time: 201507311614____ [ 11.660864] mt76x2e 0000:01:00.0: Firmware running! [ 11.701199] PPP generic driver version 2.4.2 [ 11.708680] NET: Registered protocol family 24 [ 11.732422] kmodloader: done loading kernel modules from /etc/modules.d/* [ 18.154712] mtk_soc_eth 1e100000.ethernet eth0: Link is Down [ 18.161574] mtk_soc_eth 1e100000.ethernet: PPE table busy [ 18.176661] mtk_soc_eth 1e100000.ethernet eth0: configuring for fixed/rgmii link mode [ 18.185047] mtk_soc_eth 1e100000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx [ 18.196588] mt7530 mdio-bus:1f lan1: configuring for phy/gmii link mode [ 18.205230] 8021q: adding VLAN 0 to HW filter on device lan1 [ 18.214751] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [ 18.221763] br-lan: port 1(lan1) entered blocking state [ 18.227075] br-lan: port 1(lan1) entered disabled state [ 18.233854] device lan1 entered promiscuous mode [ 18.238546] device eth0 entered promiscuous mode [ 18.268178] mt7530 mdio-bus:1f lan2: configuring for phy/gmii link mode [ 18.277434] 8021q: adding VLAN 0 to HW filter on device lan2 [ 18.286867] br-lan: port 2(lan2) entered blocking state [ 18.292296] br-lan: port 2(lan2) entered disabled state [ 18.303202] device lan2 entered promiscuous mode [ 18.317373] mt7530 mdio-bus:1f lan3: configuring for phy/gmii link mode [ 18.325813] 8021q: adding VLAN 0 to HW filter on device lan3 [ 18.336041] br-lan: port 3(lan3) entered blocking state [ 18.341415] br-lan: port 3(lan3) entered disabled state [ 18.348320] device lan3 entered promiscuous mode [ 18.363362] mt7530 mdio-bus:1f lan4: configuring for phy/gmii link mode [ 18.370570] 8021q: adding VLAN 0 to HW filter on device lan4 [ 18.380084] br-lan: port 4(lan4) entered blocking state [ 18.385463] br-lan: port 4(lan4) entered disabled state [ 18.393517] device lan4 entered promiscuous mode [ 18.417689] mt7530 mdio-bus:1f wan: configuring for phy/gmii link mode [ 18.424949] 8021q: adding VLAN 0 to HW filter on device wan BusyBox v1.31.1 () built-in shell (ash) _______ ________ __ | |.-----.-----.-----.| | | |.----.| |_ | - || _ | -__| || | | || _|| _| |_______|| __|_____|__|__||________||__| |____| |__| W I R E L E S S F R E E D O M ----------------------------------------------------- OpenWrt SNAPSHOT, r15104-451c1eb8c2 ----------------------------------------------------- === WARNING! ===================================== There is no root password defined on this device! Use the "passwd" command to set up a new password in order to prevent unauthorized SSH logins. -------------------------------------------------- root@OpenWrt:/#


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  • Last modified: 2024/02/12 11:13
  • by 127.0.0.1