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D-Link DIR-842 @toh:d-link
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====== D-Link DIR-842 ====== /* This template is intended to be used via https://openwrt.org/meta/create_ne... 0 wireless router with 5 gigabit ports. {{media:dlink:dir842_case_front.jpg?0x200|}} {{media:dlink:dir842_case_rear.jpg?0x200|}} <WRAP BOX> FIXME Any text with a l... ll be needed (See [[https://forum.openwrt.org/t/d-link-dir-842-c3-installation/43094/8]]) and be sure to act
PHICOMM K2P/KE2P @toh:phicomm
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================== U-Boot 1.1.3 ( - ) Board: Ralink APSoC DRAM: 128 MB uboot gpio init : WPS / RESET... manufacture id: c8, device id 40 18 find flash: GD25Q128C ra_spi_flash_size:0x1000000 *** Warning - b... 0 ============================================ Ralink UBoot Version: 5.0.0.0 --------------------------... ocol family 16 [ 0.600000] release PCIe RST: RALINK_RSTCTRL = 7000000 [ 0.604000] PCIE PHY initial
  • Last modified: 2020/12/09 22:33
  • by hauke