ZyXEL XGS1210-12


Zyxel have disabled the boot loader's serial console, if you upload the wrong image,
or forget to adjust the bootcmd, the only way to recover will be using a flash writer.

The ZyXEL XGS1210-12 is a web managed 12-port Multi-Gigabit L3 switch. Connectivity:

  • 8 10/100/1000BaseT Ethernet ports
  • 2 10/100/1000/2500BaseT Ethernet ports
  • 2 SFP+ 1/10GBit cage

Frontal view

Supported Versions

Experimental Versions

None at this time.

Hardware Highlights

Installation

→ Install OpenWrt (generic explanation)

Flash Layout

The XGS1210-12 has a 16 MiB Macronix MX25L12833F NOR flash chip. The realtek target uses a dynamic kernel/rootfs split, so actual sizes of the kernel, rootfs and rootfs_data partitions may vary.

xgs1210-12 Flash Layout (OpenWrt)
Layer0 raw NOR flash memory chip (spi0.0: mx25l12805d) 16384 KiB
Layer1 mtd0 u-boot 896 KiB mtd1 u-boot-env 64 KiB mtd2 u-boot-env2 64 KiB mtd3 jffs 1024 KiB mtd4 jffs2 1024 KiB mtd5 runtime 13184 KiB mtd9 log 128 KiB
Layer2 mtd6 kernel 2752 KiB mtd7 rootfs 10432 KiB
mountpoint /
filesystem OverlayFS
Layer3 mtd8 rootfs_data 7232 KiB
Size in KiB 896 KiB 64 KiB 64 KiB 1024 KiB 1024 KiB 2752 KiB 3200 KiB 7232 KiB 128 KiB
Name u-boot u-boot-env u-boot-env2 jffs jffs2 kernel rootfs_data
mountpoint none none none none none none /rom /overlay none
filesystem none none none none none none SquashFS JFFS2 none

Installing OpenWrt, OEM easy install

  • Connect serial as per the layout.
  • Connect to the switch via Ethernet. Note: default IP address on OEM firmware is 192.168.1.3.
  • Navigate to 'Management' in the OEM web interface and click on 'Firmware upgrade' to the left.
  • Upload the OpenWrt initramfs image, and wait till the switch reboots into OpenWrt.
  • Connect to the device through serial and change the U-boot boot command: 
    # fw_setenv bootcmd 'rtk network on; boota'
  • Reboot.
  • scp the sysupgrade image to /tmp, verify the checksum and flash it: 
    # sysupgrade /tmp/openwrt-realtek-rtl930x-zyxel_xgs1210-12-squashfs-sysupgrade.bin
  • Upon reboot, you have a functional OpenWrt installation. Leave the bootcmd value as is - without rtk network on the switch will fail to initialise the network.

Booting OpenWrt from RAM

→ generic.flashing.tftp

The XGS1210-12 can boot from the network, but for that you'd need to manipulate the boot command. ZyXEL password protected the U-boot environment. However, if you change the bootcmd to a bogus value from within OpenWrt, you'll get dropped to a shell and be able to tftp load a ramdisk image. The instructions below assume a functional TFTP server. This is an 'invasive' procedure in the sense that you will need to install OpenWrt once to change the bootcmd. Once that's done you can reinstall the OEM firmware if you'd like. Keep in mind you will need serial access for every single boot as long as your bootcmd is bogus. Once you switch back to the default boota command, the switch will boot through, but you will not be able to access U-boot anymore until you change the bootcmd again. This is excellent for testing purposes, but unsuited for production use.

Specific values needed for TFTP

Bootloader TFTP server IPv4 address 192.168.1.111
Firmware TFTP image Latest OpenWrt release (NOTE: Name must contain “initramfs”)

Instructions

  • Connect serial as per the serial settings.
  • Navigate to 'Management' in the OEM web interface and click on 'Firmware upgrade' to the left.
  • Upload the OpenWrt initramfs image, and wait till the switch reboots.
  • Connect to the device through serial and change the boot command to a bogus command, so U-boot will drop you to a shell next time you boot: 
    # fw_setenv bootcmd 'rtk network on; bootu'
  • Reboot
  • Load the ramdisk in the U-boot shell: 
    # tftpboot 0x84f00000 10.0.0.10:openwrt-realtek-rtl930x-zyxel_xgs1210-12-initramfs-kernel.bin
  • Boot from RAM by runnung: 
    # bootm

Upgrading OpenWrt

→ generic.sysupgrade

FIXME These are generic instructions. Update with your router's specifics.

LuCI Web Upgrade Process

  • Browse to http://192.168.1.1/cgi-bin/luci/mini/system/upgrade/ LuCI Upgrade URL
  • Upload image file for sysupgrade to LuCI
  • Wait for reboot

Terminal Upgrade Process

If you don't have a GUI (LuCI) available, you can alternatively upgrade via the command line. There are two command line methods for upgrading:

  • sysupgrade
  • mtd

Note: It is important that you put the firmware image into the ramdisk (/tmp) before you start flashing.

sysupgrade

  • Login as root via SSH on 192.168.1.1, then enter the following commands:
cd /tmp
wget http://downloads.openwrt.org/snapshots/trunk/XXX/xxx.abc
sysupgrade /tmp/xxx.abc

mtd

If sysupgrade does not support this router, use mtd.

  • Login as root via SSH on 192.168.1.1, then enter the following commands:
cd /tmp
wget http://downloads.openwrt.org/snapshots/trunk/XXX/xxx.abc
mtd write /tmp/xxx.abc linux && reboot

Debricking

Recover from boot failures

If you should find yourself in the situation, where the devices does not boot properly or just keeps re-booting in a loop due to kernel errors, the switch can be recovered changing the BIOS externally. A common mistake that can lead to those problems, is using the wrong image during the OEM or RAM installation process explained above. Both of them required to initially use the initramfs to make a first boot into OpenWRT and then write the system with the sysupgrade image.

Recovering the switch now required more efforts, as it requires to open the case, find the BIOS chip, read the chip and write back a modified version:

Get yourself a CH341A flash programmer. You require one with the clip that can be connected directly to the BIOS chip while it is still on the board of the switch.

Open the case with three screws on the back. Unfortunately the BIOS chip is placed in such a way, that it cannot be reached without removing the heat suspension plate.

Take off the plate carefully, as it is still connected with heat transmitting padding to the network chips and the CPU. The BIOS chip is on the backside, right of the switch. Connect the clip with the chip, the red part of the cable goes to PIN one, which is the one with the small dot on the chip. Connect the header for the clip to the programmer closer to the USB port. The backsided 8 PINs are for a different chip! Connect the connector of the clip with the programmer.

Plugin the programmer to your PC. (this part is easier, of your use a short USB extension cable) Fire up the programmer on your PC: flashrom --programmer ch341a_spi -r backup1.bin -c “MX25L12805D” This takes a few minutes Fire up the programmer again with: flashrom --programmer ch341a_spi -r backup2.bin -c “MX25L12805D” Run a md5sum backup1.bin, md5sum backup2.bin and compare the two hash sums. If those two do not match, something went wrong. Better start over again.

Now we need to change the BIOS to fool it into debug mode, similar as for the installation path via RAM. Open the binary in a HEX editor. You will need to search for some special string, so you better chose some editor that supports character based search. Search for the string “boota”. There are multiple occurrences of this string. However, some, the earlier ones, are only part of some feature description. Important are the occurrences where it says something like: bootcmd=boota. Depending on what went wrong on your switch, you might directly search for this directly, but if you have follow this some instructions from this website, you might find something like rtk network on; before the “boota” instruction.

Change all occurrences of “boota” to “bootu” similar as indicated for the RAM installation. Save the binary. Write the binary back to the chip with: flashrom --programmer ch341a_spi -w modified.bin -c “MX25L12805D” This now even takes longer than the previous read command. Let it finish.

(optional, but recommended): read the image from the chip again and compare the md5sum of the binary written and the binary you have just downloaded. The checksums must match. If not, something went wrong during the upload process, of you have chosen the wrong binary etc. Connect the serial and follow the instructions from the previous section “Booting OpenWrt from RAM”. Chose the right image. Finalizing those instructions should give you back an operational switch.

Revert to OEM Firmware

In case that you want to revert to the OEM firmware, follow these steps. You will need access to the uboot shell and a working tftp server in order to proceed.

Instructions

  • Connect serial as per the layout.
  • From the uboot shell, make sure to enable the network of the device by running: 
    # rtk network on
  • Upload the OEM Firmware image from tftp: 
    # tftpboot 0x84f00000 <tftpserver ip>:<oem firmware filename on the tftp server>
  • Boot the uploaded Image from RAM: 
    # bootm
  • :!: The device will ask for your old OEM admin password.
  • :!: If you don't remember what password you used within the OEM firmware, reset the device to factory setting by holding the reset button for aprox. 4 seconds. The device will reset, therefore you have to repeat the previous steps to boot the OEM firmware from RAM.
  • Once the OEM firmware is running, Navigate to 'Management' in the OEM web interface and click on 'Firmware upgrade' to the left.
  • Upload the OEM Firmware image, and wait till the switch reboots.
  • From the uboot shell, test if the device is unbricked by booting to the OEM Firmware from flash: 
    # boota
  • :!: These steps will remove your access to the uboot shell!
  • From the uboot shell, change the boot command: 
    # setenv bootcmd boota
  • Verify by running: 
    # printenv
  • When everything looks right, save the settings by running: 
    # saveenv

Failsafe mode

→ failsafe_and_factory_reset

Basic configuration

→ Basic configuration After flashing, proceed with this.
Set up your Internet connection, configure wireless, configure USB port, etc.

Specific Configuration

Network interfaces

The default network configuration is:

Interface Name Description Default configuration
br-lan LAN 192.168.1.1/24

Switch Ports (for VLANs)

FIXME Please fill in real values for this device, then remove the EXAMPLEs

Numbers 0-3 are Ports 1-4 as labeled on the unit, number 4 is the Internet (WAN) on the unit, 5 is the internal connection to the router itself. Don't be fooled: Port 1 on the unit is number 3 when configuring VLANs. vlan0 = eth0.0, vlan1 = eth0.1 and so on.

Port Switch port
Internet (WAN) EXAMPLE 4
LAN 1 EXAMPLE 3
LAN 2 EXAMPLE 2
LAN 3 EXAMPLE 1
LAN 4 EXAMPLE 0

Buttons

→ hardware.button on howto use and configure the hardware button(s). Here, we merely name the buttons, so we can use them in the above Howto.

The ZyXEL xgs1210-12 has the following buttons:

BUTTON Event
Reset reset

Hardware

Info

Photos

Front:

Back:

Label:

Opening the case

→ Warranty

Remove the 3 Phillips screws from the rear. Pull top of chassis gently backwards (away from the Ethernet ports).

The main PCB is covered by a large aluminum block that also acts as a heat sink for the components. Remove the 5 Phillips screws from the top of the aluminium block and gently remove it by pulling away from the PCB.

Main PCB:

Serial

→ port.serial general information about the serial port, serial port cable, etc.

Serial is pretty straightforward on this switch. There's an angled UART serial connector to the right side, sitting vertically in between the ventilation slits. The serial header can be connected to from the outside with a standard 2.54mm header. Pins are, from top to bottom:

  • Vcc (3.3V)
  • TX
  • RX
  • GND

Layout is exactly the same as for the ZyXEL XGS1250-12:

Serial connection parameters for ZyXEL xgs1210-12 115200, 8N1

JTAG

→ port.jtag general information about the JTAG port, JTAG cable, etc.

How to connect to the JTAG Port of this specific device:
Insert photo of PCB with markings for JTAG port

Bootloader mods

→ bootloader

Default uboot Environment Settings

* List your settings from busybox shell: 

# fw_printenv

* List your settings from uboot shell: 

# printenv

In case you want to restore your uboot Settings, these are the defaults.

FIXME!


Hardware mods

None so far.

Bootlogs

OEM bootlog

U-Boot Version V1.0.0.1 (Oct 14 2019 - 17:51:23) Board: RTL9300 CPU:800MHz LX:175MHz DDR:600MHz DRAM: 128 MB SPI-F: MXIC/C22018/MMIO16-1/ModeC 1x16 MB (plr_flash_info @ 83f6a2a4) Loading 65536B env. variables from offset 0xe0000 Net: Net Initialization Skipped No ethernet found. Hit Esc key to stop autoboot: 0 ## Booting kernel from Legacy Image at 81000000 ... Image Name: V1.00(ABTY.6)C0 Created: 2022-08-19 17:18:42 UTC Image Type: MIPS Linux Kernel Image (lzma compressed) Data Size: 6378693 Bytes = 6.1 MB Load Address: 80000000 Entry Point: 802c10a0 Verifying Checksum ... OK Uncompressing Kernel Image ... OK Starting kernel ... *Jan 01 2022 00:00:04: %SYSTEM-5-COLDSTART: Cold startup Press any key to continue


OpenWrt bootlog

U-Boot Version V1.0.0.1 (Oct 14 2019 - 17:51:23) Board: RTL9300 CPU:800MHz LX:175MHz DDR:600MHz DRAM: 128 MB SPI-F: MXIC/C22018/MMIO16-1/ModeC 1x16 MB (plr_flash_info @ 83f6a2a4) Loading 65536B env. variables from offset 0xe0000 Net: Net Initialization Skipped No ethernet found. Hit Esc key to stop autoboot: 0 Enable network RTCORE Driver Module Initialize IOAL init Hardware-profile probe GPIO probe (unit 0): (found) GPIO Init RTL8231 probe (unit 0): (found) RTL8231 init (unit 0) (XGS1210_12) Hardware-profile init GPIO probe (unit 0): (found) GPIO Init rtl9300_gpio_init had already been initialized! SPI init (unit 0) I2C probe (unit 0) I2C init (unit 0) RTL8231 probe (unit 0): (found) RTL8231 init (unit 0) r9300_rtl8231_init had already been initialized! NIC probe (unit 0) Loader RTNIC Driver Module Initialize IOAL init RTK Driver Module Initialize MAC probe (unit 0) Chip 9302 (found) MAC init (unit 0) SMI protocol probe (unit 0) PHY probe (unit 0) Chip Construct (unit 0) Chip Construct Disable PHY Polling PHY Reset MAC Construct Turn Off Serdes Serdes Construct PHY Construct Turn On Serdes Enable PHY Polling Misc PHY init (unit 0) Mgmt_dev init (unit 0) Please wait for PHY init-time ... ## Booting kernel from Legacy Image at 81000000 ... Image Name: MIPS OpenWrt Linux-6.12.62 Created: 2025-12-18 20:25:49 UTC Image Type: MIPS Linux Kernel Image (uncompressed) Data Size: 2943269 Bytes = 2.8 MB Load Address: 80100000 Entry Point: 80100000 Verifying Checksum ... OK Loading Kernel Image ... OK OK Starting kernel ... rt-loader Running on RTL9302B (chip id 6487A) with 128MB Relocate 2943280 bytes from 0x80100000 to 0x87ce0000 Extract image with 2927561 bytes from 0x87ce3d5c to 0x80100000 ... Final kernel size is 9924898 bytes Booting kernel from 0x80100000 ... [ 0.000000] Linux version 6.12.62 (builder@buildhost) (mips-openwrt-linux-musl-gcc (OpenWrt GCC 14.3.0 r32353-9e9b05130c) 14.3.0, GNU ld (GNU Binutils) 2.44) #0 SMP Thu Dec 18 20:25:49 2025 [ 0.000000] SoC Type: Realtek RTL9302B rev B (6487) [ 0.000000] printk: legacy bootconsole [early0] enabled [ 0.000000] CPU0 revision is: 00019555 (MIPS 34Kc) [ 0.000000] MIPS: machine is Zyxel XGS1210-12 A1 Switch [ 0.000000] earlycon: ns16550a0 at MMIO 0x18002000 (options '115200n8') [ 0.000000] printk: legacy bootconsole [ns16550a0] enabled [ 0.000000] Initrd not found or empty - disabling initrd [ 0.000000] Using appended Device Tree. [ 0.000000] OF: reserved mem: Reserved memory: No reserved-memory node in the DT [ 0.000000] Detected 1 available secondary CPU(s) [ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. [ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes [ 0.000000] Zone ranges: [ 0.000000] Normal [mem 0x0000000000000000-0x0000000007ffffff] [ 0.000000] HighMem empty [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000000000000-0x0000000007ffffff] [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff] [ 0.000000] percpu: Embedded 12 pages/cpu s18224 r8192 d22736 u49152 [ 0.000000] pcpu-alloc: s18224 r8192 d22736 u49152 alloc=12*4096 [ 0.000000] pcpu-alloc: [0] 0 [0] 1 [ 0.000000] Kernel command line: earlycon [ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes, linear) [ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes, linear) [ 0.000000] Writing ErrCtl register=000287f0 [ 0.000000] Readback ErrCtl register=000287f0 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 32768 [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off [ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] rcu: Hierarchical RCU implementation. [ 0.000000] Tracing variant of Tasks RCU enabled. [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies. [ 0.000000] RCU Tasks Trace: Setting shift to 1 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=2. [ 0.000000] NR_IRQS: 256 [ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention. [ 0.000000] Failed to get CPU clock: -2 [ 0.000000] CPU frequency from device tree: 800MHz [ 0.000000] clocksource: realtek_otto_timer: mask: 0xfffffff max_cycles: 0xfffffff, max_idle_ns: 38225208801 ns [ 0.000002] sched_clock: 28 bits at 3125kHz, resolution 320ns, wraps every 42949672800ns [ 0.009055] Calibrating delay loop... 531.66 BogoMIPS (lpj=2658304) [ 0.065727] pid_max: default: 32768 minimum: 301 [ 0.082058] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.090107] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.111768] rcu: Hierarchical SRCU implementation. [ 0.117018] rcu: Max phase no-delay instances is 1000. [ 0.124623] smp: Bringing up secondary CPUs ... [ 0.131421] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes. [ 0.131478] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes [ 0.131560] CPU1 revision is: 00019555 (MIPS 34Kc) [ 0.208920] Counter synchronization [CPU#0 -> CPU#1]: passed [ 0.236217] smp: Brought up 1 node, 2 CPUs [ 0.242064] Memory: 117816K/131072K available (7768K kernel code, 726K rwdata, 972K rodata, 1280K init, 254K bss, 12440K reserved, 0K cma-reserved, 0K highmem) [ 0.264625] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.275496] futex hash table entries: 512 (order: 2, 16384 bytes, linear) [ 0.289741] pinctrl core: initialized pinctrl subsystem [ 0.298381] NET: Registered PF_NETLINK/PF_ROUTE protocol family [ 0.305629] thermal_sys: Registered thermal governor 'step_wise' [ 0.330697] clocksource: Switched to clocksource realtek_otto_timer [ 0.355695] NET: Registered PF_INET protocol family [ 0.361399] IP idents hash table entries: 2048 (order: 2, 16384 bytes, linear) [ 0.371148] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes, linear) [ 0.380310] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear) [ 0.388862] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear) [ 0.397330] TCP bind hash table entries: 1024 (order: 2, 16384 bytes, linear) [ 0.405258] TCP: Hash tables configured (established 1024 bind 1024) [ 0.413013] MPTCP token hash table entries: 256 (order: 0, 4096 bytes, linear) [ 0.421459] UDP hash table entries: 256 (order: 1, 8192 bytes, linear) [ 0.428646] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear) [ 0.437582] NET: Registered PF_UNIX/PF_LOCAL protocol family [ 0.446950] workingset: timestamp_bits=14 max_order=15 bucket_order=1 [ 0.456949] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.463429] jffs2: version 2.2 (NAND) (SUMMARY) (ZLIB) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc. [ 0.480685] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252) [ 0.490517] pinctrl-single 1b000200.pinmux: 32 pins, size 4 [ 0.497381] pinctrl-single 1b00c600.pinmux: 32 pins, size 4 [ 0.504150] pinctrl-single 1b00cc00.pinmux: 32 pins, size 4 [ 0.515576] Serial: 8250/16550 driver, 16 ports, IRQ sharing enabled [ 0.529839] printk: legacy console [ttyS0] disabled [ 0.536692] 18002000.uart: ttyS0 at MMIO 0x18002000 (irq = 30, base_baud = 10937500) is a 16550A [ 0.546543] printk: legacy console [ttyS0] enabled [ 0.546543] printk: legacy console [ttyS0] enabled [ 0.557400] printk: legacy bootconsole [early0] disabled [ 0.557400] printk: legacy bootconsole [early0] disabled [ 0.570469] printk: legacy bootconsole [ns16550a0] disabled [ 0.570469] printk: legacy bootconsole [ns16550a0] disabled [ 0.619664] brd: module loaded [ 0.627623] 7 fixed-partitions partitions found on MTD device spi0.0 [ 0.635322] Creating 7 MTD partitions on "spi0.0": [ 0.640809] 0x000000000000-0x0000000e0000 : "u-boot" [ 0.648447] 0x0000000e0000-0x0000000f0000 : "u-boot-env" [ 0.656509] 0x0000000f0000-0x000000100000 : "u-boot-env2" [ 0.664614] 0x000000100000-0x000000200000 : "jffs2-cfg" [ 0.672480] 0x000000200000-0x000000300000 : "jffs2-log" [ 0.680679] 0x000000300000-0x000000fe0000 : "firmware" [ 0.688572] 2 uimage-fw partitions found on MTD device firmware [ 0.695281] Creating 2 MTD partitions on "firmware": [ 0.700951] 0x000000000000-0x0000002d0000 : "kernel" [ 0.708482] 0x0000002d0000-0x000000ce0000 : "rootfs" [ 0.715027] mtd: setting mtd7 (rootfs) as root device [ 0.720880] 1 squashfs-split partitions found on MTD device rootfs [ 0.727862] 0x000000560000-0x000000ce0000 : "rootfs_data" [ 0.735879] 0x000000fe0000-0x000001000000 : "log" [ 0.763332] mdio-rtl-otto 1b000000.switchcore:mdio-controller: probing RTL9300 family mdio bus [ 0.774614] c45_mask: 00060000 [ 0.868103] realtek-otto-serdes-mdio 1b000000.switchcore:mdio-serdes: Realtek SerDes mdio bus initialized, 12 SerDes, 64 pages, 32 registers [ 0.882833] realtek-otto-pcs 1b000000.switchcore:pcs: Realtek PCS driver initialized [ 0.892237] Probing RTL838X eth device pdev: 81959200, dev: 81959210 [ 0.918290] Found SoC ID: 9302: RTL9302B, family 9300 [ 0.924208] Using MAC [redacted] [ 0.933792] i2c_dev: i2c /dev entries driver [ 0.948275] NET: Registered PF_INET6 protocol family [ 0.959388] Segment Routing with IPv6 [ 0.963766] In-situ OAM (IOAM) with IPv6 [ 0.968311] NET: Registered PF_PACKET protocol family [ 0.974259] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this. [ 0.990001] 8021q: 802.1Q VLAN Support v1.8 [ 1.043474] sfp sfp-p11: Host maximum power 1.0W [ 1.051555] sfp sfp-p12: Host maximum power 1.0W [ 1.064424] rtl93xx_setup called [ 1.068115] In rtl83xx_vlan_setup [ 1.071947] UNKNOWN_MC_PMASK: 000000001fffffff [ 2.120705] rtl83xx_enable_phy_polling: f0000ff [ 2.126986] rtl83xx-switch switch@1b000000: led_set0 has 2 LEDs configured [ 2.134710] rtl83xx-switch switch@1b000000: led_set1 has 4 LEDs configured [ 2.142425] rtl83xx-switch switch@1b000000: led_set2 has 2 LEDs configured [ 2.150248] rtl83xx-switch switch@1b000000: configuring for fixed/internal link mode [ 2.160298] rtl83xx-switch switch@1b000000 lan1 (uninitialized): PHY [1b000000.switchcore:mdio-controller-mii:00] driver [REALTEK RTL8218D] (irq=POLL) [ 2.178457] rtl83xx-switch switch@1b000000 lan2 (uninitialized): PHY [1b000000.switchcore:mdio-controller-mii:01] driver [REALTEK RTL8218D] (irq=POLL) [ 2.196659] rtl83xx-switch switch@1b000000 lan3 (uninitialized): PHY [1b000000.switchcore:mdio-controller-mii:02] driver [REALTEK RTL8218D] (irq=POLL) [ 2.214874] rtl83xx-switch switch@1b000000 lan4 (uninitialized): PHY [1b000000.switchcore:mdio-controller-mii:03] driver [REALTEK RTL8218D] (irq=POLL) [ 2.233857] rtl83xx-switch switch@1b000000 lan5 (uninitialized): PHY [1b000000.switchcore:mdio-controller-mii:04] driver [REALTEK RTL8218D] (irq=POLL) [ 2.252198] rtl83xx-switch switch@1b000000 lan6 (uninitialized): PHY [1b000000.switchcore:mdio-controller-mii:05] driver [REALTEK RTL8218D] (irq=POLL) [ 2.270223] rtl83xx-switch switch@1b000000 lan7 (uninitialized): PHY [1b000000.switchcore:mdio-controller-mii:06] driver [REALTEK RTL8218D] (irq=POLL) [ 2.288431] rtl83xx-switch switch@1b000000 lan8 (uninitialized): PHY [1b000000.switchcore:mdio-controller-mii:07] driver [REALTEK RTL8218D] (irq=POLL) [ 2.307966] rtl83xx-switch switch@1b000000: Link is Up - 10Gbps/Full - flow control off [ 2.350958] rtl83xx-switch switch@1b000000 lan9 (uninitialized): PHY [1b000000.switchcore:mdio-controller-mii:18] driver [RTL8226-CG 2.5Gbps PHY] (irq=POLL) [ 2.410962] rtl83xx-switch switch@1b000000 lan10 (uninitialized): PHY [1b000000.switchcore:mdio-controller-mii:19] driver [RTL8226-CG 2.5Gbps PHY] (irq=POLL) [ 2.432318] rtl838x-eth 1b00a300.ethernet eth0: entered promiscuous mode [ 2.440025] DSA: tree 0 setup [ 2.443508] LINK state irq: 23 [ 2.446984] In rtl83xx_setup_qos [ 2.450812] rtl930x_dbgfs_init called [ 2.455934] clk: Disabling unused clocks [ 2.468032] VFS: Mounted root (squashfs filesystem) readonly on device 31:7. [ 2.481512] Freeing unused kernel image (initmem) memory: 1280K [ 2.488129] This architecture does not have kernel memory protection. [ 2.495343] Run /sbin/init as init process [ 2.499913] with arguments: [ 2.503253] /sbin/init [ 2.506277] with environment: [ 2.509760] HOME=/ [ 2.512425] TERM=linux [ 3.052200] init: Console is alive [ 3.056515] init: - watchdog - [ 3.383859] kmodloader: loading kernel modules from /etc/modules-boot.d/* [ 3.442522] gpio_button_hotplug: loading out-of-tree module taints kernel. [ 3.454305] kmodloader: done loading kernel modules from /etc/modules-boot.d/* [ 3.471521] init: - preinit - [ 6.480695] random: crng init done Cannot parse config file '/etc/fw_env.config': No such file or directory Failed to find NVMEM device [ 8.131897] RESETTING 9300, CPU_PORT 28 [ 8.336838] rtl838x-eth 1b00a300.ethernet eth0: configuring for fixed/internal link mode [ 8.345886] In rtl838x_mac_config, mode 1 [ 8.351366] rtl83xx-switch switch@1b000000 lan1: configuring for phy/usxgmii link mode [ 8.360216] realtek-otto-pcs 1b000000.switchcore:pcs: pcs_config(usxgmii) for port 0 and sds 2 not yet fully implemented [ 8.372889] 8021q: adding VLAN 0 to HW filter on device lan1 [ 8.379474] rtl838x-eth 1b00a300.ethernet eth0: Link is Up - 1Gbps/Full - flow control off Press the [f] key and hit [enter] to enter failsafe mode Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level [ 12.777506] mount_root: jffs2 not ready yet, using temporary tmpfs overlay [ 12.790753] urandom-seed: Seed file not found (/etc/urandom.seed) [ 12.912401] procd: - early - [ 12.915991] procd: - watchdog - [ 13.603763] procd: - watchdog - [ 13.608513] procd: - ubus - [ 13.726081] procd: - init - Please press Enter to activate this console. [ 14.647530] kmodloader: loading kernel modules from /etc/modules.d/* [ 14.801205] kmodloader: done loading kernel modules from /etc/modules.d/* [ 16.162561] urngd: v1.0.2 started. [ 34.152884] in rtl838x_eth_stop [ 34.156610] rtl838x-eth 1b00a300.ethernet eth0: Link is Down [ 34.896392] Using MAC 0000d8ece5729af0 [ 34.901186] RESETTING 9300, CPU_PORT 28 [ 35.171954] rtl838x-eth 1b00a300.ethernet eth0: configuring for fixed/internal link mode [ 35.181016] In rtl838x_mac_config, mode 1 [ 35.189149] rtl838x-eth 1b00a300.ethernet eth0: Link is Up - 1Gbps/Full - flow control off [ 35.216806] rtl83xx-switch switch@1b000000 lan1: configuring for phy/usxgmii link mode [ 35.225802] realtek-otto-pcs 1b000000.switchcore:pcs: pcs_config(usxgmii) for port 0 and sds 2 not yet fully implemented [ 35.239316] 8021q: adding VLAN 0 to HW filter on device lan1 [ 35.254479] switch: port 1(lan1) entered blocking state [ 35.260386] switch: port 1(lan1) entered disabled state [ 35.266481] rtl83xx-switch switch@1b000000 lan1: entered allmulticast mode [ 35.274368] rtl838x-eth 1b00a300.ethernet eth0: entered allmulticast mode [ 35.282857] rtl83xx-switch switch@1b000000 lan1: entered promiscuous mode [ 35.400210] rtl83xx-switch switch@1b000000 lan2: configuring for phy/usxgmii link mode [ 35.409239] realtek-otto-pcs 1b000000.switchcore:pcs: pcs_config(usxgmii) for port 1 and sds 2 not yet fully implemented [ 35.422603] 8021q: adding VLAN 0 to HW filter on device lan2 [ 35.446856] switch: port 2(lan2) entered blocking state [ 35.452940] switch: port 2(lan2) entered disabled state [ 35.458919] rtl83xx-switch switch@1b000000 lan2: entered allmulticast mode [ 35.478230] rtl83xx-switch switch@1b000000 lan2: entered promiscuous mode [ 35.575907] rtl83xx-switch switch@1b000000 lan3: configuring for phy/usxgmii link mode [ 35.584971] realtek-otto-pcs 1b000000.switchcore:pcs: pcs_config(usxgmii) for port 2 and sds 2 not yet fully implemented [ 35.597976] 8021q: adding VLAN 0 to HW filter on device lan3 [ 35.615161] switch: port 3(lan3) entered blocking state [ 35.621259] switch: port 3(lan3) entered disabled state [ 35.627227] rtl83xx-switch switch@1b000000 lan3: entered allmulticast mode [ 35.638442] rtl83xx-switch switch@1b000000 lan3: entered promiscuous mode [ 35.687849] rtl83xx-switch switch@1b000000 lan4: configuring for phy/usxgmii link mode [ 35.696972] realtek-otto-pcs 1b000000.switchcore:pcs: pcs_config(usxgmii) for port 3 and sds 2 not yet fully implemented [ 35.710200] 8021q: adding VLAN 0 to HW filter on device lan4 [ 35.725240] switch: port 4(lan4) entered blocking state [ 35.731341] switch: port 4(lan4) entered disabled state [ 35.737297] rtl83xx-switch switch@1b000000 lan4: entered allmulticast mode [ 35.757138] rtl83xx-switch switch@1b000000 lan4: entered promiscuous mode [ 35.807810] rtl83xx-switch switch@1b000000 lan5: configuring for phy/usxgmii link mode [ 35.816872] realtek-otto-pcs 1b000000.switchcore:pcs: pcs_config(usxgmii) for port 4 and sds 2 not yet fully implemented [ 35.829846] 8021q: adding VLAN 0 to HW filter on device lan5 [ 35.904960] switch: port 5(lan5) entered blocking state [ 35.910924] switch: port 5(lan5) entered disabled state [ 35.916846] rtl83xx-switch switch@1b000000 lan5: entered allmulticast mode [ 35.977647] rtl83xx-switch switch@1b000000 lan5: entered promiscuous mode [ 36.024410] rtl83xx-switch switch@1b000000 lan6: configuring for phy/usxgmii link mode [ 36.033405] realtek-otto-pcs 1b000000.switchcore:pcs: pcs_config(usxgmii) for port 5 and sds 2 not yet fully implemented [ 36.046399] 8021q: adding VLAN 0 to HW filter on device lan6 [ 36.061462] switch: port 6(lan6) entered blocking state [ 36.067359] switch: port 6(lan6) entered disabled state [ 36.073503] rtl83xx-switch switch@1b000000 lan6: entered allmulticast mode [ 36.082198] rtl83xx-switch switch@1b000000 lan6: entered promiscuous mode [ 36.132730] rtl83xx-switch switch@1b000000 lan7: configuring for phy/usxgmii link mode [ 36.141872] realtek-otto-pcs 1b000000.switchcore:pcs: pcs_config(usxgmii) for port 6 and sds 2 not yet fully implemented [ 36.155128] 8021q: adding VLAN 0 to HW filter on device lan7 [ 36.174584] switch: port 7(lan7) entered blocking state [ 36.180486] switch: port 7(lan7) entered disabled state [ 36.186710] rtl83xx-switch switch@1b000000 lan7: entered allmulticast mode [ 36.195367] rtl83xx-switch switch@1b000000 lan7: entered promiscuous mode [ 36.243596] rtl83xx-switch switch@1b000000 lan8: configuring for phy/usxgmii link mode [ 36.252592] realtek-otto-pcs 1b000000.switchcore:pcs: pcs_config(usxgmii) for port 7 and sds 2 not yet fully implemented [ 36.265239] 8021q: adding VLAN 0 to HW filter on device lan8 [ 36.301422] switch: port 8(lan8) entered blocking state [ 36.307335] switch: port 8(lan8) entered disabled state [ 36.313467] rtl83xx-switch switch@1b000000 lan8: entered allmulticast mode [ 36.322323] rtl83xx-switch switch@1b000000 lan8: entered promiscuous mode [ 36.419185] rtl83xx-switch switch@1b000000 lan9: configuring for phy/2500base-x link mode [ 36.428523] realtek-otto-pcs 1b000000.switchcore:pcs: pcs_config(2500base-x) for port 24 and sds 6 not yet fully implemented [ 36.441217] rtpcs_930x_sds_set 31 [ 36.457289] rtpcs_930x_phy_enable_10g_1g 1gbit phy: 00001140 [ 36.463784] rtpcs_930x_phy_enable_10g_1g 1gbit phy enabled: 00001140 [ 36.471081] rtpcs_930x_phy_enable_10g_1g 10gbit phy: 00002040 [ 36.477531] rtpcs_930x_phy_enable_10g_1g 10gbit phy after: 00002040 [ 36.484713] rtpcs_930x_phy_enable_10g_1g set medium: 00000000 [ 36.491295] rtpcs_930x_phy_enable_10g_1g set medium after: 00000002 [ 36.498331] rtpcs_930x_setup_serdes: Configuring RTL9300 SERDES 6 [ 36.505413] rtpcs_930x_sds_config_pll: SDS 6 using ring PLL for 2500base-x [ 36.608170] rtpcs_930x_sds_10g_idle WARNING: Waiting for RX idle timed out, SDS 6 [ 36.616711] start_1.1.1 initial value for sds 6 [ 36.622080] end_1.1.1 -- [ 36.624937] start_1.1.2 Load DFE init. value [ 36.629751] end_1.1.2 [ 36.632447] start_1.1.3 disable LEQ training,enable DFE clock [ 36.638942] end_1.1.3 -- [ 36.641923] start_1.1.4 offset cali setting [ 36.646645] end_1.1.4 [ 36.649216] start_1.1.5 LEQ and DFE setting [ 36.654077] rtpcs_930x_sds_do_rx_calibration_1 not PHY-based or SerDes, implement DAC! [ 36.663128] end_1.1.5 [ 36.675140] start_1.2.1 ForegroundOffsetCal_Manual [ 36.680660] end_1.2.1 [ 36.686681] start_1.2.3 Foreground Calibration [ 36.694393] rtpcs_930x_sds_do_rx_calibration_2_3: fgcal_gray: 31, fgcal_binary 31 [ 36.702914] rtpcs_930x_sds_do_rx_calibration_2_3: end_1.2.3 [ 36.709172] start_1.4.1 [ 36.982223] end_1.4.1 [ 36.984996] start_1.4.2 [ 36.988822] vth_set_bin = 7 [ 36.991732] vth_set_bin = 3 [ 36.994914] Vth Maunal = 0 [ 37.123830] Tap0 Sign : + [ 37.126904] tap0_coef_bin = 31 [ 37.129875] tap0 manual = 0 [ 37.133503] end_1.4.2 [ 37.222475] rtpcs_930x_sds_sym_err_reset unsupported phy mode [ 37.231638] rtpcs_930x_sds_sym_err_reset unsupported phy mode [ 37.238232] rtpcs_930x_sds_sym_err_get unsupported PHY-mode [ 37.245834] rtpcs_930x_sds_sym_err_get unsupported PHY-mode [ 37.252244] start_1.1.1 initial value for sds 6 [ 37.257495] end_1.1.1 -- [ 37.260359] start_1.1.2 Load DFE init. value [ 37.265308] end_1.1.2 [ 37.267907] start_1.1.3 disable LEQ training,enable DFE clock [ 37.274524] end_1.1.3 -- [ 37.277378] start_1.1.4 offset cali setting [ 37.282243] end_1.1.4 [ 37.284838] start_1.1.5 LEQ and DFE setting [ 37.289550] rtpcs_930x_sds_do_rx_calibration_1 not PHY-based or SerDes, implement DAC! [ 37.298591] end_1.1.5 [ 37.307359] start_1.2.1 ForegroundOffsetCal_Manual [ 37.313055] end_1.2.1 [ 37.322224] start_1.2.3 Foreground Calibration [ 37.329834] rtpcs_930x_sds_do_rx_calibration_2_3: fgcal_gray: 31, fgcal_binary 31 [ 37.338356] rtpcs_930x_sds_do_rx_calibration_2_3: end_1.2.3 [ 37.344742] start_1.4.1 [ 37.605001] end_1.4.1 [ 37.607773] start_1.4.2 [ 37.611707] vth_set_bin = 7 [ 37.614496] vth_set_bin = 3 [ 37.617680] Vth Maunal = 0 [ 37.744949] Tap0 Sign : + [ 37.748033] tap0_coef_bin = 31 [ 37.751129] tap0 manual = 0 [ 37.754604] end_1.4.2 [ 37.845970] rtpcs_930x_sds_sym_err_reset unsupported phy mode [ 37.855080] rtpcs_930x_sds_sym_err_reset unsupported phy mode [ 37.861631] rtpcs_930x_sds_sym_err_get unsupported PHY-mode [ 37.869155] rtpcs_930x_sds_sym_err_get unsupported PHY-mode [ 37.875533] start_1.1.1 initial value for sds 6 [ 37.880926] end_1.1.1 -- [ 37.883808] start_1.1.2 Load DFE init. value [ 37.888634] end_1.1.2 [ 37.891347] start_1.1.3 disable LEQ training,enable DFE clock [ 37.897838] end_1.1.3 -- [ 37.900806] start_1.1.4 offset cali setting [ 37.905535] end_1.1.4 [ 37.908112] start_1.1.5 LEQ and DFE setting [ 37.912933] rtpcs_930x_sds_do_rx_calibration_1 not PHY-based or SerDes, implement DAC! [ 37.921979] end_1.1.5 [ 37.930495] start_1.2.1 ForegroundOffsetCal_Manual [ 37.936038] end_1.2.1 [ 37.942427] start_1.2.3 Foreground Calibration [ 37.950029] rtpcs_930x_sds_do_rx_calibration_2_3: fgcal_gray: 31, fgcal_binary 31 [ 37.958601] rtpcs_930x_sds_do_rx_calibration_2_3: end_1.2.3 [ 37.964962] start_1.4.1 [ 38.236900] end_1.4.1 [ 38.239680] start_1.4.2 [ 38.243675] vth_set_bin = 7 [ 38.246469] vth_set_bin = 3 [ 38.249645] Vth Maunal = 0 [ 38.382568] Tap0 Sign : + [ 38.385651] tap0_coef_bin = 31 [ 38.388647] tap0 manual = 0 [ 38.392276] end_1.4.2 [ 38.479906] rtpcs_930x_sds_sym_err_reset unsupported phy mode [ 38.489020] rtpcs_930x_sds_sym_err_reset unsupported phy mode [ 38.495581] rtpcs_930x_sds_sym_err_get unsupported PHY-mode [ 38.503108] rtpcs_930x_sds_sym_err_get unsupported PHY-mode [ 38.509382] rtpcs_930x_setup_serdes: SerDes RX calibration failed [ 38.551434] 8021q: adding VLAN 0 to HW filter on device lan9 [ 38.566385] switch: port 9(lan9) entered blocking state [ 38.572552] switch: port 9(lan9) entered disabled state [ 38.578440] rtl83xx-switch switch@1b000000 lan9: entered allmulticast mode [ 38.587152] rtl83xx-switch switch@1b000000 lan9: entered promiscuous mode [ 38.623117] rtl83xx-switch switch@1b000000 lan10: configuring for phy/2500base-x link mode [ 38.632485] realtek-otto-pcs 1b000000.switchcore:pcs: pcs_config(2500base-x) for port 25 and sds 7 not yet fully implemented [ 38.645192] rtpcs_930x_sds_set 31 [ 38.661434] rtpcs_930x_phy_enable_10g_1g 1gbit phy: 00001140 [ 38.667833] rtpcs_930x_phy_enable_10g_1g 1gbit phy enabled: 00001140 [ 38.675225] rtpcs_930x_phy_enable_10g_1g 10gbit phy: 00002040 [ 38.681879] rtpcs_930x_phy_enable_10g_1g 10gbit phy after: 00002040 [ 38.688938] rtpcs_930x_phy_enable_10g_1g set medium: 00000000 [ 38.695538] rtpcs_930x_phy_enable_10g_1g set medium after: 00000002 [ 38.702774] rtpcs_930x_setup_serdes: Configuring RTL9300 SERDES 7 [ 38.709696] rtpcs_930x_sds_config_pll: SDS 7 using ring PLL for 2500base-x [ 38.767774] rtpcs_930x_sds_10g_idle WARNING: Waiting for RX idle timed out, SDS 7 [ 38.776343] start_1.1.1 initial value for sds 7 [ 38.781717] end_1.1.1 -- [ 38.784605] start_1.1.2 Load DFE init. value [ 38.789444] end_1.1.2 [ 38.792152] start_1.1.3 disable LEQ training,enable DFE clock [ 38.798660] end_1.1.3 -- [ 38.801676] start_1.1.4 offset cali setting [ 38.806416] end_1.1.4 [ 38.809005] start_1.1.5 LEQ and DFE setting [ 38.813858] rtpcs_930x_sds_do_rx_calibration_1 not PHY-based or SerDes, implement DAC! [ 38.822965] end_1.1.5 [ 38.831706] start_1.2.1 ForegroundOffsetCal_Manual [ 38.837139] end_1.2.1 [ 38.843297] start_1.2.3 Foreground Calibration [ 38.850981] rtpcs_930x_sds_do_rx_calibration_2_3: fgcal_gray: 31, fgcal_binary 31 [ 38.859386] rtpcs_930x_sds_do_rx_calibration_2_3: end_1.2.3 [ 38.865799] start_1.4.1 [ 39.132444] end_1.4.1 [ 39.135227] start_1.4.2 [ 39.139119] vth_set_bin = 7 [ 39.142005] vth_set_bin = 3 [ 39.145200] Vth Maunal = 0 [ 39.270878] Tap0 Sign : + [ 39.273942] tap0_coef_bin = 31 [ 39.276918] tap0 manual = 0 [ 39.280448] end_1.4.2 [ 39.368694] rtpcs_930x_sds_sym_err_reset unsupported phy mode [ 39.377832] rtpcs_930x_sds_sym_err_reset unsupported phy mode [ 39.384420] rtpcs_930x_sds_sym_err_get unsupported PHY-mode [ 39.392025] rtpcs_930x_sds_sym_err_get unsupported PHY-mode [ 39.398278] start_1.1.1 initial value for sds 7 [ 39.403671] end_1.1.1 -- [ 39.406534] start_1.1.2 Load DFE init. value [ 39.411495] end_1.1.2 [ 39.414071] start_1.1.3 disable LEQ training,enable DFE clock [ 39.420732] end_1.1.3 -- [ 39.423609] start_1.1.4 offset cali setting [ 39.428332] end_1.1.4 [ 39.431048] start_1.1.5 LEQ and DFE setting [ 39.435773] rtpcs_930x_sds_do_rx_calibration_1 not PHY-based or SerDes, implement DAC! [ 39.444861] end_1.1.5 [ 39.453492] start_1.2.1 ForegroundOffsetCal_Manual [ 39.458914] end_1.2.1 [ 39.464996] start_1.2.3 Foreground Calibration [ 39.472715] rtpcs_930x_sds_do_rx_calibration_2_3: fgcal_gray: 31, fgcal_binary 31 [ 39.481314] rtpcs_930x_sds_do_rx_calibration_2_3: end_1.2.3 [ 39.487574] start_1.4.1 [ 39.714284] jffs2_scan_eraseblock(): End of filesystem marker found at 0x0 [ 39.724821] jffs2_build_filesystem(): unlocking the mtd device... [ 39.724881] done. [ 39.733999] jffs2_build_filesystem(): erasing all blocks after the end marker... [ 39.766119] end_1.4.1 [ 39.774544] start_1.4.2 [ 39.778533] vth_set_bin = 7 [ 39.781395] vth_set_bin = 3 [ 39.784568] Vth Maunal = 0 [ 39.922340] Tap0 Sign : + [ 39.925396] tap0_coef_bin = 31 [ 39.928332] tap0 manual = 0 [ 39.931921] end_1.4.2 [ 40.042554] rtpcs_930x_sds_sym_err_reset unsupported phy mode [ 40.051610] rtpcs_930x_sds_sym_err_reset unsupported phy mode [ 40.058033] rtpcs_930x_sds_sym_err_get unsupported PHY-mode [ 40.065624] rtpcs_930x_sds_sym_err_get unsupported PHY-mode [ 40.071983] start_1.1.1 initial value for sds 7 [ 40.077245] end_1.1.1 -- [ 40.080090] start_1.1.2 Load DFE init. value [ 40.085001] end_1.1.2 [ 40.087558] start_1.1.3 disable LEQ training,enable DFE clock [ 40.094143] end_1.1.3 -- [ 40.096995] start_1.1.4 offset cali setting [ 40.101880] end_1.1.4 [ 40.104479] start_1.1.5 LEQ and DFE setting [ 40.109192] rtpcs_930x_sds_do_rx_calibration_1 not PHY-based or SerDes, implement DAC! [ 40.118311] end_1.1.5 [ 40.127812] start_1.2.1 ForegroundOffsetCal_Manual [ 40.133340] end_1.2.1 [ 40.140218] start_1.2.3 Foreground Calibration [ 40.147935] rtpcs_930x_sds_do_rx_calibration_2_3: fgcal_gray: 31, fgcal_binary 31 [ 40.156441] rtpcs_930x_sds_do_rx_calibration_2_3: end_1.2.3 [ 40.162785] start_1.4.1 [ 40.478892] end_1.4.1 [ 40.481722] start_1.4.2 [ 40.485699] vth_set_bin = 7 [ 40.488437] vth_set_bin = 3 [ 40.491688] Vth Maunal = 0 [ 40.610699] rtl83xx-switch switch@1b000000 lan1: Link is Up - 100Mbps/Full - flow control rx/tx [ 40.643698] Tap0 Sign : + [ 40.643729] tap0_coef_bin = 31 [ 40.646671] tap0 manual = 0 [ 40.650102] end_1.4.2 [ 40.769504] rtpcs_930x_sds_sym_err_reset unsupported phy mode [ 40.778544] rtpcs_930x_sds_sym_err_reset unsupported phy mode [ 40.785059] rtpcs_930x_sds_sym_err_get unsupported PHY-mode [ 40.792780] rtpcs_930x_sds_sym_err_get unsupported PHY-mode [ 40.799019] rtpcs_930x_setup_serdes: SerDes RX calibration failed [ 40.830951] 8021q: adding VLAN 0 to HW filter on device lan10 [ 40.837652] switch: port 1(lan1) entered blocking state [ 40.843589] switch: port 1(lan1) entered forwarding state [ 40.861844] switch: port 10(lan10) entered blocking state [ 40.867908] switch: port 10(lan10) entered disabled state [ 40.874174] rtl83xx-switch switch@1b000000 lan10: entered allmulticast mode [ 40.882946] rtl83xx-switch switch@1b000000 lan10: entered promiscuous mode [ 40.903389] rtl83xx-switch switch@1b000000 lan11: configuring for inband/sgmii link mode [ 40.912752] realtek-otto-pcs 1b000000.switchcore:pcs: pcs_config(sgmii) for port 26 and sds 8 not yet fully implemented [ 40.924903] rtpcs_930x_sds_set 31 [ 40.942907] rtpcs_930x_phy_enable_10g_1g 1gbit phy: 00001140 [ 40.949256] rtpcs_930x_phy_enable_10g_1g 1gbit phy enabled: 00001140 [ 40.956442] rtpcs_930x_phy_enable_10g_1g 10gbit phy: 00002040 [ 40.962944] rtpcs_930x_phy_enable_10g_1g 10gbit phy after: 00002040 [ 40.969960] rtpcs_930x_phy_enable_10g_1g set medium: 00000002 [ 40.976452] rtpcs_930x_phy_enable_10g_1g set medium after: 00000002 [ 40.983904] rtpcs_930x_setup_serdes: Configuring RTL9300 SERDES 8 [ 40.991736] rtpcs_930x_sds_config_pll: SDS 8 using ring PLL for sgmii [ 41.048480] rtpcs_930x_sds_10g_idle WARNING: Waiting for RX idle timed out, SDS 8 [ 41.056912] start_1.1.1 initial value for sds 8 [ 41.062227] end_1.1.1 -- [ 41.065079] start_1.1.2 Load DFE init. value [ 41.069871] end_1.1.2 [ 41.072549] start_1.1.3 disable LEQ training,enable DFE clock [ 41.079029] end_1.1.3 -- [ 41.081992] start_1.1.4 offset cali setting [ 41.086707] end_1.1.4 [ 41.089258] start_1.1.5 LEQ and DFE setting [ 41.094059] end_1.1.5 [ 41.103578] start_1.2.1 ForegroundOffsetCal_Manual [ 41.108984] end_1.2.1 [ 41.115923] start_1.2.3 Foreground Calibration [ 41.123555] rtpcs_930x_sds_do_rx_calibration_2_3: fgcal_gray: 31, fgcal_binary 31 [ 41.132070] rtpcs_930x_sds_do_rx_calibration_2_3: end_1.2.3 [ 41.138306] start_1.4.1 [ 41.459082] end_1.4.1 [ 41.461943] start_1.4.2 [ 41.465918] vth_set_bin = 7 [ 41.468650] vth_set_bin = 3 [ 41.471902] Vth Maunal = 0 [ 41.631065] Tap0 Sign : + [ 41.634111] tap0_coef_bin = 31 [ 41.637049] tap0 manual = 0 [ 41.640481] end_1.4.2 [ 41.742611] 8021q: adding VLAN 0 to HW filter on device lan11 [ 41.762124] switch: port 11(lan11) entered blocking state [ 41.768207] switch: port 11(lan11) entered disabled state [ 41.774440] rtl83xx-switch switch@1b000000 lan11: entered allmulticast mode [ 41.783202] rtl83xx-switch switch@1b000000 lan11: entered promiscuous mode [ 41.804089] rtl83xx-switch switch@1b000000 lan12: configuring for inband/sgmii link mode [ 41.813243] realtek-otto-pcs 1b000000.switchcore:pcs: pcs_config(sgmii) for port 27 and sds 9 not yet fully implemented [ 41.825416] rtpcs_930x_sds_set 31 [ 41.843332] rtpcs_930x_phy_enable_10g_1g 1gbit phy: 00001140 [ 41.849677] rtpcs_930x_phy_enable_10g_1g 1gbit phy enabled: 00001140 [ 41.856862] rtpcs_930x_phy_enable_10g_1g 10gbit phy: 00002040 [ 41.863425] rtpcs_930x_phy_enable_10g_1g 10gbit phy after: 00002040 [ 41.870456] rtpcs_930x_phy_enable_10g_1g set medium: 00000002 [ 41.877219] rtpcs_930x_phy_enable_10g_1g set medium after: 00000002 [ 41.884667] rtpcs_930x_setup_serdes: Configuring RTL9300 SERDES 9 [ 41.892363] rtpcs_930x_sds_config_pll: SDS 9 using ring PLL for sgmii [ 41.948462] rtpcs_930x_sds_10g_idle WARNING: Waiting for RX idle timed out, SDS 9 [ 41.956897] start_1.1.1 initial value for sds 9 [ 41.962205] end_1.1.1 -- [ 41.965050] start_1.1.2 Load DFE init. value [ 41.969844] end_1.1.2 [ 41.972474] start_1.1.3 disable LEQ training,enable DFE clock [ 41.978957] end_1.1.3 -- [ 41.981898] start_1.1.4 offset cali setting [ 41.986617] end_1.1.4 [ 41.989170] start_1.1.5 LEQ and DFE setting [ 41.993974] end_1.1.5 [ 42.003584] start_1.2.1 ForegroundOffsetCal_Manual [ 42.008978] end_1.2.1 [ 42.015977] start_1.2.3 Foreground Calibration [ 42.023577] rtpcs_930x_sds_do_rx_calibration_2_3: fgcal_gray: 31, fgcal_binary 31 [ 42.032039] rtpcs_930x_sds_do_rx_calibration_2_3: end_1.2.3 [ 42.038271] start_1.4.1 [ 42.358433] end_1.4.1 [ 42.361259] start_1.4.2 [ 42.365251] vth_set_bin = 7 [ 42.367984] vth_set_bin = 3 [ 42.371215] Vth Maunal = 0 [ 42.530428] Tap0 Sign : + [ 42.533557] tap0_coef_bin = 31 [ 42.536518] tap0 manual = 0 [ 42.539951] end_1.4.2 [ 42.641992] 8021q: adding VLAN 0 to HW filter on device lan12 [ 42.652018] switch: port 12(lan12) entered blocking state [ 42.658103] switch: port 12(lan12) entered disabled state [ 42.664349] rtl83xx-switch switch@1b000000 lan12: entered allmulticast mode [ 42.673189] rtl83xx-switch switch@1b000000 lan12: entered promiscuous mode [ 76.227446] done. [ 76.229625] jffs2: notice: (2209) jffs2_build_xattr_subsystem: complete building xattr subsystem, 0 of xdatum (0 unchecked, 0 orphan) and 0 of xref (0 dead, 0 orphan) found. [ 76.367346] overlayfs: upper fs does not support tmpfile.


Notes

  • The network needs to be initialised by the bootloader through the rtk network on command. Otherwise the network won't work.

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  • Last modified: 2025/12/29 02:26
  • by tbladykas