Xunlong Orange PI R2S
Orange PI R2S is based on Ky X1 SoC (identical to SpacemiT K1 SoC) and uses a RISCV64 CPU.
- Comes in three variants: 2, 4 or 8 GiB LPDDR4X RAM.
- Storage: 8 GiB via eMMC (possible to re-write images to eMMC via USB2 port)
- Network: features two 2.5 Gbit/s and two 1 Gbit/s ethernet ports.
- Can be used as a switch or router from factory as the device comes with a custom OpenWrt pre-installed. eMMC boots custom OpenWRT from Xunlong (which “works” out of the box, but is not updated).
- Pre-installed U-boot from factory: so it can easily boot any images from the USB3-port, since USB booting comes before booting from eMMC.
- UART TTL serial 3-pin connectors.
OpenWrt support
Not supported in mainline OpenWrt as of 02 Feb 2026.
From factory the Orange PI R2S comes with U-Boot and it's own version of OpenWrt pre-installed on the eMMC. It is using OpenWrt Version v24.10.0 and custom Kernel version Linux 6.6.73, however, there are no updates from Xunlong,
Supporting activities
Ongoing activities that might lead to OpenWrt support.
- Linux kernel v6.19+ have support for Orange PI R2S's RISCV architecture.
https://github.com/riscv/meta-riscv/blob/master/docs/orangepi-r2s.md
https://gitlab.com/rootcommit/orange-pi-riscv-support
- Linux kernel contributions are actively being worked on by Michael Opdenacker (https://rootcommit.com/2026/linux-6-19-contributions/)
- OpenWrt forum thread: https://forum.openwrt.org/t/orangepi-r2s-is-a-great-new-risc-v-openwrt-device/234090/112
Needs investigation Note! Throughput of 2.5 Gbit/s Full Duplex when passing CPU (ie not switching) seems to be impossible with Xunlong's custom version of OpenWRT and Ubuntu.
Maxes out at about 1.07 Gbit/s throughput (iPerf) when traffic is passing CPU. Throughput when traffic is sent directly via switching (layer 2) is around 2.4 Gbit/s but it can't handle that rate in full duplex.
According to Realtek website, the 2.5G Ethernet LINUX driver r8125 for kernel up to 6.12 is version 9.016.01.
The OpenWrt and Ubuntu builds from Xunlong are using old driver version 9.014.0.8125 (log shows “r8125 Ethernet controller driver 9.014.01-NAPI loaded”).
To see if there are CPU or driver issues, the Orange Pi R2S needs to be tested using Linux kernel 6.19+ (for CPU support) in combination with:
1. In-kernel driver for R8125 (6.19+)
2. The latest non-free driver from Realtek (as of Aug 15 2025 latest version is 9.016.01) https://www.realtek.com/Download/List?cate_id=584
Will update page when this has been tested and verified.
Experimental firmware
Official Xunlong Orange PI R2S sources can be found at https://github.com/orangepi-xunlong/
openwrt-ky-riscv64-x1_orangepi-r2s-ext4-sysupgrade_20250515.img.gz (No change since published May 5 2025)
openwrt-ky-riscv64-x1_orangepi-r2s-squashfs-sysupgrade_20250515.img.gz (No change since published May 5 2025)
U-Boot 2022.10 (No change since published Mar 11 2025)
Linux 6.6 orange-pi-6.6-ky (No change since published Mar 18 2025)
Hardware highlights
| CPU | Ram | Flash | Network | WLAN | USB | Serial | JTag |
|---|---|---|---|---|---|---|---|
| Ky X1 8 Core RISC-V AI | 2/4/8 GiB | 8 GiB eMMC | Eth 2x 2.5 Gbit and 2x 1Gbit | No | 1x USB2.0, 1x USB3.0 | Yes 3-pin UART | ? |
Debricking
Hold down MASKROM button for 2 sec while powering up the device.
Buttons
→ hardware.button on howto use and configure the hardware button(s). Here, we merely name the buttons, so we can use them in the above Howto.
The Xunlong Orange PI R2S has the following buttons:
| BUTTON | Event |
|---|---|
| MASKROM key | Maskrom Mode |
Hardware
Info
| Architecture | riscv64 |
|---|---|
| Vendor | Xunlong |
| Bootloader | U-Boot |
| System-On-Chip | Ky X1 SoC (identical to SpacemiT K1 SoC) (https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=323256d11e01d5ee2a0a2e7b682890498b90b212) |
| CPU/Speed | Ky X1 8 Core 64-bit RISC-V AI 2.0TOPS |
| Flash-Chip | eMMC (non-volatile NAND flash memory) |
| Flash size | 8 GiB |
| RAM | 2GB/4GB/8GB LPDDR4X |
| Wireless | No |
| Ethernet | 2 x 2.5 Gbit (RTL8125BG is connected on PCIE Gen2x1) and 2 x 1 Gbit |
| USB 2.0 | 1x USB 2.0 (White). The USB2.0 port can be used for software upgrade and burning software to eMMC. |
| USB 3.0 | 1x USB 3.0 (Blue). The USB3.0 port can be used for booting images via USB storage. |
| Serial | Yes, 3-pin debug serial port, 3.3V level. |
| JTAG | Not populated |
| TF card transfer interface | Unspecified connection-type for “TF card transfer interface”. Peripheral not found as by 2026-02-24. |
| PCB Size | 79.2*46*1.6 mm |
| Type-C Power | Yes, Type-C power supply must be able to deliver 5V 3A |
| Official website | http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/details/Orange-Pi-R2S.html |
| Official manual |
Photos
Photo of PCB
Opening the case
Orange PI R2S does not come with a case.
Serial
→ port.serial general information about the serial port, serial port cable, etc.
How to connect to the Serial Port of this specific device:
3-pins UART TTL Serial.
| Serial connection parameters for Xunlong Orange PI R2S @@Version@@ | 115200, 8N1, 3.3V |
|---|
JTAG
No, JTAG is not populated on the board.
Bootlogs
OEM bootlog
U-Boot logs from factory boot (until it boots from USB3 storage that was used in this case).
U-Boot SPL 2022.10ky (Feb 17 2025 - 21:36:44 +0800) [ 0.121] DDR type LPDDR4X [ 0.131] lpddr4_silicon_init consume 10ms [ 0.132] Change DDR data rate to 2400MT/s mmc_load_image_raw_sector: mmc block read error mmc_load_image_raw_sector: mmc block read error [ 0.528] ## Checking hash(es) for config conf_14 ... OK [ 0.530] ## Checking hash(es) for Image opensbi ... OK [ 0.535] ## Checking hash(es) for Image uboot ... OK [ 0.541] ## Checking hash(es) for Image fdt_14 ... OK [ 0.586]
U-Boot 2022.10ky-OpenWrt-r28427-6df0e3d02a (Feb 03 2025 - 23:09:37 +0000) [ 0.591] CPU: rv64imafdcv [ 0.594] Model: ky x1 orangepi-rv2 board [ 0.598] DRAM: DDR size = 2048 MB [ 0.601] DDR size = 2048 MB [ 0.604] DDR size = 2048 MB [ 0.607] 2 GiB [ 0.681] reset driver probe start [ 0.683] reset driver probe finish [ 0.692] DCDC_REG1@dcdc1: enabling [ 0.693] DCDC_REG3@dcdc3: enabling [ 0.699] LDO_REG1@ldo1: enabling [ 0.703] SWITCH_REG1@switch1: enabling [ 0.703] SWITCH_REG2@pwr-event: enabling [ 0.707] SWITCH_REG3@pwr-int: enabling [ 0.711] SWITCH_REG4@rtc-ctrl: enabling [ 0.715] SWITCH_REG5@rtc-event: enabling [ 0.718] SWITCH_REG6@rtc-irq: enabling [ 0.722] SWITCH_REG7@power-down: enabling [ 0.726] SWITCH_REG8@reboot-flag: enabling [ 0.731] vcc5v-otg-regulator@vcc5v_otg: set 5000000 uV; enabling [ 0.736] vcc3v3-pcie-regulator@vcc3v3_pcie: set 3300000 uV; enabling [ 0.742] DDR size = 2048 MB [ 0.748] Core: 417 devices, 30 uclasses, devicetree: board [ 0.761] WDT: Started PMIC_WDT with servicing (60s timeout) [ 0.766] WDT: Started watchdog@D4080000 with servicing (60s timeout) [ 0.774] MMC: sdh@d4280000: probe done. [ 0.781] sdh@d4281000: probe done. [ 0.781] sdh@d4280000: 0, sdh@d4281000: 2 [ 0.786] Loading Environment from MMC... sdh@d4281000: 74 clk wait timeout(100) [ 0.863] Error: unknown compression type. [ 0.871] OK [ 0.880] Now init Rterm... [ 0.880] pcie prot id = 1, porta_init_done = 0 [ 0.884] Now waiting portA resister tuning done... [ 0.888] porta redonly_reg2: 00006d37 [ 0.892] pcie_rcal = 0x00006d37 [ 0.895] pcie port id = 1, lane num = 2 [ 0.899] Now int init_puphy... [ 0.902] waiting pll lock... [ 0.904] Now finish init_puphy.... [ 0.908] pcie_dw_x1 pcie@ca400000: Unable to get phy0 [ 0.913] pcie_dw_x1 pcie@ca400000: Unable to get phy1 [ 1.045] PCIE-0: Link up (Gen2-x1, Bus0) [ 1.055] Error (-1): cannot determine file size [ 1.056] initialize_console_log_buffer [ 1.060] Have allocated memory for console log buffer [ 1.065] In: serial [ 1.067] Out: serial [ 1.069] Err: serial [ 1.073] Default to 100kHz [ 1.088] EEPROM: TlvInfo v1 len=38 [ 1.088] valid ethaddr: c0:74:2b:fa:1c:b4 [ 1.092] Cannot find TLV data: part# [ 1.096] Cannot find TLV data: serial# [ 1.100] Cannot find TLV data: manufacture_date [ 1.104] Cannot find TLV data: manufacturer [ 1.108] Cannot find TLV data: device_version [ 1.112] Cannot find TLV data: sdk_version [ 1.127] Found device 'hdmi@c0400500', disp_uc_priv=000000007deb4a70 [ 1.237] HDMI cannot get HPD signal [ 1.237] ky_display_init: device 'dpu@c0340000' display won't probe (ret=-1) [ 1.348] HDMI cannot get HPD signal [ 1.348] display devices not found or not probed yet: -1 [ 1.353] All buttons probed successfully [ 1.358] Read PMIC reg ab value f4 [ 1.361] Failed to get fastboot key config: -19 [ 1.366] sdh@d4280000: 74 clk wait timeout(100) [ 1.369] MMC: no card present [ 1.372] mmc_init: -123, time 7 [ 1.376] Net: RGMII interface [ 1.378] eth0: ethernet@cac80000 [ 1.384] Autoboot in 0 seconds [ 1.394] starting USB... [ 1.394] Bus ehci1@c0980100: ehci_x1_ci ehci1@c0980100: ehci_mv_probe Enter ... [ 1.405] mv_usb_phy usbphy1@c09c0000: x1-ci-usb-phy-probe: Enter... [ 1.409] ehci_x1_ci ehci1@c0980100: ehci-x1-ci: init hccr c0980100 and hcor c0980140 hc_length 64 [ 1.432] USB EHCI 1.00 [ 1.432] Bus dwc3@c0a00000: No USB maximum speed specified. Using super speed [ 1.444] mv_usb_phy usb2phy@0xc0a30000: x1-ci-usb-phy-probe: Enter... [ 1.448] x1_combphy phy@c0b10000: USB3 PHY init. [ 1.452] dwc3-generic-host dwc3@c0a00000: this is a DesignWare USB3 DRD Core [ 1.873] Register 2000140 NbrPorts 2 Starting the controller [ 1.876] USB XHCI 1.10 [ 1.878] scanning bus ehci1@c0980100 for devices... 1 USB Device(s) found [ 3.017] scanning bus dwc3@c0a00000 for devices... 2 USB Device(s) found [ 4.145] scanning usb for storage devices... 1 Storage Device(s) found [ 4.149] Device 0: Vendor: USB Mass Rev: Prod: Storage Device [ 4.155] Type: Removable Hard Disk [ 4.159] Capacity: 60906.0 MB = 59.4 GB (124735488 x 512) [ 4.166] ... is now current device [ 4.169] Scanning usb 0:1... [ 4.174] Found U-Boot script /boot/boot.scr [ 4.177] 2544 bytes read in 1 ms (2.4 MiB/s) [ 4.180] ## Executing script at 2c100000 [ 4.184] Boot script loaded from usb 0 ...
OpenWrt bootlog
COPY HERE THE BOOTLOG ONCE OPENWRT IS INSTALLED AND RUNNING