MokerLink 2G080GM

The MokerLink 2G080GM is an 8-port 2.5GbE managed Ethernet switch based on the Realtek RTL9303 platform.

OpenWrt hardware bring-up, persistent installation, sysupgrade, recovery to stock firmware, and installation through the stock web interface have all been validated on hardware.

Normal installation does not require modification of the U-Boot environment or serial-console access. The stock web interface accepts the generated OpenWrt squashfs-factory.bix image directly.

Initial OpenWrt bring-up used the closely related Hasivo S1100WP-8GT-SE as a useful reference. Board-specific properties on the MokerLink were subsequently verified against the physical hardware.

See the OpenWrt forum development thread and upstream pull request for current status.

The vendor bootloader identifies the board hardware profile as:

RTL9303_8X8226

The stock bootloader enumerates external PHY-facing RTL9303 switch ports:

0, 8, 16, 20, 24, 25, 26, 27

Under OpenWrt, all eight PHYs bind to the Realtek RTL8221B driver.

The board has 128 MiB RAM. This differs from some closely related RTL9303 switch designs, so memory configuration from another device should not be copied without verification.

The physical-to-OpenWrt port numbering above has been verified by individually cable-testing all eight front-panel ports.

TODO: Add photographs of:

• front of enclosure
• rear / power input
• product label
• PCB overview
• RTL9303 / heatsink area
• SPI flash
• serial header
• relevant PCB revision markings

The switch uses a metal enclosure.

The main SoC heatsink is retained using push-pin fasteners. The heatsink was not removed during the initial OpenWrt bring-up and does not need to be removed for serial access or normal firmware development.

TODO: Add photographs and exact enclosure-opening steps.

The stock bootloader and OpenWrt console use:

Example host command using picocom:

picocom -b 38400 --flow n --databits 8 --parity n --stopbits 1 /dev/ttyUSB0

TODO: Add verified serial-header pin order and a labelled PCB photograph.

Do not assume the pinout from another RTL9303 switch. Verify GND/TX/RX on the actual board before connecting a USB serial adapter.

The switch contains a 16 MiB SPI NOR device.

The following layout has been observed and reproduced by the OpenWrt device tree:

During RAM-boot development, the bootloader and protected vendor partitions were repeatedly hashed before and after cold boots, warm reboots, and reset-button reboots and remained unchanged.

The vendor firmware uses a legacy uImage header with the non-standard magic:

0x83800000

The OpenWrt device definition generates images using the same magic.

The firmware partition is described using:

compatible = "openwrt,uimage", "denx,uimage";
openwrt,ih-magic = <0x83800000>;

This allows both the vendor U-Boot implementation and the OpenWrt firmware splitter to recognize the image correctly.

Two persistent images are generated:

The factory image contains the same kernel/rootfs payload as the sysupgrade image but without the trailing OpenWrt sysupgrade metadata.

Normal installation does not require serial-console access or modification of U-Boot.

1. Open the stock web interface.
2. Navigate to Management → Firmware.
3. Select Upgrade.
4. Select HTTP.
5. Upload the OpenWrt squashfs-factory.bix image.
6. Wait for the stock interface to report that the upgrade completed.
7. Reboot the switch.

After reboot, OpenWrt starts directly from flash.

The Image0 / Image1 selector present in the vendor interface applies to firmware backup/export. It is not presented during firmware upload.

For subsequent OpenWrt upgrades, use:

squashfs-sysupgrade.bin

TFTP boot is the currently tested development method because it permits OpenWrt hardware validation without installing OpenWrt to flash.

A serial console is strongly recommended.

The following is representative of the tested development setup:

• switch IP: 192.168.0.1
• TFTP server: 192.168.0.111
• load address: 0x84f00000
• image: locally built OpenWrt initramfs uImage

Example U-Boot commands:

setenv netretry no
setenv autostart yes
setenv ipaddr 192.168.0.1
setenv serverip 192.168.0.111
rtk network on
tftpboot 0x84f00000 mokerlink-initramfs.bin

With autostart=yes, the tested vendor U-Boot automatically boots the downloaded legacy uImage after a successful transfer.

Do not run saveenv when merely testing an initramfs image. The variables above can be used temporarily for a RAM-boot session.

A successful transfer looks similar to:

Using rtl9300#0 device
TFTP from server 192.168.0.111; our IP address is 192.168.0.1
Filename 'mokerlink-initramfs.bin'.
Load address: 0x84f00000
Loading: ...
done
Automatic boot of image at addr 0x84F00000 ...
## Booting kernel from Legacy Image at 84f00000 ...
   Image Name:   MIPS OpenWrt Linux
   Load Address: 80100000
   Entry Point:  80100000
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK

The vendor U-Boot networking implementation has been somewhat sensitive to physical link setup during development.

A 2.5GbE-capable intermediary switch between the TFTP server and the MokerLink has proven reliable. If TFTP does not work over a direct host-to-switch cable, try using a compatible intermediary switch before assuming the bootloader network driver is broken.

OpenWrt creates a DSA bridge containing:

lan1 lan2 lan3 lan4 lan5 lan6 lan7 lan8

The default development configuration bridges all eight ports on VLAN 1.

All eight front-panel ports have been individually tested with real IP traffic.

Every port has also been tested at:

• 100 Mbit/s full duplex
• 1 Gbit/s full duplex
• 2.5 Gbit/s full duplex

The kernel identifies the PHYs as:

RTL8221B-VB-CG 2.5Gbps PHY

The vendor bootloader uses the older/profile designation RTL9303_8X8226. The Linux PHY driver identification above reflects the actual PHY revision detected by OpenWrt.

The front-panel system/status LED is controlled by:

GPIO 0, active high

It has been tested with:

• forced off
• forced on
• heartbeat trigger

The OpenWrt device tree also assigns the system LED as:

led-boot
led-failsafe
led-running
led-upgrade

The physical reset button is:

GPIO 5, active low

It is exposed as KEY_RESTART.

A physical button press has been verified to cause a normal OpenWrt reboot, including clean DSA shutdown followed by return to U-Boot.

The RTL9303 hardware LED controller is used for the Ethernet port LEDs.

Observed behavior:

The port LEDs require the RTL9303 LED_SYNC pinmux to be enabled on this board.

During development, the Realtek LED configuration was parsed correctly but the physical RJ45 LEDs remained dark until LED_SYNC was enabled. This was verified by an A/B RAM-boot test.

The final board description enables LED_SYNC through the gpio-leds device pinctrl state.

The power LED appears to be rail-driven / hardware-controlled rather than software-controlled.

No software GPIO mapping has been assigned for the power LED.

The factory base MAC address is stored in the vendor U-Boot environment as ethaddr.

OpenWrt retrieves this through an NVMEM cell in the u-boot-env / BDINFO region and assigns it to the Ethernet interface.

The device tree uses the vendor-provided address rather than hard-coding a MAC.

The MAC address of the development unit is intentionally not documented here because it is unit-specific.

DSA bridge VLAN filtering has been validated with both access and trunk ports.

A temporary test configuration used:

Validation included:

• forwarding between hosts on the same untagged VLAN
• isolation between different L2 VLANs
• tagged VLAN 10 traffic on the trunk port
• tagged VLAN 20 traffic on the trunk port
• continued management connectivity outside the temporary test VLANs

The test configuration was intentionally temporary and is not intended as a recommended production network configuration.

Multiple recovery paths have been validated or established during development.

For a normally functioning OpenWrt installation, use the standard OpenWrt squashfs-sysupgrade.bin image.

For advanced recovery or development:

1. attach the 38400 8N1 serial console
2. interrupt U-Boot
3. initialize vendor networking using rtk network on
4. TFTP-load an OpenWrt initramfs image to 0x84f00000
5. boot the initramfs image without writing flash

The stock firmware RUNTIME image is flash-mapped at:

0xb4300000

Before persistent development, a full external SPI flash dump and individual MTD backups were created.

Users performing low-level recovery should use backups from their own device. BDINFO, SYSINFO, OEMINFO and other vendor partitions may contain unit-specific information.

Restoration of the original vendor RUNTIME partition has been tested.

The safest low-level method is to boot an OpenWrt initramfs image and write a backup of the unit's original firmware / RUNTIME partition.

Do not restore another unit's complete flash image unless you understand which regions contain device-specific data.

An external SPI programmer remains the final recovery method if the bootloader itself or protected flash regions are damaged.

Example excerpt from a development RAM boot:

U-Boot 2011.12.(3.6.6.55087)

Board: RTL9300 CPU:800MHz LX:175MHz DDR:600MHz
DRAM:  128 MB
SPI-F: FUDANWEI/... 1x16 MB

Hardware-profile probe (RTL9303_8X8226)

unit=0 port=0
unit=0 port=8
unit=0 port=16
unit=0 port=20
unit=0 port=24
unit=0 port=25
unit=0 port=26
unit=0 port=27

...

Realtek RTL9303 rev B (...) SoC with 128 MB
MIPS: machine is MokerLink 2G080GM
earlycon: ns16550a0 at MMIO 0x18002000 (options '38400n8')

...

Creating 7 MTD partitions on "spi0.0":
0x000000000000-0x0000000e0000 : "u-boot"
0x0000000e0000-0x0000000f0000 : "u-boot-env"
0x0000000f0000-0x000000100000 : "u-boot-env2"
0x000000100000-0x000000200000 : "jffs"
0x000000200000-0x000000300000 : "jffs2"
0x000000300000-0x000000f00000 : "firmware"
0x000000f00000-0x000001000000 : "oeminfo"

...

lan1: PHY driver [RTL8221B-VB-CG 2.5Gbps PHY]
lan2: PHY driver [RTL8221B-VB-CG 2.5Gbps PHY]
lan3: PHY driver [RTL8221B-VB-CG 2.5Gbps PHY]
lan4: PHY driver [RTL8221B-VB-CG 2.5Gbps PHY]
lan5: PHY driver [RTL8221B-VB-CG 2.5Gbps PHY]
lan6: PHY driver [RTL8221B-VB-CG 2.5Gbps PHY]
lan7: PHY driver [RTL8221B-VB-CG 2.5Gbps PHY]
lan8: PHY driver [RTL8221B-VB-CG 2.5Gbps PHY]

The exact OpenWrt kernel/revision shown in development logs is intentionally omitted here because development is ongoing and the version will change.

Hardware support has been submitted as:

https://github.com/openwrt/openwrt/pull/25193

The pull request is currently pending OpenWrt review and CI.

Until the change is merged and official snapshots are produced, this page should not be interpreted as indicating that an official downloadable OpenWrt image already exists for the device.

During link initialization, OpenWrt may print messages similar to:

realtek-otto-pcs ... SerDes N: waiting for RX idle timed out

The affected ports subsequently configure correctly and have been validated with real traffic at 100 Mbit/s, 1 Gbit/s and 2.5 Gbit/s.

So far this has not indicated a functional Ethernet failure.

The power LED appears to be hardware / rail controlled and has no OpenWrt software mapping.

Only the tested hardware revision has been validated.

Users with visibly different PCB revisions, flash parts or PHY layouts should verify hardware details before assuming identical compatibility.

• OpenWrt upstream pull request #25193
• MokerLink 2G080GM OpenWrt development thread
• Related Hasivo switch discussion
• RTL838x / RTL93xx switch development discussion