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inbox:toh:arcadyan:astoria:arv7520cw22-a_lt_aka_orange_livebox_2.1_v2_2015 [2021/09/06 11:30] – [OEM bootlog] mandrake-leeinbox:toh:arcadyan:astoria:arv7520cw22-a_lt_aka_orange_livebox_2.1_v2_2015 [2021/09/17 15:30] – [HACKS] mandrake-lee
Line 6: Line 6:
 {{page>meta:infobox:construction&noheader&nofooter&noeditbtn}} {{page>meta:infobox:construction&noheader&nofooter&noeditbtn}}
  
-//*WARNING* Please do not get confused with [[:toh:arcadyan:arv7519rw22|Livebox 2.1 ARV7519RW]], which has a quite different hardware. As both models share almost the same case, please check the label at the bottom of the router.\\ +| {{:meta:icons:tango:48px-dialog-warning.svg.png?nolink}} | **WARNING:** Please do not get confused with [[:toh:arcadyan:arv7519rw22|Livebox 2.1 ARV7519RW]], which has a quite different hardware. As both models share almost the same case, please check the label at the bottom of the router. |
  
 From 2015 onwards, ISP Orange was installing this model which can be easily mistaken by its predecessor ARV7519RW. From 2015 onwards, ISP Orange was installing this model which can be easily mistaken by its predecessor ARV7519RW.
  
 This looks as a cost reduction step since there's just 1 USB port and the ethernet gigabit port is missing. This looks as a cost reduction step since there's just 1 USB port and the ethernet gigabit port is missing.
-// 
  
 /*****/ /*****/
Line 18: Line 16:
 /*****/ /*****/
  
-{{ media:example:genericrouter1.png?200|Generic Router}}+{{ :media:arcadyan:arv7520:arv7520cw22_front_cover.jpg?200|}} 
  
  
Line 119: Line 118:
 ^ Architecture     | [[wp>MIPS%20architecture]]               | ^ Architecture     | [[wp>MIPS%20architecture]]               |
 ^ Vendor           | [[wp>Lantiq|Lantiq]]                     | ^ Vendor           | [[wp>Lantiq|Lantiq]]                     |
-^ Bootloader       | [[:docs:techref:bootloader:brnboot|brnboot]]                           +^ Bootloader       | [[:docs:techref:bootloader:brnboot|brnboot]] v2.01.07                      
-^ System-On-Chip   | Lantiq ARX220 V1.1 (PSB50221 EL)  |+^ System-On-Chip   | Lantiq ARX220 V1.1 (PSB50221 EL) (variant of VRX288 v2?) |
 ^ CPU/Speed        | 500 MHz                          | ^ CPU/Speed        | 500 MHz                          |
-^ Flash-Chip       | MX30LF1G08                           |+^ Flash-Chip       | MX30LF1G08 NAND                    |
 ^ Flash size       | 128 MiB                            | ^ Flash size       | 128 MiB                            |
-^ RAM              | 1 GiB https://datasheetspdf.com/pdf-file/1085866/EtronTechnology/EM68C16CWQE/                         |+^ RAM              | 128 MiB [[https://datasheetspdf.com/pdf-file/1085866/EtronTechnology/EM68C16CWQE/1|EM68C16CWQE-25H]]                          |
 ^ Wireless         | BCM 43217 2.4GHz 802.11bgn        | ^ Wireless         | BCM 43217 2.4GHz 802.11bgn        |
 ^ Ethernet         | 10/100 Mbit/s w/ vlan support    | ^ Ethernet         | 10/100 Mbit/s w/ vlan support    |
Line 141: Line 140:
 </WRAP> </WRAP>
 ***/ ***/
 +
 +==== About SoC ARX220 ====
 +There's no information about this SoC.
 +
 +However, there're some hints in Lantiq code about a VRX220 platform, being a variant of VR9.
 +
 +Reading the chipid memory location at 0xbf107340 leads to:
 +|1st chunk|0x0001820|Manufacturer|
 +|2nd chunk|0x2000b713|Chipid & revision|
 +
 +Therefore, the chip has the same internal id as VRX288 v1.2 and we expect to be almost fully compatible with it.
 +
 +The only known difference is the ethernet phy, being only x4 10/100 ports, with no Gb port. This is similar to evaluation board EASY220.
  
  
Line 150: Line 162:
  
 **Insert photo of front of the casing** **Insert photo of front of the casing**
 +{{:media:arcadyan:arv7520:arv7520cw22_front_cover.jpg?400|}}
  
 **Insert photo of back of the casing** **Insert photo of back of the casing**
 +{{:media:arcadyan:arv7520:arc7520cw22_rear.jpg?400|}}
  
 **Insert photo of backside label** **Insert photo of backside label**
 +{{:media:arcadyan:arv7520:arv7520cw22_back_label.jpg?400|}}
  
 **Insert photo of PCB** **Insert photo of PCB**
 +{{:media:arcadyan:arv7520:arv7520cw22_board.jpg?600|}}
  
 ==== Opening the case ==== ==== Opening the case ====
  
-<WRAP BOX> +  - Remove the pads (x4) 
-FIXME //Describe what needs to be done to open the devicee.gremove rubber feet, adhesive labels, screws, ...// +  - Remove the screws beneath the pads (x4) 
-</WRAP>+  - Firmlydetach the outer case from the innerMost probably you will need a flat screwdriver as leverQuite surprisinglythe case is well designed and no clips are damagedHint: start from the back of the router all around as the arrow shows.
  
 +{{:media:arcadyan:arv7520:arv7520cw22_opening_instructions.jpg?400|}}
 ==== Serial ==== ==== Serial ====
 -> [[docs:techref:hardware:port.serial]] general information about the serial port, serial port cable, etc. -> [[docs:techref:hardware:port.serial]] general information about the serial port, serial port cable, etc.
  
 How to connect to the Serial Port of this specific device:\\ How to connect to the Serial Port of this specific device:\\
-**Insert photo of PCB with markings for serial port**+The UART port with no pins is located close to the SoC. 
 + 
 +Find below the pinout
  
 <WRAP BOX> <WRAP BOX>
-FIXME //Replace EXAMPLE by real values.//+FIXME// Do not connect Vcc to your serial device.//
 </WRAP> </WRAP>
 +
 +**Insert photo of PCB with markings for serial port**
 +{{:media:arcadyan:arv7520:arv7520cw22_uart_and_flash_hack.jpg?400|}}
  
 ^ Serial connection parameters\\ for Arcadyan / Astoria ARV7520CW22-A_LT (AKA Orange Livebox 2.1 v2 (2015) | EXAMPLE 115200, 8N1 | ^ Serial connection parameters\\ for Arcadyan / Astoria ARV7520CW22-A_LT (AKA Orange Livebox 2.1 v2 (2015) | EXAMPLE 115200, 8N1 |
Line 180: Line 202:
 How to connect to the JTAG Port of this specific device:\\ How to connect to the JTAG Port of this specific device:\\
 **Insert photo of PCB with markings for JTAG port** **Insert photo of PCB with markings for JTAG port**
 +
 +==== HACKS ====
 +
 +=== Soft hacks ===
 +While switching on the router, a certain combo of buttons will grant you access to hidden functions. You will notice you're there because of the fancy movement of the leds.
 +
 +== Access to tiny kernel/Restore Tool ==
 +If buttons //reset & wifi// are pressed together during switching on, you will get access to recovery menu at <code>http://192.168.1.1</code>
 +
 +{{ :media:arcadyan:arv7520:tiny_kernel.jpg?direct&400 |}}
 +
 +== Access to VR9 menu ==
 +If buttons //reset & wifi & wps// are pressed together during switching on, you will jump immediatly in the serial console to VR9 menu:
 +<code>
 +ROM VER: 1.1.4
 +CFG 06
 +NAND
 +NAND Read OK
 +DDR PARAM flash addr 1700000
 +DDR PARAM:
 +88888888
 +001a2520
 +001a2120
 +00566301
 +00566501
 +00000200
 +
 +DDR autotuning Rev 1.0
 +DDR check ok... start booting...
 +
 +END TUNE DDR
 +Start booting...........
 +
 +
 +
 +=======================================================================
 +Wireless ADSL IAD VR9 Loader v2.01.07 build Oct 22 2014 16:13:17
 +                    Arcadyan Technology Corporation
 +=======================================================================
 +
 +
 +
 +[VR9 Boot]:
 +</code>
 +\\
 +=== Hard hacks ===
 +During boot, specific NAND flash pins can be shorcircuited in order to provoke a boot fail and therefore access to bootfail options.
 +
 +| {{:meta:icons:tango:48px-dialog-warning.svg.png?nolink}} | **WARNING:** This method is considered to be safe. The only fatal error seen, after some brutal manipulation, was the removal of the DDR tuning parameters. However, BRNBOOT is capable of recovering them after performing an autotuning\\ |
 +
 +
 +== Access to UART mode ==
 +  - Switch off the device
 +  - Shortcircuit pin 8&9. See diagram at the bottom. Use the tip of a needle, thin screwdriver, etc
 +  - Switch on the device. You will see the following message:
 +
 +<code>
 +ROM VER: 1.1.4
 +CFG 02
 +UART
 +</code>
 +
 +\\
 +
 +== Access to VR9 menu ==
 +This hack will need some training and skill. Don't give up!
 +Basically, we will let the system jump to brnboot and corrupt the loading of any further image from NAND flash.
 +
 +  - Switch off the device
 +  - Let system jump to the "Init..." line
 +  - Now shortcircuit pins 8&9. See diagram at the bottom. Use the tip of a needle, thin screwdriver, etc
 +  - After success, error messages will pop up and you will have access to the VR9 command line
 +
 +<WRAP bootlog>
 +<nowiki>
 +ROM VER: 1.1.4
 +CFG 06
 +NAND
 +NAND Read OK
 +DDR PARAM flash addr 1700000
 +DDR PARAM:
 +88888888
 +001a2420
 +001a2120
 +00566301
 +00566301
 +00000500
 +
 +DDR autotuning Rev 1.0
 +DDR check ok... start booting...
 +
 +END TUNE DDR
 +Start booting...........
 +
 +
 +
 +=======================================================================
 +Wireless ADSL IAD VR9 Loader v2.01.07 build Oct 22 2014 16:13:17
 +                    Arcadyan Technology Corporation
 +=======================================================================
 +
 +
 +Init......read page ECC check ret = -1, addr = 0x01700800
 +NAND Read Error: addr 0x1700800
 +read 0x01700000 ERROR: ret = 0
 +Image Check from FLASH_AREA_IMAGE_1 :
 +Unzipping firmware at 0x80002000 ... with nAREA[2]read page ECC check ret = -1, addr = 0x014FFFF4
 +NAND Read Error: addr 0x14ffff4
 +read 0x014FFFF4 ERROR: ret = 0
 + failed : 4 !!
 +Try unzipping firmware again...read page ECC check ret = -1, addr = 0x00B00800
 +NAND Read Error: addr 0xb00800
 +read 0x00B00000 ERROR: ret = 0
 + failed : 4 !!
 +Unzipping firmware at 0x80002000 ... with nAREA[1]read page ECC check ret = -1, addr = 0x00AFFFF4
 +NAND Read Error: addr 0xaffff4
 +read 0x00AFFFF4 ERROR: ret = 0
 + failed : 4 !!
 +Try unzipping firmware again...read page ECC check ret = -1, addr = 0x00100800
 +NAND Read Error: addr 0x100800
 +read 0x00100000 ERROR: ret = 0
 + failed : 4 !!
 +Unzipping Tiny Kernel at 0x80002000 ... read page ECC check ret = -1, addr = 0x00000000
 +NAND Read Error: addr 0x0
 +read 0x00000000 ERROR: ret = 0
 + failed : 4 !!
 +
 +[VR9 Boot]:
 +</nowiki>
 +</WRAP>
 +
 +\\
 +{{:media:arcadyan:arv7520:arv7520cw22_uart_and_flash_hack.jpg?400|}}
 +
 +==== VR9 menu ====
 +Using the VR9 hack above, now you can enter the menu of the brnbootloader.
 +
 +This is a piece of litte documented software; on the top of this, the help menus are censored in this version, giving no guiding information.
 +
 +Nonetheless, we can use the help from older releases:
 +
 +  - Press "!" to gain administrator mode
 +  - Now the following options will be available *but not visible*. Use them at will
 +
 +<code>
 + ======================
 + [#] Set Serial Number
 + [2] Use Normal Firmware
 + [3] Use ART-Testing Firmware
 + [9] Taggle ART Firmware Enable/Disable
 + [A] Set MAC Address
 + [E] Erase Flash
 + [G] Run Runtime Code
 + [H] Set Options
 + [M] Upload to Memory
 + [P] Print Boot Params
 + [R] Read from Memory
 + [T] Memory Test
 + [U] Upload to Flash
 + [V] Set Board Version
 + [W] Write to Memory
 + [Y] Go to Memory
 + [Z] Dump DDR Ram Register
 + [0] Primary = Image 0
 + [1] Primary = Image 1
 + ======================
 +</code>
 +
 +Nota: Undocumented option [k] will kick the tiny kernel boot. See log at the bottom.
 +===== OEM backdoors =====
 +This section will deal with some interesting features available in the OEM firmware.
 +
 +Type in the below URL's in your browser once connected to your router. Most of the times you need to have 2 tabs open, first for the identification admin/admin, the second to get to the actual function.
 +
 +You can check all the article in spanish [[https://www.adslzone.net/foro/livebox.117/descubierto-paginas-ocultas-livebox-2-1.401202/|here]]. Note: the original article refers to 192.168.2.1 which is not working in our case.
 +
 +==== Firmware update ====
 +<code>http://192.168.1.1/system_firmwarel.stm</code>
 +
 +==== Config file (unencrypted) ====
 +<code>http://192.168.1.1/cgi-bin/config.bin</code>
 +
 +==== FTP server at USB====
 +Via port 8000
 +<code>http://192.168.1.1/usb_wftp_server.stm </code>
 +===== Bootloader mods =====
 +
 +==== U-Boot 2013.10 ====
 +There is an available porting for this board, which is not integrated in openwrt main stream. Sources can be found [[https://github.com/Mandrake-Lee/u-boot-2013.10_arv7520cw22|here]]
 +
 +A UART mode binary, useful in order to make a backup of the nand flash, is available [[https://github.com/Mandrake-Lee/u-boot-2013.10_arv7520cw22_binaries/raw/main/u-boot_2013_10_arv7520cw22_RAM.asc|here]]
 +
 +
 +===== Flash partition =====
 +==== OEM partition (BRN) ====
 +Via VR9 menu (see above hacks) you can see:
 +<code>
 +---------------------------------------
 +    Area            Address      Length
 +---------------------------------------
 +[0] Boot            0x00000000    1024K
 +[1] Image 0         0x00100000   10240K
 +[2] Image 1         0x00B00000   10240K
 +[3] Configuration   0x01500000    2048K
 +[4] Boot Params     0x01700000    2048K
 +[5] Nvram           0x01900000    1024K
 +[6] Cert            0x01A00000   32768K
 +[7] EmergencyValue  0x03A00000    6144K
 +[8] Configuration2  0x04000000    2048K
 +[9] All area        0x00000000   67584K
 +---------------------------------------
 +</code>
  
 ===== Bootlogs ===== ===== Bootlogs =====
Line 1524: Line 1758:
 DSL[00]: Autoboot State : Train DSL[00]: Autoboot State : Train
 DSL[00]: modem state = 0x00000200, 68409 DSL[00]: modem state = 0x00000200, 68409
 +</nowiki>
 +</WRAP>\\
 +
 +==== OEM tiny kernel bootlog ====
 +This mode can be accessed via soft hack. Check above.
 +<WRAP bootlog>
 +<nowiki>
 +ROM VER: 1.1.4
 +CFG 06
 +NAND
 +NAND Read OK
 +DDR PARAM flash addr 1700000
 +DDR PARAM:
 +88888888
 +001a2520
 +001a2120
 +00566301
 +00566501
 +00000200
 +
 +DDR autotuning Rev 1.0
 +DDR check ok... start booting...
 +
 +END TUNE DDR
 +Start booting...........
 +
 +
 +
 +=======================================================================
 +Wireless ADSL IAD VR9 Loader v2.01.07 build Oct 22 2014 16:13:17
 +                    Arcadyan Technology Corporation
 +=======================================================================
 +
 +
 +Init......read page ECC check ret = -1, addr = 0x01700000
 +NAND Read Error: addr 0x1700000
 +read 0x01700000 ERROR: ret = 0
 +Image Check from FLASH_AREA_IMAGE_1 :
 +Unzipping firmware at 0x80002000 ... with nAREA[2]read page ECC check ret = -1, addr = 0x014FFFF4
 +NAND Read Error: addr 0x14ffff4
 +read 0x014FFFF4 ERROR: ret = 0
 + failed : 4 !!
 +Try unzipping firmware again...read page ECC check ret = -1, addr = 0x00B00800
 +NAND Read Error: addr 0xb00800
 +read 0x00B00000 ERROR: ret = 0
 + failed : 4 !!
 +Unzipping firmware at 0x80002000 ... with nAREA[1] failed : 4 !!
 +Try unzipping firmware again...read page ECC check ret = -1, addr = 0x00107000
 +NAND Read Error: addr 0x107000
 +read 0x00100000 ERROR: ret = 0
 + failed : 4 !!
 +Unzipping Tiny Kernel at 0x80002000 ... read page ECC check ret = -1, addr = 0x00000800
 +NAND Read Error: addr 0x800
 +read 0x00000000 ERROR: ret = 0
 + failed : 4 !!
 +
 +[VR9 Boot]:k
 +
 +Unzipping Tiny Kernel at 0x80002000 ... [ZIP 1]  done
 +Tiny ETCPIP running ...
 +
 +Ready to run firmware
 +
 +In c_entry() function ...
 +install_exception
 +Co config = 80048483
 +sys_irq_init ...
 +Tiny Kernel System startup...
 +CPU Clock 500000000 Hz
 +init_US_counter : time1 = 28 , time2 = 3600067, diff 3600039
 +US_counter = 112
 + cnt1 4576977 cnt2 4579557, diff 2580
 + cnt1 4576977 cnt2 4579557, diff 2580
 +nand_init...
 +MXIC NAND 128MB 3,3V 8-bit found
 +-----------------------------
 +NAND page size    : 2048
 +NAND oob size     : 64
 +NAND block size   : 131072
 +NAND page/block   : 64
 +NAND block/chip   : 1024
 +NAND chip size    : 0x8000000
 +NAND page shift   : 11
 +NAND page mask    : 0xFFFF
 +NAND block shift  : 17
 +-----------------------------
 +
 +Scan BAD Block ...
 +0 Bad Block(s)
 +
 +tcpip_startup...
 +Set flash memory layout to BPARAMS+RECOVER_KERNEL
 +Bootcode version: v2.01.07
 +Serial number   : A000000001
 +Hardware version: R0A
 +!!No configuration file present!!
 +default route: 0.0.0.0
 +default route: 0.0.0.0
 +BufferInit:
 +BUF_HDR_SZ=64 BUF_ALIGN_SZ=28 BUFFER_OFFSET=128
 +BUF_BUFSZ0=384 BUF_BUFSZ1=1632
 +NUM_OF_B0=24 NUM_OF_B1=800
 +BUF_POOL0_SZ=10752 BUF_POOL1_SZ=1356800
 +Buf0_Block 80305d18  Buf1_Block 801ba8f8
 +BUF0[0]=0x80305d20 BUF1[0]=0x801ba900
 +
 +buffer0 pointer init OK!
 +buffer1 pointer init OK!
 +init_if() ; gConfig.Interface[0].Link_Type is [4]
 +Interface 0 ip = 127.0.0.1
 +
 +init_if() ; gConfig.Interface[1].Link_Type is [1]
 +[KERN_INFO]IFX PMU driver, version 1.0.5, (c)2009 Infineon Technologies AG
 +ifx_dma_init_module :
 +[map_dma_chan 1550]: dma_chan[0] request_irq 64
 +IrqConnect : IRQ = 64, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[1] request_irq 65
 +IrqConnect : IRQ = 65, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[2] request_irq 66
 +IrqConnect : IRQ = 66, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[3] request_irq 67
 +IrqConnect : IRQ = 67, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[4] request_irq 68
 +IrqConnect : IRQ = 68, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[5] request_irq 69
 +IrqConnect : IRQ = 69, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[6] request_irq 70
 +IrqConnect : IRQ = 70, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[7] request_irq 71
 +IrqConnect : IRQ = 71, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[8] request_irq 72
 +IrqConnect : IRQ = 72, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[9] request_irq 73
 +IrqConnect : IRQ = 73, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[10] request_irq 74
 +IrqConnect : IRQ = 74, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[11] request_irq 75
 +IrqConnect : IRQ = 75, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[12] request_irq 89
 +IrqConnect : IRQ = 89, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[13] request_irq 90
 +IrqConnect : IRQ = 90, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[14] request_irq 91
 +IrqConnect : IRQ = 91, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[15] request_irq 92
 +IrqConnect : IRQ = 92, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[16] request_irq 93
 +IrqConnect : IRQ = 93, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[17] request_irq 62
 +IrqConnect : IRQ = 62, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[18] request_irq 80
 +IrqConnect : IRQ = 80, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[19] request_irq 85
 +IrqConnect : IRQ = 85, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[20] request_irq 128
 +IrqConnect : IRQ = 128, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[21] request_irq 129
 +IrqConnect : IRQ = 129, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[22] request_irq 130
 +IrqConnect : IRQ = 130, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[23] request_irq 131
 +IrqConnect : IRQ = 131, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[24] request_irq 132
 +IrqConnect : IRQ = 132, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[25] request_irq 133
 +IrqConnect : IRQ = 133, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[26] request_irq 134
 +IrqConnect : IRQ = 134, Handler = 0x80015B68
 +[map_dma_chan 1550]: dma_chan[27] request_irq 135
 +IrqConnect : IRQ = 135, Handler = 0x80015B68
 +ifx_dma_init_module : g_desc_list 80070ac0
 +[KERN_INFO]IFX DMA driver, version ifxmips_dma_core.c:v1.0.4
 +,(c)2009 Infineon Technologies AG
 +ifx_gpio_init() !!!
 +ifx_gpio_pre_init() !!!
 +[KERN_INFO]IFX GPIO driver, version 1.2.10, (c)2009 Infineon Technologies AG
 +[KERN_INFO]Infineon Technologies RCU driver version 1.0.6
 +vr9_config_mdio_gpio !!!
 +[KERN_INFO]IFX 7 Port Eth driver, version ifxmips_7port_eth_sw.c:v1.0.0
 +,(c)2009 Infineon Technologies AG
 +g_dma_pmac:1, g_pmac_dma:1, reg:0x0000074c  !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
 +IFX SWITCH API, Version 0.8.6
 +IFX_ETHSW_Open() !!!
 +[KERN_INFO] SWAPI: Registered character device [switch_api] with major no [81]
 +Switch API: PCE MicroCode loaded !!
 +IFX_ETHSW_IOCTL_WrapperInit() !!!
 +
 +IFX_ETHSW_IOCTL_WrapperDeviceAdd : Device Number  = 1
 +
 +chip_id 2000b713 chip_id b
 +Switch Auto Polling value = 0
 +[KERN_ERR] GPHY FW load for A2x !!
 +vr9_gphy_gpio_init : Config GPIO3 clock !!!
 +vr9_gphy_reset() !!!
 +GPHY FIRMWARE LOAD SUCCESSFULLY AT ADDR : 80000
 +vr9_gphy_reset_released() !!!
 +vr9_phy_hw_init : Config port 2, 4 PHY address and auto-polling mode
 +[KERN_INFO] IFX GPHY driver, version ifxmips_vr9_gphy:v0.4.0,(c)2009 Infineon Technologies AG
 +switch_utility, RegisterSet, 0xc4B, 0x3F,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e9, IOC_NR=1
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_RegisterSet : addr 00000c4b data 0000003f
 +switch_utility, RegisterSet, 0xc4C, 0x8105,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e9, IOC_NR=1
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_RegisterSet : addr 00000c4c data 00008105
 +switch_utility, RegisterSet, 0xc53, 0x1811,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e9, IOC_NR=1
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_RegisterSet : addr 00000c53 data 00001811
 +switch_utility, RegisterSet, 0xc51, 0x1813,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e9, IOC_NR=1
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_RegisterSet : addr 00000c51 data 00001813
 +switch_utility, RegisterSet, 0xC52, 0x1812,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e9, IOC_NR=1
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_RegisterSet : addr 00000c52 data 00001812
 +switch_utility, RegisterSet, 0xC50, 0x1814,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e9, IOC_NR=1
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_RegisterSet : addr 00000c50 data 00001814
 +switch_utility, RegisterSet, 0x903, 0x180,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e9, IOC_NR=1
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_RegisterSet : addr 00000903 data 00000180
 +switch_utility, RegisterSet, 0x90F, 0x180,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e9, IOC_NR=1
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_RegisterSet : addr 0000090f data 00000180
 +switch_utility, RegisterSet, 0x93F, 0x180,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e9, IOC_NR=1
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_RegisterSet : addr 0000093f data 00000180
 +switch_utility, RegisterSet, 0x91B, 0x180,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e9, IOC_NR=1
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_RegisterSet : addr 0000091b data 00000180
 +switch_utility, RegisterSet, 0x933, 0x180,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e9, IOC_NR=1
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_RegisterSet : addr 00000933 data 00000180
 +switch_utility, RegisterSet, 0x927, 0x180,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e9, IOC_NR=1
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_RegisterSet : addr 00000927 data 00000180
 +switch_utility, RegisterSet, 0x94B, 0x180,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e9, IOC_NR=1
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_RegisterSet : addr 0000094b data 00000180
 +switch_utility, PortLinkCfgSet, 0, 0, 0, 0, 4, 0, 0, 4, 0,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e1, IOC_NR=3f
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_PortLinkCfgSet : portIdx 0
 +IFX_FLOW_PortLinkCfgSet : Duplex value 0
 +IFX_FLOW_PortLinkCfgSet : Speed value 3
 +IFX_FLOW_PortLinkCfgSet : Link value 0
 +IFX_FLOW_PortLinkCfgSet : MII_Mode value 4
 +switch_utility, PortLinkCfgSet, 1, 0, 0, 0, 4, 0, 0, 4, 0,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e1, IOC_NR=3f
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_PortLinkCfgSet : portIdx 1
 +IFX_FLOW_PortLinkCfgSet : Duplex value 0
 +IFX_FLOW_PortLinkCfgSet : Speed value 3
 +IFX_FLOW_PortLinkCfgSet : Link value 0
 +IFX_FLOW_PortLinkCfgSet : MII_Mode value 4
 +switch_utility, PortLinkCfgSet, 5, 0, 0, 0, 4, 0, 0, 1, 0,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e1, IOC_NR=3f
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_PortLinkCfgSet : portIdx 5
 +IFX_FLOW_PortLinkCfgSet : Duplex value 0
 +IFX_FLOW_PortLinkCfgSet : Speed value 3
 +IFX_FLOW_PortLinkCfgSet : Link value 0
 +IFX_FLOW_PortLinkCfgSet : MII_Mode value 1
 +switch_utility, PortLinkCfgSet, 2, 0, 0, 0, 4, 0, 0, 1, 0,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e1, IOC_NR=3f
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_PortLinkCfgSet : portIdx 2
 +IFX_FLOW_PortLinkCfgSet : Duplex value 0
 +IFX_FLOW_PortLinkCfgSet : Speed value 3
 +IFX_FLOW_PortLinkCfgSet : Link value 0
 +IFX_FLOW_PortLinkCfgSet : MII_Mode value 1
 +switch_utility, PortLinkCfgSet, 3, 0, 0, 0, 4, 0, 0, 1, 0,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e1, IOC_NR=3f
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_PortLinkCfgSet : portIdx 3
 +IFX_FLOW_PortLinkCfgSet : Duplex value 0
 +IFX_FLOW_PortLinkCfgSet : Speed value 3
 +IFX_FLOW_PortLinkCfgSet : Link value 0
 +IFX_FLOW_PortLinkCfgSet : MII_Mode value 1
 +switch_utility, PortLinkCfgSet, 4, 0, 0, 0, 4, 0, 0, 1, 0,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e1, IOC_NR=3f
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_PortLinkCfgSet : portIdx 4
 +IFX_FLOW_PortLinkCfgSet : Duplex value 0
 +IFX_FLOW_PortLinkCfgSet : Speed value 3
 +IFX_FLOW_PortLinkCfgSet : Link value 0
 +IFX_FLOW_PortLinkCfgSet : MII_Mode value 1
 +switch_utility, RegisterSet, 0xc77, 0xc001,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e9, IOC_NR=1
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_RegisterSet : addr 00000c77 data 0000c001
 +switch_utility, RegisterSet, 0xc79, 0xc001,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e9, IOC_NR=1
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_RegisterSet : addr 00000c79 data 0000c001
 +switch_utility, RegisterSet, 0xc81, 0xc001,
 +ioctl is called
 +DEBUG> Minor number = 0
 +DEBUG> IFX_ETHSW_LowLevelCommandSearch[89]: IOC_TYPE=e9, IOC_NR=1
 +pDrv=80092864, pDrv->pLlHandle=8009271C
 +IFX_FLOW_RegisterSet : addr 00000c81 data 0000c001
 +MAC Address: 00:06:4e:00:00:01
 +Interface 1 ip = 192.168.1.1
 +
 +init_if() ; gConfig.Interface[2].Link_Type is [0]
 +switch_hw_receive[482], SLPID:2 Packet dropped!!!
 +RUNTASK id=1 if_task if0...
 +RUNTASK id=2 if_task if1...
 +RUNTASK id=3 timer_task...
 +Start decompress web imag...
 +Unzipping from 80343EFC to 83F00000 ... done
 +Uncompressed size = 14430
 +RUNTASK id=4 period_task...
 +RUNTASK id=5 dhcp_daemon...
 +RUNTASK httpd...
 +Starting Multitask...
 +period_task running!!!
 +httpd: listen at 192.168.1.1:80
 +period_task running 120
 +switch_hw_receive[482], SLPID:2 Packet dropped!!!
 +period_task running 240
 +switch_hw_receive[482], SLPID:2 Packet dropped!!!
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +period_task running 360
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +period_task running 480
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +period_task running 600
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +1 igmp_handler(): checksum error !
 +period_task running 720
 +switch_hw_receive[482], SLPID:2 Packet dropped!!!
 +period_task running 840
 +period_task running 960
 +period_task running 1080
 +period_task running 1200
 +switch_hw_receive[482], SLPID:2 Packet dropped!!!
 +period_task running 1320
 +period_task running 1440
 +period_task running 1560
 +</nowiki>
 +</WRAP>\\
 +==== U-Boot (RAM UART mode) ====
 +<WRAP bootlog>
 +<nowiki>
 +U-Boot 2013.10-openwrt4 (Sep 17 2021 - 07:35:33) arv7520cw22
 +
 +Board: Arcadyan ARV7520CW22
 +SoC:   Lantiq VRX288 v1.2
 +CPU:   125 MHz
 +IO:    125 MHz
 +BUS:   125 MHz
 +BOOT:  UART w/o EEPROM
 +DRAM:  128 MiB
 +NAND:  128 MiB
 +Using default environment
 +
 +In:    serial
 +Out:   serial
 +Err:   serial
 +Net:   ltq-eth
 +arv7520cw22 #
 </nowiki> </nowiki>
 </WRAP>\\ </WRAP>\\
  • Last modified: 2021/09/23 08:39
  • by mandrake-lee