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docs:instructionset:mips_24kc [2016/11/21 21:19] – Subtarget added to datatable tmomasdocs:techref:instructionset:mips_24kc [2022/02/05 15:27] – Add some official MIPS documentation b1773rn4n
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 ====== mips_24kc ====== ====== mips_24kc ======
 +
 +===== General introduction =====
  
 The 24K core family product line variants started shipping in fiscal 2004 and has become one of the most successful core families in MIPS's history with more than 50 licensee companies to date.\\  The 24K core family product line variants started shipping in fiscal 2004 and has become one of the most successful core families in MIPS's history with more than 50 licensee companies to date.\\ 
 The 24K product line is based on a very efficient 8-stage pipeline that delivers excellent single-threaded performance at optimized area and power footprints.\\  The 24K product line is based on a very efficient 8-stage pipeline that delivers excellent single-threaded performance at optimized area and power footprints.\\ 
 The 24KE line leverages the high-performance 24K microarchitecture and efficiently adds Digital Signal Processing (DSP) functionality while the 24KE Pro product line adds to the 24KE a flexible co-processor interface that allows designers to include custom, value-add functions to their SoC.\\  The 24KE line leverages the high-performance 24K microarchitecture and efficiently adds Digital Signal Processing (DSP) functionality while the 24KE Pro product line adds to the 24KE a flexible co-processor interface that allows designers to include custom, value-add functions to their SoC.\\ 
-The 24K core family has been licensed to notable companies including Atheros (acquired by Qualcomm), Broadcom, BroadLight, Cisco Systems, Lantiq, Ralink, Realtek, Sigma Designs, Renesas Electronics, Trident Microsystems, Toshiba and others.+The 24K core family has been licensed to notable companies including Atheros (acquired by Qualcomm), Broadcom, BroadLight, Cisco Systems, Lantiq, Ralink, Realtek, Sigma Designs, Renesas Electronics, Trident Microsystems, Toshiba and others.\\
  
 [[http://www.ovpworld.org/processor-family-mips-24k|source]] [[http://www.ovpworld.org/processor-family-mips-24k|source]]
 +
 +===== MIPS company description =====
 +
 +The MIPS32 24K is a 8-stage pipeline processor core that implements the MIPS32 Release 2 Architecture, including support for dynamic branch prediction, optional MIPS DSP module, MIPS16e Instruction Set Architecture and programmable L1 cache controller.\\
 +
 +The 24K includes an OCP Bus Interface Unit, EJTAG debug and MIPS Trace support is provided. The processor core delivers a performance of 1.6 DMIPS/MHz and 3.1 Coremarks/MHz. The 24Kf version includes an IEEE754 compliant Floating Point Unit, supporting both single and double precision datatypes.
 +
 +[[https://www.mips.com/products/classic#MIPS32_24K|Official product page from MIPS]]
 +
 +===== Datasheet =====
 +
 +[[https://www.mips.com/?do-download=mips32-24kc-processor-core-datasheet-v4-00|MIPS32® 24Kc™ Processor Core Datasheet v4.00 (134.50 KB)]]
  
 ===== Download Packages ===== ===== Download Packages =====
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 /* Link to packages download goes here. */ /* Link to packages download goes here. */
  
-| HTTP   | [[https://downloads.lede-project.org/snapshots/packages/mips_24kc/]]      | +| HTTP   | [[https://downloads.openwrt.org/releases/packages-18.06/mips_24kc/]]      | 
-| FTP    | [[ftp://ftp.halifax.rwth-aachen.de/lede/snapshots/packages/mips_24kc/]]   |+| FTP    | [[ftp://ftp.halifax.rwth-aachen.de/lede/releases/packages-18.06/mips_24kc/]]   |
  
 See [[/downloads#mirrors|Mirrors]] for more download sites. See [[/downloads#mirrors|Mirrors]] for more download sites.
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 ---- datatable ---- ---- datatable ----
-cols   : Package architecture, Target, Subtarget, Brand, Model, Version+cols   : Package architecture, Target, Subtarget, Brand, Model_pageid, Version
 filter : Package architecture=mips_24kc filter : Package architecture=mips_24kc
 sort   : Brand sort   : Brand
 ---- ----
  
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