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| Both sides previous revision Previous revision Next revision | Previous revision Next revisionBoth sides next revision | ||
| docs:instructionset:arm_cortex-a7 [2017/02/01 16:02] – Download links updated to 17.01 tmomas | docs:instructionset:arm_cortex-a7 [2017/02/05 20:02] – added links to dataentries tmomas | ||
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| ====== arm_cortex-a7 ====== | ====== arm_cortex-a7 ====== | ||
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| + | <WRAP center centeralign round info 60%> | ||
| + | **Obsolete due to [[https:// | ||
| + | </ | ||
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| The ARM® Cortex®-A7 is the most efficient ARMv7-A processor and the most successful – it has shipped over a billion units in production. The Cortex-A7 is a 32-bit applications processor with 40-bit physical addressing and hardware virtualisation support. It features an optional integrated L2 cache that can be configured from 128KB to 1MB. The Cortex-A7 pipeline is based on an eight stage in-order design that provides significant performance improvements compared to the Cortex-A5 processor. | The ARM® Cortex®-A7 is the most efficient ARMv7-A processor and the most successful – it has shipped over a billion units in production. The Cortex-A7 is a 32-bit applications processor with 40-bit physical addressing and hardware virtualisation support. It features an optional integrated L2 cache that can be configured from 128KB to 1MB. The Cortex-A7 pipeline is based on an eight stage in-order design that provides significant performance improvements compared to the Cortex-A5 processor. | ||
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| /* Link to packages download goes here. */ | /* Link to packages download goes here. */ | ||
| - | | HTTP | + | | HTTP |
| - | | FTP | [[ftp:// | + | | FTP | N/A |
| See [[/ | See [[/ | ||
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| ---- datatable ---- | ---- datatable ---- | ||
| - | cols : Package architecture, | + | cols : Package architecture, |
| filter : Package architecture=arm_cortex-a7 | filter : Package architecture=arm_cortex-a7 | ||
| sort : Brand | sort : Brand | ||
| ---- | ---- | ||