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--- docs:techref:hardware:soc:soc.mediatek [2018/06/15 06:42] – Related pages removed (doesn't deliver much of anything and is not included in other soc subpages) tmomas
+++ docs:techref:hardware:soc:soc.mediatek [2023/12/24 03:24] (current) – [Ralink ramips] mt7620 and mt7628 driver lmita
@@ Line 10: / Line 10: @@
 ===== Ralink ramips =====
-  * A quite good source for product briefs on MediaTek/Ralink SoCs in pdf-form seems to be here: [[http://wikidevi.com/files/Ralink/]].
+  * A quite good source for product specs on MediaTek/Ralink SoCs seems to be here: [[https://deviwiki.com/wiki/Ralink]].
   * OpenWrt specific:
     * all MediaTek/Ralink SoCs are merged under the target **''ramips''**.
     * building a target requires a target-specific firmware (that is, most devices need customized firmware). The kernel is patched with the command line that has the board name in it. This mechanism is similar to what is done for [[docs:techref:hardware:soc:soc.qualcomm.ar71xx|ar71xx]] platforms.
-    * browse the source code: [[https://dev.openwrt.org/browser#trunk/target/linux/ramips]]
+    * browse the source code: [[https://github.com/openwrt/openwrt/tree/master/target/linux/ramips]]
   * FIXME: there might still be some historical information in the OpenWrt dev wiki [[https://dev.openwrt.org/wiki/platforms]], but it must be well hidden then. Seems there is nothing that can be found today...
@@ Line 28: / Line 28: @@
 | :::    | MT7620            | MT7620a | DDR2 | 2T2R | 24KEc | [[toh:views:toh_dev_arch-target-cpu?dataflt%5BCPU*~%5D=MT7620a|see ToH]]|
 | :::    | :::               | MT7620n | SDR/DDR1/2 | 2T2R | 24KEc | [[toh:views:toh_dev_arch-target-cpu?dataflt%5BCPU*~%5D=MT7620n|see ToH]]|
-| :::    | MT7621            | MT7621 | DDR2/3 | n/a | 1004Kc | [[toh:views:toh_dev_arch-target-cpu?dataflt%5BCPU*~%5D=MT7621|see ToH]]|
+| :::    | MT7621            | MT7621AT | DDR2/3 | n/a | 1004Kc | [[toh:views:toh_dev_arch-target-cpu?dataflt%5BCPU*~%5D=MT7621*A|see ToH]]|
-| :::    | MT7628            | MT7628 | DDR1/2 | 2T2R | 24kec  | [[toh:views:toh_dev_arch-target-cpu?dataflt%5BCPU*~%5D=MT7628|see ToH]]|
+| :::    | :::               | MT7621ST | DDR2/3 | n/a | 1004Kc | [[toh:views:toh_dev_arch-target-cpu?dataflt%5BCPU*~%5D=MT7621S|see ToH]]|
+| :::    | [[https://www.mediatek.com/products/homeNetworking/mt7628k-n-a|MT7628]]            | MT7628 | DDR1/2 | 2T2R | 24kec  | [[toh:views:toh_dev_arch-target-cpu?dataflt%5BCPU*~%5D=MT7628|see ToH]]|
 | :::    | MT7688            | MT7688 | DDR1/2 | 1T1R | 24kec  | [[toh:views:toh_dev_arch-target-cpu?dataflt%5BCPU*~%5D=MT7688|see ToH]]|
 | ''ramips'' :?: | n/a :?:   | RT6856 | ? | ? | 34KEc | [[toh:views:toh_dev_arch-target-cpu?dataflt%5BCPU*~%5D=RT6856|see ToH]] |
@@ Line 40: / Line 41: @@
     * RT5350 is still available and cheaper, [[http://cdn.sparkfun.com/datasheets/Wireless/WiFi/RT5350.pdf]]
     * see here for a comparison: [[http://vonger.cn/?p=242]]
+    * These use the ''rt2800soc'' driver. New features such as 802.11w (required for WPA3) are only supported in software, thus limiting your speed to ~14-18 Mbps.
   * MT7621
-    * Dual-Core
+    * 2 cores, 4 threads:
+      * MT7621AT
+      * MT7621DAT: 128MB integrated RAM
+    * 1 core, 2 threads:
+      * MT7621ST, MT7621NT
     * SoC does not include a Wifi subsystem
-    * [[http://www.mediatek.com/en/products/connectivity/wifi/home-network/wifi-ap/mt7621na/]]
+    * [[https://www.mediatek.com/products/homeNetworking/mt7621]]
-    * [[https://wikidevi.com/wiki/MediaTek_MT7621]]
+    * [[https://deviwiki.com/wiki/MediaTek_MT7621]]
+  * MT7628
+    * MT7628A: Full function with external DRAM
+    * MT7628K: Embedded 8MB DRAM and L-shape
+    * MT7628N: Same as MT7628A, but without PCle and IoT modes
+    * MT7628DAN: 64MB integrated RAM
+    * The chip uses a driver from the ''mt76'' family. 802.11w is hardware accelerated.
+===== RGMII configuration =====
+On MT7620A and likely other Ralink / Mediatek SOCs, the RGMII delay is set with the Port I control register in the GSW (gigabit switch) subsystem
+for boards with uboot and an available console (option 4?), the register can be read with the command
+    md 0x10117014 1
+and the following bits tell you the OEM bootloader / chip defaults
+|BIT(2)|RX no delay|
+|BIT(3)|TX delay|
+|BITS(16, 20)|PHY_BASE|
+|BITS(24, 28)|PHY_DISABLE|
+For a complete explanation, look for the register 0x7014 in the MT7620 Programming Guide
+example:
+10117014: 1f08000c
+c --> 1100 --> TX delay only
+--> PHY_BASE address
+f --> internal PHYs disabled
+----
+Remember: You have to read bits from right to left.
+For example ''1f08000c'' in binary becomes ''00011111000010000000000000001100''
+<code>
+1111 0000 1000 0000 0000 0000 1100
+   |    |    |    |    |    |    |    |
+   24   20   16   12    8    4    0
+</code>
 ===== MediaTek xDSL =====
@@ Line 63: / Line 110: @@
   * [[http://www.mediatek.com/en/products/connectivity/xdsl/adsl-wifi/RT65168/|RT65168]] It incorporates a MIPS 34Kc CPU and a DMT (Discrete Multi-Tone)-engine for VDSL2
     * combine with RT63095 AFE (Analog Front-End) for VDSL2
 ==== Linux support for MediaTek xDSL ====
 **unknown**
+===== Devices =====
+The list of related devices:
+{{tagpage>MediaTek}},
+{{tagpage>MT7620a}},
+{{tagpage>MT7620N}},
+{{tagpage>MT7621}},
+{{tagpage>MT7628}},
+{{tagpage>MT7688}},
+{{tagpage>Ralink}},
+{{tagpage>ramips}},
+{{tagpage>rt2880}},
+{{tagpage>rt3050}},
+{{tagpage>rt3052}},
+{{tagpage>rt3350}},
+{{tagpage>rt3352}},
+{{tagpage>rt3662}},
+{{tagpage>rt3883}},
+{{tagpage>rt5350}}
-===== Tags =====
-{{tag>MediaTek Ralink ramips rt2880 rt3050 rt3052 rt3350 rt3352 rt3662 rt3883 rt5350 MT7620a MT7620N MT7621 MT7628 MT7688}}