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docs:techref:hardware:soc:soc.broadcom.bcm63xx:smp [2019/08/26 21:50] – tag optimization vgaeteradocs:techref:hardware:soc:soc.broadcom.bcm63xx:smp [2019/09/09 17:40] (current) – wip infobox vgaetera
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 ====== SMP/CMT Broadcom 63xx ====== ====== SMP/CMT Broadcom 63xx ======
 +{{page>meta:infobox:wip&noheader&nofooter&noeditbtn}}
 +
 An example of SMP initialization on BCM6358 SoC: [[http://pastebin.com/wV3njK7c]] taken from  An example of SMP initialization on BCM6358 SoC: [[http://pastebin.com/wV3njK7c]] taken from 
 <del>[[http://www.livebox-floss.com/Products//LiveBox/LiveBox1/Thomson/vunknown/linux-2.6.12.tar.bz2|linux-2.6.12.tar.bz2]]</del>, mirror ->[[https://drive.google.com/uc?export=download&id=0B-EMoBe-_OdBRnppenZMOExOUEU|linux-2.6.12-inv.zip]] <del>[[http://www.livebox-floss.com/Products//LiveBox/LiveBox1/Thomson/vunknown/linux-2.6.12.tar.bz2|linux-2.6.12.tar.bz2]]</del>, mirror ->[[https://drive.google.com/uc?export=download&id=0B-EMoBe-_OdBRnppenZMOExOUEU|linux-2.6.12-inv.zip]]
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 |   core1   | :::          |        64kB         | |   core1   | :::          |        64kB         |
 So no benefit using a different core for the main thread. So no benefit using a different core for the main thread.
- 
  
 ===== CP0 Registers ===== ===== CP0 Registers =====
- 
 ==== Configuration Registers ==== ==== Configuration Registers ====
 To know if your CPU has concurrent multi-threading support (CMT) check **bit 18** at BRCM Configuration register (read_c0_brcm_config_0):\\ To know if your CPU has concurrent multi-threading support (CMT) check **bit 18** at BRCM Configuration register (read_c0_brcm_config_0):\\
 0 = 1 core\\ 0 = 1 core\\
 1 = 2 cores, multi-thread supported\\ 1 = 2 cores, multi-thread supported\\
- 
  
 Also check the **bit 12**:\\ Also check the **bit 12**:\\
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 ===== Devices ===== ===== Devices =====
-{{tagpage>bcm63xx|The list of related devices}} +The list of related devices: 
- +{{tagpage>bcm63xx}}
-{{tag>wip }}+
  
  • Last modified: 2019/08/26 21:50
  • by vgaetera