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| docs:techref:hardware:port.jtag [2019/08/27 07:10] – tag optimization vgaetera | docs:techref:hardware:port.jtag [2020/07/09 10:23] (current) – [Hairydairymaid] Add Github for source, remove thecshore cshoredaniel1 | ||
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| A JTAG port can be used without any software running on the IC itself, but the IC still has to be powered by a separate power supply. This means, you can solder a lonely SoC to a PCB, no Flash-Chip, no RAM; then connect to it via JTAG and interact with the SoC. Of course, on the PC itself, you should have some sort of software, to make this interaction with the hardware on the lowest level possible a bit more comfortable. | A JTAG port can be used without any software running on the IC itself, but the IC still has to be powered by a separate power supply. This means, you can solder a lonely SoC to a PCB, no Flash-Chip, no RAM; then connect to it via JTAG and interact with the SoC. Of course, on the PC itself, you should have some sort of software, to make this interaction with the hardware on the lowest level possible a bit more comfortable. | ||
| - | Of course, if there is a flash chips soldered onto the PCB, you could access this chip by programming the SoC via JTAG. It's one of those amazingly useful things that allows you to recover from pretty much anything that doesn' | + | Of course, if there is a flash chip soldered onto the PCB, you could access this chip by programming the SoC via JTAG. It's one of those amazingly useful things that allows you to recover from pretty much anything that doesn' |
| - | The JTAG Automate | + | The JTAG automate |
| Finding JTAG connector on a PCB can be a little easier than finding the UART since most vendors leave those headers unpopulated after production. JTAG connectors are usually 12, 14, or 20-pins headers with one side of the connector having some signals at 3.3V and the other side being connected to GND. | Finding JTAG connector on a PCB can be a little easier than finding the UART since most vendors leave those headers unpopulated after production. JTAG connectors are usually 12, 14, or 20-pins headers with one side of the connector having some signals at 3.3V and the other side being connected to GND. | ||
| Line 36: | Line 36: | ||
| {{ : | {{ : | ||
| - | | ? ^ | + | < |
| - | | nTRST ^ | + | # |
| - | | TCK ^ | + | |#--#| |
| - | | TMS ^ | + | ? |# |
| - | | GND ^ | + | |
| - | | TDO ^ | + | |
| - | | TDI ^ | + | nTRST |# |
| - | | GND ^ | + | |
| + | | ||
| + | TCK |# | ||
| + | | ||
| + | | ||
| + | TMS |# | ||
| + | | ||
| + | | ||
| + | GND |# | ||
| + | | ||
| + | | ||
| + | TDO |# | ||
| + | | ||
| + | | ||
| + | TDI |# | ||
| + | | ||
| + | | ||
| + | GND |# | ||
| + | # | ||
| + | </ | ||
| + | |||
| === 10 Pin Header === | === 10 Pin Header === | ||
| Found in many Huawei routers: | Found in many Huawei routers: | ||
| - | | TCK ^ 1 ^ 2 | GND | + | < |
| - | | | + | # |
| - | | | + | |
| - | | | + | 1 |#--# #--#| 2 |
| - | | | + | | | |
| + | | ||
| + | 3 |#--# #--#| 4 | ||
| + | | | | ||
| + | | ||
| + | | ||
| + | | ||
| + | | ||
| + | 7 |#--# #--#| 8 | ||
| + | | | | ||
| + | | ||
| + | 9 |#--# #--#| 10 | ||
| + | # | ||
| + | </ | ||
| It matches with the ALTERA ByteBlasterMV 10-pin cable, but without the nSRST, nTRST pins. | It matches with the ALTERA ByteBlasterMV 10-pin cable, but without the nSRST, nTRST pins. | ||
| Line 59: | Line 93: | ||
| Found in Linksys routers such as the WRT54G and WRT54GS, the 12-pin header has the following arrangement of JTAG signals and pins: | Found in Linksys routers such as the WRT54G and WRT54GS, the 12-pin header has the following arrangement of JTAG signals and pins: | ||
| - | | nTRST ^ 1 | + | |
| - | | | + | < |
| - | | | + | # |
| - | | | + | nTRST |#--# #--#| GND |
| - | | | + | |
| - | | | + | |
| + | TDI |#--# #--#| GND | ||
| + | | ||
| + | | ||
| + | TDO |#--# #--#| GND | ||
| + | | ||
| + | | ||
| + | TMS |#--# #--#| GND | ||
| + | | ||
| + | | ||
| + | TCK |#--# #--#| GND | ||
| + | | ||
| + | | ||
| + | nSRST |#--# #--#| GND | ||
| + | 11 |#--# #--#| 12 | ||
| + | # | ||
| + | </ | ||
| Seems, this header is a truncated version of the full EJTAG header. | Seems, this header is a truncated version of the full EJTAG header. | ||
| Line 71: | Line 121: | ||
| This header is fully MIPS EJTAG 2.6 compatible and described in the EJTAG 2.6 standard. Found in Edimax routers (and other brands that are Edimax clones), the 14-pin header has the following arrangement of JTAG signals and pins: | This header is fully MIPS EJTAG 2.6 compatible and described in the EJTAG 2.6 standard. Found in Edimax routers (and other brands that are Edimax clones), the 14-pin header has the following arrangement of JTAG signals and pins: | ||
| - | | nTRST ^ 1 | + | < |
| - | | | + | # |
| - | | | + | nTRST |#--# #--#| GND |
| - | | | + | |
| - | | | + | |
| - | | | + | TDI |#--# #--#| GND |
| - | | | + | |
| + | | ||
| + | TDO |#--# #--#| GND | ||
| + | | ||
| + | | ||
| + | TMS |#--# #--#| GND | ||
| + | | ||
| + | | ||
| + | TCK |#--# #--#| GND | ||
| + | | ||
| + | | ||
| + | nSRST |#--# #--#| n/a | ||
| + | 11 |#--# #--#| 12 | ||
| + | | ||
| + | n/a |#--# #--#| Vcc | ||
| + | 13 |#--# #--#| 14 | ||
| + | # | ||
| + | </ | ||
| A buffered cable such as the Wiggler requires an external Vcc voltage supply. The 14-pin header conveniently supplies this voltage on pin 14. The typical unbuffered cable, however, does not require an external voltage in order to function. Formally, the pin 14 is called VREF and used to indicate a JTAG signal levels: 5V, 3.3V or 2.5V. On the most devices this pin is tied to the device' | A buffered cable such as the Wiggler requires an external Vcc voltage supply. The 14-pin header conveniently supplies this voltage on pin 14. The typical unbuffered cable, however, does not require an external voltage in order to function. Formally, the pin 14 is called VREF and used to indicate a JTAG signal levels: 5V, 3.3V or 2.5V. On the most devices this pin is tied to the device' | ||
| Line 84: | Line 151: | ||
| === 16 Pin Header === | === 16 Pin Header === | ||
| Usually found in IBM 4XX powerpc platform, this layout is also known as JTAG RISCWATCH | Usually found in IBM 4XX powerpc platform, this layout is also known as JTAG RISCWATCH | ||
| - | | | + | |
| - | | TDI | | + | < |
| - | | HALTED | + | # |
| - | | TCK | | + | TDO |#--# #--#| - |
| - | | TMS | | + | |
| - | | | + | |
| - | | | + | TDI |#--# #--#| nTRST |
| - | | - | | + | |
| + | | ||
| + | HALTED | ||
| + | | ||
| + | | ||
| + | TCK |#--# #--#| - | ||
| + | | ||
| + | | ||
| + | TMS |#--# #--#| - | ||
| + | | ||
| + | | ||
| + | | ||
| + | | ||
| + | | | | ||
| + | | ||
| + | | ||
| + | | | ||
| + | - |#--# #--#| GND | ||
| + | | ||
| + | # | ||
| + | </ | ||
| === 20 Pin Header === | === 20 Pin Header === | ||
| Found in Comtrend routers: | Found in Comtrend routers: | ||
| - | | nTRST ^ 1 | + | < |
| - | | | + | # |
| - | | | + | nTRST |#--# #--#| GND |
| - | | | + | |
| - | | | + | |
| - | | | + | TDI |#--# #--#| GND |
| - | | | + | |
| - | | | + | |
| - | | | + | TDO |#--# #--#| GND |
| - | | | + | |
| + | | ||
| + | TMS |#--# #--#| GND | ||
| + | | ||
| + | | ||
| + | TCK |#--# #--#| GND | ||
| + | | ||
| + | | ||
| + | nSRST |#--# #--#| GND | ||
| + | 11 |#--# #--#| 12 | ||
| + | | ||
| + | Vcc |#--# #--#| ? | ||
| + | 13 |#--# #--#| 14 | ||
| + | | ||
| + | Vcc |#--# #--#| GND | ||
| + | 15 |#--# #--#| 16 | ||
| + | | ||
| + | Vcc |#--# #--#| GND | ||
| + | 17 |#--# #--#| 18 | ||
| + | | ||
| + | Vcc |#--# #--#| GND | ||
| + | 19 |#--# #--#| 20 | ||
| + | # | ||
| + | </ | ||
| Not fully verified, Vcc at the bottom left are by add smd 0ohm. FIXME | Not fully verified, Vcc at the bottom left are by add smd 0ohm. FIXME | ||
| Line 120: | Line 230: | ||
| ==== Hairydairymaid ==== | ==== Hairydairymaid ==== | ||
| The most famous software for JTAG is probably the Linksys De-Brick Utility by Hairydairymaid (aka Lightbulb). As of 12 September 2006 the most recent version is v4.8. Virtually everyone who uses this software opts for an unbuffered cable, and the software itself, by default, expects this type of cable to be used. | The most famous software for JTAG is probably the Linksys De-Brick Utility by Hairydairymaid (aka Lightbulb). As of 12 September 2006 the most recent version is v4.8. Virtually everyone who uses this software opts for an unbuffered cable, and the software itself, by default, expects this type of cable to be used. | ||
| + | |||
| + | There is source code available on GitHub at [[https:// | ||
| The utility CAN operate on most any MIPS based cpu supporting EJTAG by using PrAcc routines (non-dma mode) - use the /nodma switch. It is not limited to WRT54G/GS units. | The utility CAN operate on most any MIPS based cpu supporting EJTAG by using PrAcc routines (non-dma mode) - use the /nodma switch. It is not limited to WRT54G/GS units. | ||