Differences
This shows you the differences between two versions of the page.
| Both sides previous revision Previous revision Next revision | Previous revision | ||
| docs:techref:bootloader:cfe [2019/09/09 18:06] – wip infobox vgaetera | docs:techref:bootloader:cfe [2023/10/12 16:42] (current) – [Table] systemcrash | ||
|---|---|---|---|
| Line 3: | Line 3: | ||
| * [[wp> | * [[wp> | ||
| - | * [[http:// | + | * [[http:// |
| - | * [[http:// | + | |
| + | | ||
| + | * [[https:// | ||
| + | * [[https:// | ||
| + | * [[https:// | ||
| + | * [[https:// | ||
| ===== Using the CFE ===== | ===== Using the CFE ===== | ||
| - | [[http:// | + | [[https:// |
| + | |||
| + | [[https:// | ||
| + | |||
| + | [[https:// | ||
| ===== bcm47xx CFE ===== | ===== bcm47xx CFE ===== | ||
| Line 100: | Line 109: | ||
| ===== bcm63xx CFE ===== | ===== bcm63xx CFE ===== | ||
| - | bcm63xx CFE is totally different | + | bcm63xx CFE is totally different |
| To access CFE you need to attach a [[docs: | To access CFE you need to attach a [[docs: | ||
| Line 106: | Line 115: | ||
| This is a typical output when starting up the CFE and entering the CLI: | This is a typical output when starting up the CFE and entering the CLI: | ||
| - | | '' | + | < |
| CFE version 1.0.37-104.4 for BCM96368 (32bit, | CFE version 1.0.37-104.4 for BCM96368 (32bit, | ||
| Build Date: Mon Feb 21 17:59:46 CST 2011 (finerain@moonlight) | Build Date: Mon Feb 21 17:59:46 CST 2011 (finerain@moonlight) | ||
| Line 137: | Line 146: | ||
| Auto run second count down: 1 | Auto run second count down: 1 | ||
| CFE> | CFE> | ||
| - | CFE>'' | + | CFE> |
| + | </ | ||
| ==== Using CFE web (http) server ==== | ==== Using CFE web (http) server ==== | ||
| It's probably the most user friendly way of installing firmware. But sometimes some manufacturers decide to disable it (very uncommon). | It's probably the most user friendly way of installing firmware. But sometimes some manufacturers decide to disable it (very uncommon). | ||
| Line 161: | Line 170: | ||
| * Or upgrade the router with a new fake firmware (filled with zeroes). This will force CFE to stop for requesting a new firmware. | * Or upgrade the router with a new fake firmware (filled with zeroes). This will force CFE to stop for requesting a new firmware. | ||
| * Download tftp by http:// | * Download tftp by http:// | ||
| + | |||
| + | ==== CFE Secure Boot ==== | ||
| + | In modern SoC releases, Broadcom is integrating a [[[wp> | ||
| + | |||
| + | The following information is deduced from the sources available and therefore must be taken with caution. | ||
| + | |||
| + | Up to date, there are three generations of Secure Boot that embraces the following models: | ||
| + | * GEN1: 63268 | ||
| + | * GEN2: 63138, 63148, 63381, 6838 and 6848 | ||
| + | * GEN3: 63158, 4908, 6858, 6856, 6846, 6878, 63178 and 47622 | ||
| + | |||
| + | === Mechanism === | ||
| + | - The SoC has as factory settings, most probably in the OTP fuses, the private key unique per each model and also 2 keys AES CBC (ek & iv). This is the Root of Trust which is known by OEM. | ||
| + | - During boot, the //PBL// (Primary Boot Loader coded in the SoC) will search for storage peripherals e.g. NAND or NOR SPI. If found then loads a small portion from start of storage into memory. Exact amount may depend on model and storage but most typically 64kb. In the sources this chunk is called CFEROM. | ||
| + | - Once loaded the CFEROM, the PBL will analyse the structure, which is a compound of different chunks: valid header, magic numbers, signed credentials, | ||
| + | - Typically, CFEROM will start PLL's and full memory span. Most probably doesn' | ||
| + | - CFERAM binary is encoded in JFFS2 filesystem. It must meet a certain structure as CFEROM. The compiled code is usually LZMA compressed and AES CBC encrypted, rendering the resulting binary absolutely meaningless. | ||
| + | |||
| + | === Secure modes === | ||
| + | Several modes can be chosen inside the CFEROM, putting appropiate headers: | ||
| + | * UNSECURE. The chain of trust is consciously dropped. The compiled code will be executed as trusted. **This is potentially very interesting in order to develop other bootloaders like U-Boot** | ||
| + | * SECURE. This sets the kind of encryption and keys used, which in turn can be: | ||
| + | * GEN2 = MFG | ||
| + | * GEN3 = MFG or FLD | ||
| + | |||
| + | === CFEROM structure === | ||
| + | The actual implementation differs depending on the generation and the storage media, but roughly this guidelines are true: | ||
| + | |||
| + | == GEN1 == | ||
| + | WIP | ||
| + | |||
| + | == GEN2 == | ||
| + | ^ Offset | ||
| + | | 0x0 | 0x14 | Unauth header | | | | | ||
| + | | 0x0 | 0x4 | ::: | Magic number 1 | 0x0001B669 | In decimal = 112233 | ||
| + | | 0x4 | 0x4 | ::: | Magic number 2 | 0x0006CC7E | In decimal = 445566 | ||
| + | | 0x8 | 0x4 | ::: | Version | ||
| + | | 0x0c | 0x4 | ::: | SBI_length | ||
| + | | 0x10 | 0x4 | ::: | JAM CRC32 | variable | ||
| + | | 0x14 | variable | SBI | | | | | ||
| + | | 0x14 | 0x2 | ::: | type | 0x00 | This seems a legacy field | | ||
| + | | 0x16 | 0x2 | ::: | ver | 0x00 | This seems a legacy field | | ||
| + | | 0x18 | 0x2 | ::: | len | 0x00 | This seems a legacy field | | ||
| + | | 0x1a | 0x2 | ::: | config | ||
| + | | 0x1c | 0x180 | ::: | mfg.oem.bin | ||
| + | | 0x19c | 0x100 | ::: | mfg.oem.sig | ||
| + | | 0x29c | 0x180 | ::: | op.cot.bin | ||
| + | | 0x41c | 0x100 | ::: | op.cot.sig | ||
| + | | 0x51c | variable | ::: | cferom.bin | ||
| + | | SBI_length-0x104 | 0x100 | ::: | SHA256 sig | variable | ||
| + | | SBI_length-0x4 | ||
| + | |||
| + | From the sources, we can reverse the structure of mfg.oem.bin: | ||
| + | ^ Offset | ||
| + | | 0x0 | 0x148 | mfg.oem.bin | | | | | ||
| + | | 0x0 | 0x6 | ::: | Signature header | 0x000000010242 | This seems like a magic word | | ||
| + | | 0x6 | 0x2 | ::: | Mid | 0x1234 | ||
| + | | 0x8 | 0x100 | ::: | KrsaMfgPub.bin | ||
| + | | 0x108 | 0x20 | ::: | mfg.ek.enc | ||
| + | | 0x128 | 0x20 | ::: | mfg.iv.enc | ||
| + | |||
| + | |||
| + | == GEN3 == | ||
| + | WIP | ||
| + | |||
| + | \\ | ||
| + | === In the search of the RoT password === | ||
| + | If the PBL password was known, **we could develop any bootloader** with or without the CoT characteristic. It is most likely that this will never be exposed being Broadcom so obscure with their products. | ||
| + | |||
| + | However, we must remain attentive to the GPL bundles that pop up from time to time. | ||
| + | |||
| + | More precisely, in the following repo [[https:// | ||
| + | |||
| + | Basically the [[https:// | ||
| + | < | ||
| + | The file Krot-mfg-encrypted.pem is aes-128-cbc encrypted with the same pass-phrase that encrypts the files bcm63xx_encr*.c located in the cfe/ | ||
| + | </ | ||
| + | |||
| + | This means: | ||
| + | * The PBL MFG password is encrypted in the file Krot-mfg-encrypted.pem | ||
| + | * The password must be declared in the files bcm63xx_encr*.c, | ||
| + | * Analysing the script [[https:// | ||
| + | |||
| + | Therefore **we must focus on finding " | ||
| + | |||
| + | \\ | ||
| + | === Sources === | ||
| + | * [[https:// | ||
| + | * [[https:// | ||
| + | * [[https:// | ||
| + | |||
| ==== Using CFE TFTP client ==== | ==== Using CFE TFTP client ==== | ||
| Line 185: | Line 285: | ||
| ==== CFE HEADER ==== | ==== CFE HEADER ==== | ||
| At the begining of CFE, outside the NVRAM area there exist three interesting parameters: | At the begining of CFE, outside the NVRAM area there exist three interesting parameters: | ||
| - | ^ Offsets ^ parameter ^ possible values | + | ^ Offsets |
| - | | 0x010-0x013 | **BpGetSdramSize** | 8MB 1 CHIP\\ 16MB 1 CHIP\\ 32MB 1 CHIP\\ 64MB 2 CHIP\\ 32MB 2 CHIP\\ 16MB 2 CHIP\\ 64MB 1 CHIP | **0**\\ **1**\\ **2**\\ **3**\\ **4**\\ **5**\\ **6** | 4 bytes\\ (unsigned long) | | + | | 0x010-0x013 |
| - | | 0x014-0x017 | **BpGetCMTThread**\\ (Main Thread) | core0\\ core1 | **0**\\ **1** | 4 bytes\\ (unsigned long) | | + | | 0x014-0x017 |
| - | | 0x570 | **CFE Version** | any | | | + | | 0x570 | **CFE Version** |
| + | | 0x575 | **CFE Version Number** | ||
| + | | 0x57A | **unused** | ||
| === NVRAM === | === NVRAM === | ||
| Line 209: | Line 311: | ||
| | {{: | | {{: | ||
| - | ^ NVRAM version> | + | ^ NVRAM version> |
| - | ^ Offsets ^ parameter | + | ^ Offsets |
| - | | 0x580 | **NVRAM Version** || 4 | | + | | 0x580 |
| - | | 0x584 | **BOOT LINE** | e=192.168.1.1 (Board IP)\\ h=192.168.1.100 (Host IP)\\ g= (Gateway IP)\\ r=f/h (run from flash/ | + | | 0x584 |
| - | | 0x684 | **Board ID** || 16 | | + | | 0x684 |
| - | | 0x694 | **Main Thread** || 4 | | + | | 0x694 |
| - | | 0x698 | **Psi size** || 4 | | + | | 0x698 |
| - | | 0x69C | **Number MAC Addresses** || 4 | | + | | 0x69C |
| - | | 0x6A0 | **Base MAC Address** || 6 | | + | | 0x6A0 |
| - | | 0x6A6 | **reserved** || 2 | | + | | 0x6A6 |
| - | | 0x6A8 | **old CheckSum** || 4 | | + | | 0x6A7 | **allocate space for backup PSI flag** |
| - | | 0x6AC | **gpon Serial Number** || 13 | | + | | 0x6A8 |
| - | | 0x6B9 | **gpon Password** || 11 | | + | | 0x6AC |
| - | | 0x6C4 | **wps Device Pin** || 8 | | + | | 0x6B9 |
| - | | 0x6CC | **wlan Params** || 256 | | + | | 0x6C4 |
| - | | 0x7CC | **Syslog Size** || 4 | | + | | 0x6CC |
| - | | 0x7D0 | **Nand Part Ofs Kb** || 20 | | + | | 0x7CC |
| - | | 0x7E4 | **Nand Part Size Kb** || 20 | | + | | 0x7D0 |
| - | | 0x7F8 | **Voice Board Id** || 16 | | + | | 0x7E4 |
| - | | 0x808 | **afe Id** || 8 | | + | | 0x7F8 |
| - | | 0x810 | **Unused** || 364 | | + | | 0x808 |
| - | | 0x97C | **CheckSum** || 4 | | + | | 0x810 |
| + | | 0x812 | **OptoRxPower Offset** | ||
| + | | 0x814 | **OptoTxPower Reading** | ||
| + | | 0x816 | **unused** | ||
| + | | 0x850 | **Flash Block Size** | ||
| + | | 0x851 | **AuxFS Size Percentage** | ||
| + | | 0x852 | **unused** | ||
| + | | 0x8FB | **Reset to Default CFG Flag** | ||
| + | | 0x8FC | **Model Name** | ||
| + | | 0x91C | **DES Key** || 32 | | ||
| + | | 0x93C | **WEP Key** || 32 | | ||
| + | | 0x95C | **Serial Number** | ||
| + | | 0x97C | ||
| + | | 0x980 | --end-- | ||
| NVRAM versions >=5 always have the checksum placed at the end of the NVRAM. | NVRAM versions >=5 always have the checksum placed at the end of the NVRAM. | ||