Benton SN-R1

Benton SN-R1

The Benton SN-R1 is a Wi-Fi 6 router built around MediaTek's Filogic 820 platform (MT7981B, dual-core Cortex-A53 @ 1.3 GHz), with 128 GB of eMMC storage. Support is pending in PR #25096.

Supported Versions

Brand: Benton Model: SN-R1 OWrt Forum Topic URL: https://forum.openwrt.org/t/253504 Forum search: SN-R1

Hardware Highlights

Model: SN-R1 CPU: MediaTek MT7981B CPU MHz: 1300 CPU Cores: 2 Flash MB: 131072 RAM MB: 1024 WLAN Hardware: MediaTek MT7981B, MediaTek MT7976C WLAN 2.4GHz: b/g/n/ax WLAN 5.0GHz: a/n/ac/ax Ethernet 1Gbit ports: 5

Installation

Model: SN-R1

Recovery / initial installation via UART

1. Connect a 3.3 V USB-UART adapter to header J6 (see Serial section below) and open a console at 115200 8N1. 2. Power on the router and interrupt U-Boot autoboot to reach the prompt. 3. Load the initramfs image into RAM over serial Ymodem — TFTP over Ethernet was unreliable in testing, with persistent ARP failures:

loady 0x46000000

then from the host PC:

sx -vv openwrt-mediatek-filogic-benton_sn-r1-initramfs-kernel.bin < /dev/ttyUSB0 > /dev/ttyUSB0

4. Boot the loaded image:

bootm 0x46000000

5. Once OpenWrt is running from RAM, copy the sysupgrade image to /tmp and install:

sysupgrade -n /tmp/openwrt-mediatek-filogic-benton_sn-r1-squashfs-sysupgrade.bin

Flash layout

root@OpenWrt:~# for p in /sys/block/mmcblk0/mmcblk0p*; do echo "--- $p ---"; cat "$p/uevent"; done
--- /sys/block/mmcblk0/mmcblk0p1 --- PARTNAME=u-boot-env
--- /sys/block/mmcblk0/mmcblk0p2 --- PARTNAME=factory
--- /sys/block/mmcblk0/mmcblk0p3 --- PARTNAME=fip
--- /sys/block/mmcblk0/mmcblk0p4 --- PARTNAME=kernel
--- /sys/block/mmcblk0/mmcblk0p5 --- PARTNAME=rootfs
--- /sys/block/mmcblk0/mmcblk0p6 --- PARTNAME=userdata

GPT-partitioned eMMC. p5 (rootfs, 1 GiB) holds the squashfs image with a loop-mounted F2FS overlay in its remaining free space; p6 (userdata, ~107 GB) is auto-mounted separately.

Debricking

Recover via the UART/Ymodem procedure above: load the initramfs image, then run sysupgrade from the running RAM system.

Opening the case

Remove the 4 screws on the bottom of the device. Using a plastic pry tool/slider, separate and pull off the top of the case. Underneath, the board is secured by 4 screws and a plastic locking clip. Remove all 4 screws, release the plastic lock, and lift out the board.

Serial

J6 header — Pin 1: 3.3 V (do not connect), Pin 2: GND, Pin 3: RX (connect to adapter TX), Pin 4: TX (connect to adapter RX).

Serial connection parameters for Benton SN-R1
115200, 8N1, 3.3V

Bootlogs

OpenWrt bootlog

Network/switch portion, confirmed via dmesg:

mt7530-mdio mdio-bus:1f: no interrupt support
mt7530-mdio mdio-bus:1f: configuring for fixed/2500base-x link mode
mt7530-mdio mdio-bus:1f: Link is Up - 2.5Gbps/Full - flow control rx/tx
mt7530-mdio mdio-bus:1f wan (uninitialized): PHY [mt7530-0:00] driver [MediaTek MT7531 PHY] (irq=POLL)
mt7530-mdio mdio-bus:1f lan1 (uninitialized): PHY [mt7530-0:01] driver [MediaTek MT7531 PHY] (irq=POLL)
mt7530-mdio mdio-bus:1f lan2 (uninitialized): PHY [mt7530-0:02] driver [MediaTek MT7531 PHY] (irq=POLL)
mt7530-mdio mdio-bus:1f lan3 (uninitialized): PHY [mt7530-0:03] driver [MediaTek MT7531 PHY] (irq=POLL)
mt7530-mdio mdio-bus:1f lan4 (uninitialized): PHY [mt7530-0:04] driver [MediaTek MT7531 PHY] (irq=POLL)

The switch's interrupt-controller wiring isn't yet configured in the devicetree, so PHY link-change detection currently falls back to polling (irq=POLL) rather than being interrupt-driven.

Notes

OpenWrt PR: https://github.com/openwrt/openwrt/pull/25096
OpenWrt Forum thread: https://forum.openwrt.org/t/253504

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