MediaTek / Ralink

MediaTek / Ralink

General

On 2010, Ralink buys then merges with Trendchip.
On May, 5th 2011, MediaTek bought Ralink. Since then, Mediatek spun off a number of companies namely Econet and Airoha.
Most WNICs are supported by the rt2x00 driver family. See wireless.overview
Websites with more background information

Ralink ramips

A quite good source for product specs on MediaTek/Ralink SoCs is here: https://deviwiki.com/wiki/Ralink.
OpenWrt specific:
- All old MediaTek/Ralink SoCs are merged under the target ramips.
- Building a target requires a target-specific firmware. The kernel is patched with the command line that has the board name in it. This mechanism is similar to what is done for ar71xx platforms.
- Source code: https://github.com/openwrt/openwrt/tree/master/target/linux/ramips

Target	Subtarget	SoC	MIPS	Cores	Threads	Max clock	RAM	Ant	Devices
`ramips`	RT288x	RT2880	4KEc	1	1	300 MHz	SDR	2T3R	see ToH
	RT3x5x/RT5350	RT3050	24KEc	1	1	384 MHz	SDR	2T2R	see ToH
		RT3052	24KEc	1	1	384 MHz	SDR	2T2R	see ToH
		RT3350	24KEc	1	1	384 MHz	SDR	1T1R	see ToH
		RT3352	24KEc	1	1	400 MHz	SDR/DDR2	2T2R	see ToH
		RT5350	24KEc	1	1	500 MHz	SDR	1T1R	see ToH
	RT3662/RT3883	RT3662	74Kc	1	1	500 MHz	SDR/DDR2	2T3R	see ToH
	RT3662/RT3883	RT3883	74Kc	1	1	500 MHz	SDR/DDR2	3T3R	see ToH
	RT6856	RT6856	34KEc	1	?	700 MHz	DDR2	n/a	see ToH
	MT7620	MT7620a	24KEc	1	1	600 Mhz	DDR2	2T2R	see ToH
	MT7620	MT7620n	24KEc	1	1	600 Mhz	SDR/DDR1/2	2T2R	see ToH
	MT7621	MT7621AT	1004Kc	2	4	880 MHz	DDR2/3	n/a	see ToH
		MT7621DAT	1004Kc	2	4	880 MHz	integrated 128MB DDR3	n/a	see ToH
		MT7621NT	1004Kc	1	2	880 MHz	DDR2	n/a	see ToH
		MT7621ST	1004Kc	1	2	880 MHz	DDR2/3	n/a	see ToH
	MT7628	MT7628	24kec	1	1	580 MHz	DDR1/2	2T2R	see ToH
	MT7688	MT7688	24kec	1	1	580 MHz	DDR1/2	1T1R	see ToH

RT6856
- Not supported
MT7620 vs. RT5350
- Chips are similar on the software layer
- RT5350 is cheaper http://cdn.sparkfun.com/datasheets/Wireless/WiFi/RT5350.pdf
- MT7620 is the successor, it's “faster and better”
- Both use the rt2800soc driver.
- No hardware support for 802.11w thus limiting WPA3 speed to ~14 Mbps. Use WPA2 for full throughput.
MT7621
- 2 cores, 4 threads:
  - MT7621AT
  - MT7621DAT: 128MB integrated RAM
- 1 core, 2 threads:
  - MT7621NT, MT7621ST
- SoC does not include a Wifi subsystem
- https://www.mediatek.com/products/homeNetworking/mt7621
- https://deviwiki.com/wiki/MediaTek_MT7621
MT7628
- MT7628A: Full function with external DRAM
- MT7628K: Embedded 8MB DRAM and L-shape
- MT7628N: Same as MT7628A, but without PCle and IoT modes
- MT7628DAN: 64MB integrated RAM
- Chip uses a driver from the mt76 family. 802.11w is hardware accelerated.

MediaTek

New MediaTek SoCs are released under the much more performant Filogic line:

Use quad core and hybrid core ARM architecture
Includes support for DSA and hardware acceleration for flow offloading (HFO) and wireless offloading (WED)
Depending on SoC includes Wi-Fi 6 and/or 7 under the mt76 driver family
802.11w and WPA3 included in hardware
Used in many devices such as OpenWrt One
See Filogic link under Devices below for supported targets
Crypto acceleration is provided by EPI-93, which is now upstream.

Airoha

Trendchip was the original xDSL and xPON provider with their TC3162 core which is a MIPS architecture. Since then, after the Mediatek acquisition, it took a different name, Econet. After some time, the company yet again rebranded in what is now known as Airoha, which also coincides with them switching to an ARMv8-A architecture.

RGMII configuration

On MT7620A and likely other Ralink based SOCs, the RGMII delay is set with the Port I control register in the GSW (gigabit switch) subsystem. For boards with Uboot and an available console the register can be read with the command:

  md 0x10117014 1

The following bits tell you the OEM bootloader / chip defaults:

BIT(2)	RX no delay
BIT(3)	TX delay
BITS(16, 20)	PHY_BASE
BITS(24, 28)	PHY_DISABLE

For a complete explanation, look for the register 0x7014 in the MT7620 Programming Guide. For example:

10117014: 1f08000c

c -→ 1100 -→ TX delay only

8 -→ PHY_BASE address

1f -→ internal PHYs disabled

Remember to read bits from right to left. For example 1f08000c in binary becomes 00011111000010000000000000001100

0001 1111 0000 1000 0000 0000 0000 1100
   |    |    |    |    |    |    |    |   
  28   24   20   16   12    8    4    0

MediaTek xDSL

Products

ADSL

http://www.mediatek.com/_en/01_products/04_pro.php?sn=1031
TC3085/TC3086 includes AFE (Analog Front-End) for ADSL2+
TC3162L2M incorporates a 32-bit network processor and a DMT (Discrete Multi-Tone)-engine for ADSL2+
TC3162LEM incorporates a 32-bit network processor and a DMT (Discrete Multi-Tone)-engine for ADSL2+

VDSL

RT63260 is a integrated single-chip solution combining AFE (Analog Front End) and an ADSL2/2+ wired ADSL modem application together on one chip. It includes a 32-bit network processor and a Discrete Multi-Tone (DMT) engine for ADSL.
RT63365
- Combine with RT63087 AFE (Analog Front-End) for VDSL2
RT63368 incorporates a MIPS 34Kc CPU and a DMT (Discrete Multi-Tone)-engine for VDSL2
- Combine with RT63087 AFE (Analog Front-End) for VDSL2
RT65168 incorporates a MIPS 34Kc CPU and a DMT (Discrete Multi-Tone)-engine for VDSL2
- Combine with RT63095 AFE (Analog Front-End) for VDSL2

Devices

The list of related devices:
MediaTek, MT7620a, MT7620N, MT7621, MT7628, MT7688, Ralink, ramips, rt2880, rt3050, rt3052, rt3350, rt3352, rt3662, rt3883, rt5350, filogic

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